diff --git a/BackupFiles/Fernsteuerung.BK1 b/BackupFiles/Fernsteuerung.BK1
index 3abed72..dc29111 100644
Binary files a/BackupFiles/Fernsteuerung.BK1 and b/BackupFiles/Fernsteuerung.BK1 differ
diff --git a/BackupFiles/Fernsteuerung.BK2 b/BackupFiles/Fernsteuerung.BK2
index 1f4dd34..e63acf0 100644
Binary files a/BackupFiles/Fernsteuerung.BK2 and b/BackupFiles/Fernsteuerung.BK2 differ
diff --git a/BackupFiles/Fernsteuerung.BK3 b/BackupFiles/Fernsteuerung.BK3
index 6a84394..2894e5f 100644
Binary files a/BackupFiles/Fernsteuerung.BK3 and b/BackupFiles/Fernsteuerung.BK3 differ
diff --git a/BackupFiles/Fernsteuerung.BK4 b/BackupFiles/Fernsteuerung.BK4
index 19f977a..3abed72 100644
Binary files a/BackupFiles/Fernsteuerung.BK4 and b/BackupFiles/Fernsteuerung.BK4 differ
diff --git a/BackupFiles/Fernsteuerung.BK5 b/BackupFiles/Fernsteuerung.BK5
index ab4b1b1..1f4dd34 100644
Binary files a/BackupFiles/Fernsteuerung.BK5 and b/BackupFiles/Fernsteuerung.BK5 differ
diff --git a/BackupFiles/Fernsteuerung.T3000A b/BackupFiles/Fernsteuerung.T3000A
index 8f4ecdd..89266b3 100644
Binary files a/BackupFiles/Fernsteuerung.T3000A and b/BackupFiles/Fernsteuerung.T3000A differ
diff --git a/BackupFiles/Fernsteuerung.T3000B b/BackupFiles/Fernsteuerung.T3000B
index ddbe64f..69fa48c 100644
Binary files a/BackupFiles/Fernsteuerung.T3000B and b/BackupFiles/Fernsteuerung.T3000B differ
diff --git a/BackupFiles/Fernsteuerung.T3000C b/BackupFiles/Fernsteuerung.T3000C
index 8f9a432..9281670 100644
Binary files a/BackupFiles/Fernsteuerung.T3000C and b/BackupFiles/Fernsteuerung.T3000C differ
diff --git a/Fernsteuerung.T3000 b/Fernsteuerung.T3000
index 2894e5f..16f9c02 100644
Binary files a/Fernsteuerung.T3000 and b/Fernsteuerung.T3000 differ
diff --git a/Reciver/Reciver/Debug/Reciver.elf b/Reciver/Reciver/Debug/Reciver.elf
index dc4f024..aaf79ab 100644
Binary files a/Reciver/Reciver/Debug/Reciver.elf and b/Reciver/Reciver/Debug/Reciver.elf differ
diff --git a/Reciver/Reciver/Debug/Reciver.hex b/Reciver/Reciver/Debug/Reciver.hex
index 1562e77..6500740 100644
--- a/Reciver/Reciver/Debug/Reciver.hex
+++ b/Reciver/Reciver/Debug/Reciver.hex
@@ -1,113 +1,116 @@
 :100000000C942A000C9447000C9447000C94470071
 :100010000C9447000C9447000C9447000C94470044
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diff --git a/Reciver/Reciver/Debug/Reciver.lss b/Reciver/Reciver/Debug/Reciver.lss
index 8880a8e..e31c535 100644
--- a/Reciver/Reciver/Debug/Reciver.lss
+++ b/Reciver/Reciver/Debug/Reciver.lss
@@ -3,29 +3,29 @@ Reciver.elf:     file format elf32-avr
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         000006e2  00000000  00000000  00000094  2**1
+  0 .text         00000716  00000000  00000000  00000094  2**1
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         00000004  00800060  000006e2  00000776  2**0
+  1 .data         00000004  00800060  00000716  000007aa  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          00000002  00800064  00800064  0000077a  2**0
+  2 .bss          00000002  00800064  00800064  000007ae  2**0
                   ALLOC
-  3 .stab         000006cc  00000000  00000000  0000077c  2**2
+  3 .stab         000006cc  00000000  00000000  000007b0  2**2
                   CONTENTS, READONLY, DEBUGGING
-  4 .stabstr      00000085  00000000  00000000  00000e48  2**0
+  4 .stabstr      00000085  00000000  00000000  00000e7c  2**0
                   CONTENTS, READONLY, DEBUGGING
-  5 .debug_aranges 000000e0  00000000  00000000  00000ed0  2**3
+  5 .debug_aranges 000000e0  00000000  00000000  00000f08  2**3
                   CONTENTS, READONLY, DEBUGGING
-  6 .debug_info   00000c6f  00000000  00000000  00000fb0  2**0
+  6 .debug_info   00000c9e  00000000  00000000  00000fe8  2**0
                   CONTENTS, READONLY, DEBUGGING
-  7 .debug_abbrev 0000036d  00000000  00000000  00001c1f  2**0
+  7 .debug_abbrev 00000388  00000000  00000000  00001c86  2**0
                   CONTENTS, READONLY, DEBUGGING
-  8 .debug_line   00000730  00000000  00000000  00001f8c  2**0
+  8 .debug_line   0000073b  00000000  00000000  0000200e  2**0
                   CONTENTS, READONLY, DEBUGGING
-  9 .debug_frame  000001c8  00000000  00000000  000026bc  2**2
+  9 .debug_frame  000001c8  00000000  00000000  0000274c  2**2
                   CONTENTS, READONLY, DEBUGGING
- 10 .debug_str    0000025b  00000000  00000000  00002884  2**0
+ 10 .debug_str    0000025b  00000000  00000000  00002914  2**0
                   CONTENTS, READONLY, DEBUGGING
- 11 .debug_loc    00000620  00000000  00000000  00002adf  2**0
+ 11 .debug_loc    000005fd  00000000  00000000  00002b6f  2**0
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -40,7 +40,7 @@ Disassembly of section .text:
   18:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
   1c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
   20:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
-  24:	0c 94 f6 00 	jmp	0x1ec	; 0x1ec <__vector_9>
+  24:	0c 94 1c 01 	jmp	0x238	; 0x238 <__vector_9>
   28:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
   2c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
   30:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
@@ -65,8 +65,8 @@ Disassembly of section .text:
   60:	10 e0       	ldi	r17, 0x00	; 0
   62:	a0 e6       	ldi	r26, 0x60	; 96
   64:	b0 e0       	ldi	r27, 0x00	; 0
-  66:	e2 ee       	ldi	r30, 0xE2	; 226
-  68:	f6 e0       	ldi	r31, 0x06	; 6
+  66:	e6 e1       	ldi	r30, 0x16	; 22
+  68:	f7 e0       	ldi	r31, 0x07	; 7
   6a:	02 c0       	rjmp	.+4      	; 0x70 <__do_copy_data+0x10>
   6c:	05 90       	lpm	r0, Z+
   6e:	0d 92       	st	X+, r0
@@ -87,8 +87,8 @@ Disassembly of section .text:
   80:	a6 36       	cpi	r26, 0x66	; 102
   82:	b1 07       	cpc	r27, r17
   84:	e1 f7       	brne	.-8      	; 0x7e <.do_clear_bss_loop>
-  86:	0e 94 82 01 	call	0x304	; 0x304 <main>
-  8a:	0c 94 6f 03 	jmp	0x6de	; 0x6de <_exit>
+  86:	0e 94 9b 01 	call	0x336	; 0x336 <main>
+  8a:	0c 94 89 03 	jmp	0x712	; 0x712 <_exit>
 
 0000008e <__bad_interrupt>:
   8e:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>
@@ -104,39 +104,38 @@ void turn() {
   96:	90 91 63 00 	lds	r25, 0x0063
   9a:	86 30       	cpi	r24, 0x06	; 6
   9c:	91 05       	cpc	r25, r1
-  9e:	99 f1       	breq	.+102    	; 0x106 <turn+0x74>
+  9e:	09 f4       	brne	.+2      	; 0xa2 <turn+0x10>
+  a0:	41 c0       	rjmp	.+130    	; 0x124 <turn+0x92>
 		return;
 	status = RUN;
-  a0:	86 e0       	ldi	r24, 0x06	; 6
-  a2:	90 e0       	ldi	r25, 0x00	; 0
-  a4:	90 93 63 00 	sts	0x0063, r25
-  a8:	80 93 62 00 	sts	0x0062, r24
+  a2:	86 e0       	ldi	r24, 0x06	; 6
+  a4:	90 e0       	ldi	r25, 0x00	; 0
+  a6:	90 93 63 00 	sts	0x0063, r25
+  aa:	80 93 62 00 	sts	0x0062, r24
 	servopos = RIGHT-60;
-  ac:	88 e7       	ldi	r24, 0x78	; 120
-  ae:	90 e0       	ldi	r25, 0x00	; 0
-  b0:	90 93 61 00 	sts	0x0061, r25
-  b4:	80 93 60 00 	sts	0x0060, r24
+  ae:	88 e7       	ldi	r24, 0x78	; 120
+  b0:	90 e0       	ldi	r25, 0x00	; 0
+  b2:	90 93 61 00 	sts	0x0061, r25
+  b6:	80 93 60 00 	sts	0x0060, r24
 	#else
 		//round up by default
 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
 	#endif
 
 	__builtin_avr_delay_cycles(__ticks_dc);
-  b8:	8f ef       	ldi	r24, 0xFF	; 255
-  ba:	96 e1       	ldi	r25, 0x16	; 22
-  bc:	a1 e1       	ldi	r26, 0x11	; 17
-  be:	81 50       	subi	r24, 0x01	; 1
-  c0:	90 40       	sbci	r25, 0x00	; 0
-  c2:	a0 40       	sbci	r26, 0x00	; 0
-  c4:	e1 f7       	brne	.-8      	; 0xbe <turn+0x2c>
-  c6:	00 c0       	rjmp	.+0      	; 0xc8 <turn+0x36>
-  c8:	00 00       	nop
-	_delay_ms(700);
-	servopos = RIGHT-120;
-  ca:	8c e3       	ldi	r24, 0x3C	; 60
-  cc:	90 e0       	ldi	r25, 0x00	; 0
-  ce:	90 93 61 00 	sts	0x0061, r25
-  d2:	80 93 60 00 	sts	0x0060, r24
+  ba:	8f e3       	ldi	r24, 0x3F	; 63
+  bc:	9c e9       	ldi	r25, 0x9C	; 156
+  be:	01 97       	sbiw	r24, 0x01	; 1
+  c0:	f1 f7       	brne	.-4      	; 0xbe <turn+0x2c>
+  c2:	00 c0       	rjmp	.+0      	; 0xc4 <turn+0x32>
+  c4:	00 00       	nop
+	_delay_ms(10+DEVICE);
+	rf12_txpacket(MASTER, DEVICE, status);
+  c6:	40 91 62 00 	lds	r20, 0x0062
+  ca:	50 91 63 00 	lds	r21, 0x0063
+  ce:	81 e0       	ldi	r24, 0x01	; 1
+  d0:	6a e0       	ldi	r22, 0x0A	; 10
+  d2:	0e 94 f6 02 	call	0x5ec	; 0x5ec <rf12_txpacket>
   d6:	8f ef       	ldi	r24, 0xFF	; 255
   d8:	96 e1       	ldi	r25, 0x16	; 22
   da:	a1 e1       	ldi	r26, 0x11	; 17
@@ -147,8 +146,8 @@ void turn() {
   e4:	00 c0       	rjmp	.+0      	; 0xe6 <turn+0x54>
   e6:	00 00       	nop
 	_delay_ms(700);
-	servopos = RIGHT;
-  e8:	84 eb       	ldi	r24, 0xB4	; 180
+	servopos = RIGHT-120;
+  e8:	8c e3       	ldi	r24, 0x3C	; 60
   ea:	90 e0       	ldi	r25, 0x00	; 0
   ec:	90 93 61 00 	sts	0x0061, r25
   f0:	80 93 60 00 	sts	0x0060, r24
@@ -161,1083 +160,1084 @@ void turn() {
  100:	e1 f7       	brne	.-8      	; 0xfa <turn+0x68>
  102:	00 c0       	rjmp	.+0      	; 0x104 <turn+0x72>
  104:	00 00       	nop
- 106:	08 95       	ret
+	_delay_ms(700);
+	servopos = RIGHT;
+ 106:	84 eb       	ldi	r24, 0xB4	; 180
+ 108:	90 e0       	ldi	r25, 0x00	; 0
+ 10a:	90 93 61 00 	sts	0x0061, r25
+ 10e:	80 93 60 00 	sts	0x0060, r24
+ 112:	8f ef       	ldi	r24, 0xFF	; 255
+ 114:	96 e1       	ldi	r25, 0x16	; 22
+ 116:	a1 e1       	ldi	r26, 0x11	; 17
+ 118:	81 50       	subi	r24, 0x01	; 1
+ 11a:	90 40       	sbci	r25, 0x00	; 0
+ 11c:	a0 40       	sbci	r26, 0x00	; 0
+ 11e:	e1 f7       	brne	.-8      	; 0x118 <turn+0x86>
+ 120:	00 c0       	rjmp	.+0      	; 0x122 <turn+0x90>
+ 122:	00 00       	nop
+ 124:	08 95       	ret
 
-00000108 <poll>:
+00000126 <poll>:
 	_delay_ms(700);
 }
 
 void poll() {
 	DDRD &= ~(1<<PIND1);
- 108:	89 98       	cbi	0x11, 1	; 17
+ 126:	89 98       	cbi	0x11, 1	; 17
 	if(status == ACTIVE) {
- 10a:	80 91 62 00 	lds	r24, 0x0062
- 10e:	90 91 63 00 	lds	r25, 0x0063
- 112:	83 30       	cpi	r24, 0x03	; 3
- 114:	91 05       	cpc	r25, r1
- 116:	41 f4       	brne	.+16     	; 0x128 <poll+0x20>
+ 128:	80 91 62 00 	lds	r24, 0x0062
+ 12c:	90 91 63 00 	lds	r25, 0x0063
+ 130:	83 30       	cpi	r24, 0x03	; 3
+ 132:	91 05       	cpc	r25, r1
+ 134:	41 f4       	brne	.+16     	; 0x146 <poll+0x20>
 		if(PIND & (1<<PIND1)) {
- 118:	81 9b       	sbis	0x10, 1	; 16
- 11a:	06 c0       	rjmp	.+12     	; 0x128 <poll+0x20>
+ 136:	81 9b       	sbis	0x10, 1	; 16
+ 138:	06 c0       	rjmp	.+12     	; 0x146 <poll+0x20>
 			rf12_endasyncrx();
- 11c:	0e 94 5f 02 	call	0x4be	; 0x4be <rf12_endasyncrx>
+ 13a:	0e 94 79 02 	call	0x4f2	; 0x4f2 <rf12_endasyncrx>
 			turn();
- 120:	0e 94 49 00 	call	0x92	; 0x92 <turn>
+ 13e:	0e 94 49 00 	call	0x92	; 0x92 <turn>
 			rf12_beginasyncrx();
- 124:	0e 94 48 02 	call	0x490	; 0x490 <rf12_beginasyncrx>
- 128:	08 95       	ret
-
-0000012a <recive>:
+ 142:	0e 94 62 02 	call	0x4c4	; 0x4c4 <rf12_beginasyncrx>
 		}
 	}
+	if(status == SLEEP) {
+ 146:	80 91 62 00 	lds	r24, 0x0062
+ 14a:	90 91 63 00 	lds	r25, 0x0063
+ 14e:	82 30       	cpi	r24, 0x02	; 2
+ 150:	91 05       	cpc	r25, r1
+ 152:	59 f4       	brne	.+22     	; 0x16a <poll+0x44>
+		if(PIND & (1<<PIND1)) {
+ 154:	81 9b       	sbis	0x10, 1	; 16
+ 156:	09 c0       	rjmp	.+18     	; 0x16a <poll+0x44>
+			rf12_endasyncrx();
+ 158:	0e 94 79 02 	call	0x4f2	; 0x4f2 <rf12_endasyncrx>
+			rf12_txpacket(MASTER, DEVICE, DEDECT);
+ 15c:	81 e0       	ldi	r24, 0x01	; 1
+ 15e:	6a e0       	ldi	r22, 0x0A	; 10
+ 160:	48 e0       	ldi	r20, 0x08	; 8
+ 162:	0e 94 f6 02 	call	0x5ec	; 0x5ec <rf12_txpacket>
+			rf12_beginasyncrx();
+ 166:	0e 94 62 02 	call	0x4c4	; 0x4c4 <rf12_beginasyncrx>
+ 16a:	08 95       	ret
+
+0000016c <recive>:
+		}			
+	}
 }
 
 void recive() {
- 12a:	cf 93       	push	r28
+ 16c:	cf 93       	push	r28
 	rf12_beginasyncrx();
- 12c:	0e 94 48 02 	call	0x490	; 0x490 <rf12_beginasyncrx>
+ 16e:	0e 94 62 02 	call	0x4c4	; 0x4c4 <rf12_beginasyncrx>
 	while(rf12_hasdata()) {
- 130:	02 c0       	rjmp	.+4      	; 0x136 <recive+0xc>
+ 172:	02 c0       	rjmp	.+4      	; 0x178 <recive+0xc>
 		poll();
- 132:	0e 94 84 00 	call	0x108	; 0x108 <poll>
+ 174:	0e 94 93 00 	call	0x126	; 0x126 <poll>
 	}
 }
 
 void recive() {
 	rf12_beginasyncrx();
 	while(rf12_hasdata()) {
- 136:	0e 94 55 02 	call	0x4aa	; 0x4aa <rf12_hasdata>
- 13a:	88 23       	and	r24, r24
- 13c:	d1 f7       	brne	.-12     	; 0x132 <recive+0x8>
+ 178:	0e 94 6f 02 	call	0x4de	; 0x4de <rf12_hasdata>
+ 17c:	88 23       	and	r24, r24
+ 17e:	d1 f7       	brne	.-12     	; 0x174 <recive+0x8>
 		poll();
 	}
 	uint8_t addr = rf12_rxbyte();
- 13e:	0e 94 5a 02 	call	0x4b4	; 0x4b4 <rf12_rxbyte>
+ 180:	0e 94 74 02 	call	0x4e8	; 0x4e8 <rf12_rxbyte>
 	if(addr == ALL || addr == DEVICE || addr == GROUP) {
- 142:	88 23       	and	r24, r24
- 144:	41 f0       	breq	.+16     	; 0x156 <recive+0x2c>
- 146:	8a 30       	cpi	r24, 0x0A	; 10
- 148:	31 f0       	breq	.+12     	; 0x156 <recive+0x2c>
- 14a:	80 3f       	cpi	r24, 0xF0	; 240
- 14c:	09 f0       	breq	.+2      	; 0x150 <recive+0x26>
- 14e:	44 c0       	rjmp	.+136    	; 0x1d8 <recive+0xae>
- 150:	02 c0       	rjmp	.+4      	; 0x156 <recive+0x2c>
+ 184:	88 23       	and	r24, r24
+ 186:	41 f0       	breq	.+16     	; 0x198 <recive+0x2c>
+ 188:	8a 30       	cpi	r24, 0x0A	; 10
+ 18a:	31 f0       	breq	.+12     	; 0x198 <recive+0x2c>
+ 18c:	80 3f       	cpi	r24, 0xF0	; 240
+ 18e:	09 f0       	breq	.+2      	; 0x192 <recive+0x26>
+ 190:	49 c0       	rjmp	.+146    	; 0x224 <recive+0xb8>
+ 192:	02 c0       	rjmp	.+4      	; 0x198 <recive+0x2c>
 		while(rf12_hasdata()) {
 			poll();
- 152:	0e 94 84 00 	call	0x108	; 0x108 <poll>
+ 194:	0e 94 93 00 	call	0x126	; 0x126 <poll>
 	while(rf12_hasdata()) {
 		poll();
 	}
 	uint8_t addr = rf12_rxbyte();
 	if(addr == ALL || addr == DEVICE || addr == GROUP) {
 		while(rf12_hasdata()) {
- 156:	0e 94 55 02 	call	0x4aa	; 0x4aa <rf12_hasdata>
- 15a:	88 23       	and	r24, r24
- 15c:	d1 f7       	brne	.-12     	; 0x152 <recive+0x28>
+ 198:	0e 94 6f 02 	call	0x4de	; 0x4de <rf12_hasdata>
+ 19c:	88 23       	and	r24, r24
+ 19e:	d1 f7       	brne	.-12     	; 0x194 <recive+0x28>
 			poll();
 		}
 		uint8_t from = rf12_rxbyte();
- 15e:	0e 94 5a 02 	call	0x4b4	; 0x4b4 <rf12_rxbyte>
- 162:	c8 2f       	mov	r28, r24
+ 1a0:	0e 94 74 02 	call	0x4e8	; 0x4e8 <rf12_rxbyte>
+ 1a4:	c8 2f       	mov	r28, r24
 		while(rf12_hasdata()) {
- 164:	02 c0       	rjmp	.+4      	; 0x16a <recive+0x40>
+ 1a6:	02 c0       	rjmp	.+4      	; 0x1ac <recive+0x40>
 			poll();
- 166:	0e 94 84 00 	call	0x108	; 0x108 <poll>
+ 1a8:	0e 94 93 00 	call	0x126	; 0x126 <poll>
 	if(addr == ALL || addr == DEVICE || addr == GROUP) {
 		while(rf12_hasdata()) {
 			poll();
 		}
 		uint8_t from = rf12_rxbyte();
 		while(rf12_hasdata()) {
- 16a:	0e 94 55 02 	call	0x4aa	; 0x4aa <rf12_hasdata>
- 16e:	88 23       	and	r24, r24
- 170:	d1 f7       	brne	.-12     	; 0x166 <recive+0x3c>
+ 1ac:	0e 94 6f 02 	call	0x4de	; 0x4de <rf12_hasdata>
+ 1b0:	88 23       	and	r24, r24
+ 1b2:	d1 f7       	brne	.-12     	; 0x1a8 <recive+0x3c>
 			poll();
 		}
 		if(from == MASTER) {
- 172:	c1 30       	cpi	r28, 0x01	; 1
- 174:	89 f5       	brne	.+98     	; 0x1d8 <recive+0xae>
+ 1b4:	c1 30       	cpi	r28, 0x01	; 1
+ 1b6:	b1 f5       	brne	.+108    	; 0x224 <recive+0xb8>
 			uint8_t data = rf12_rxbyte();
- 176:	0e 94 5a 02 	call	0x4b4	; 0x4b4 <rf12_rxbyte>
+ 1b8:	0e 94 74 02 	call	0x4e8	; 0x4e8 <rf12_rxbyte>
 			switch(data) {
- 17a:	84 30       	cpi	r24, 0x04	; 4
- 17c:	51 f0       	breq	.+20     	; 0x192 <recive+0x68>
- 17e:	85 30       	cpi	r24, 0x05	; 5
- 180:	18 f4       	brcc	.+6      	; 0x188 <recive+0x5e>
- 182:	81 30       	cpi	r24, 0x01	; 1
- 184:	b1 f4       	brne	.+44     	; 0x1b2 <recive+0x88>
- 186:	18 c0       	rjmp	.+48     	; 0x1b8 <recive+0x8e>
- 188:	85 30       	cpi	r24, 0x05	; 5
- 18a:	51 f0       	breq	.+20     	; 0x1a0 <recive+0x76>
- 18c:	87 30       	cpi	r24, 0x07	; 7
- 18e:	89 f4       	brne	.+34     	; 0x1b2 <recive+0x88>
- 190:	0e c0       	rjmp	.+28     	; 0x1ae <recive+0x84>
+ 1bc:	84 30       	cpi	r24, 0x04	; 4
+ 1be:	51 f0       	breq	.+20     	; 0x1d4 <recive+0x68>
+ 1c0:	85 30       	cpi	r24, 0x05	; 5
+ 1c2:	18 f4       	brcc	.+6      	; 0x1ca <recive+0x5e>
+ 1c4:	81 30       	cpi	r24, 0x01	; 1
+ 1c6:	d9 f4       	brne	.+54     	; 0x1fe <recive+0x92>
+ 1c8:	1d c0       	rjmp	.+58     	; 0x204 <recive+0x98>
+ 1ca:	85 30       	cpi	r24, 0x05	; 5
+ 1cc:	51 f0       	breq	.+20     	; 0x1e2 <recive+0x76>
+ 1ce:	87 30       	cpi	r24, 0x07	; 7
+ 1d0:	b1 f4       	brne	.+44     	; 0x1fe <recive+0x92>
+ 1d2:	0e c0       	rjmp	.+28     	; 0x1f0 <recive+0x84>
 				case PING: {
 					break;
 				}
 				case SETSLEEP: {
 					status = SLEEP;
- 192:	82 e0       	ldi	r24, 0x02	; 2
- 194:	90 e0       	ldi	r25, 0x00	; 0
- 196:	90 93 63 00 	sts	0x0063, r25
- 19a:	80 93 62 00 	sts	0x0062, r24
+ 1d4:	82 e0       	ldi	r24, 0x02	; 2
+ 1d6:	90 e0       	ldi	r25, 0x00	; 0
+ 1d8:	90 93 63 00 	sts	0x0063, r25
+ 1dc:	80 93 62 00 	sts	0x0062, r24
 					break;
- 19e:	0c c0       	rjmp	.+24     	; 0x1b8 <recive+0x8e>
+ 1e0:	11 c0       	rjmp	.+34     	; 0x204 <recive+0x98>
 				}
 				case SETACTIVE: {
 					status = ACTIVE;
- 1a0:	83 e0       	ldi	r24, 0x03	; 3
- 1a2:	90 e0       	ldi	r25, 0x00	; 0
- 1a4:	90 93 63 00 	sts	0x0063, r25
- 1a8:	80 93 62 00 	sts	0x0062, r24
+ 1e2:	83 e0       	ldi	r24, 0x03	; 3
+ 1e4:	90 e0       	ldi	r25, 0x00	; 0
+ 1e6:	90 93 63 00 	sts	0x0063, r25
+ 1ea:	80 93 62 00 	sts	0x0062, r24
 					break;
- 1ac:	05 c0       	rjmp	.+10     	; 0x1b8 <recive+0x8e>
+ 1ee:	0a c0       	rjmp	.+20     	; 0x204 <recive+0x98>
 				}
 				case SETRUN: {
+					rf12_endasyncrx();
+ 1f0:	0e 94 79 02 	call	0x4f2	; 0x4f2 <rf12_endasyncrx>
 					turn();
- 1ae:	0e 94 49 00 	call	0x92	; 0x92 <turn>
+ 1f4:	0e 94 49 00 	call	0x92	; 0x92 <turn>
+					rf12_beginasyncrx();
+ 1f8:	0e 94 62 02 	call	0x4c4	; 0x4c4 <rf12_beginasyncrx>
+					return;
+ 1fc:	13 c0       	rjmp	.+38     	; 0x224 <recive+0xb8>
 				}
 				default:
 				{
 					rf12_endasyncrx();
- 1b2:	0e 94 5f 02 	call	0x4be	; 0x4be <rf12_endasyncrx>
+ 1fe:	0e 94 79 02 	call	0x4f2	; 0x4f2 <rf12_endasyncrx>
 					return;
- 1b6:	10 c0       	rjmp	.+32     	; 0x1d8 <recive+0xae>
+ 202:	10 c0       	rjmp	.+32     	; 0x224 <recive+0xb8>
 				}
 			}
 			rf12_endasyncrx();
- 1b8:	0e 94 5f 02 	call	0x4be	; 0x4be <rf12_endasyncrx>
- 1bc:	8f e3       	ldi	r24, 0x3F	; 63
- 1be:	9c e9       	ldi	r25, 0x9C	; 156
- 1c0:	01 97       	sbiw	r24, 0x01	; 1
- 1c2:	f1 f7       	brne	.-4      	; 0x1c0 <recive+0x96>
- 1c4:	00 c0       	rjmp	.+0      	; 0x1c6 <recive+0x9c>
- 1c6:	00 00       	nop
+ 204:	0e 94 79 02 	call	0x4f2	; 0x4f2 <rf12_endasyncrx>
+ 208:	8f e3       	ldi	r24, 0x3F	; 63
+ 20a:	9c e9       	ldi	r25, 0x9C	; 156
+ 20c:	01 97       	sbiw	r24, 0x01	; 1
+ 20e:	f1 f7       	brne	.-4      	; 0x20c <recive+0xa0>
+ 210:	00 c0       	rjmp	.+0      	; 0x212 <recive+0xa6>
+ 212:	00 00       	nop
 			_delay_ms(10+DEVICE);
 			rf12_txpacket(MASTER, DEVICE, status);
- 1c8:	40 91 62 00 	lds	r20, 0x0062
- 1cc:	50 91 63 00 	lds	r21, 0x0063
- 1d0:	81 e0       	ldi	r24, 0x01	; 1
- 1d2:	6a e0       	ldi	r22, 0x0A	; 10
- 1d4:	0e 94 dc 02 	call	0x5b8	; 0x5b8 <rf12_txpacket>
+ 214:	40 91 62 00 	lds	r20, 0x0062
+ 218:	50 91 63 00 	lds	r21, 0x0063
+ 21c:	81 e0       	ldi	r24, 0x01	; 1
+ 21e:	6a e0       	ldi	r22, 0x0A	; 10
+ 220:	0e 94 f6 02 	call	0x5ec	; 0x5ec <rf12_txpacket>
 			return;
 		}					
 	}
 }
- 1d8:	cf 91       	pop	r28
- 1da:	08 95       	ret
+ 224:	cf 91       	pop	r28
+ 226:	08 95       	ret
 
-000001dc <init_timer>:
+00000228 <init_timer>:
 	// Clock source: System Clock
 	// Clock value: 7,813 kHz
 	// Mode: Normal top=0xFF
 	// OC0 output: Disconnected
 	// Timer Period: 21,504 ms
 	TCCR0=(0<<WGM00) | (0<<COM01) | (0<<COM00) | (0<<WGM01) | (1<<CS02) | (0<<CS01) | (1<<CS00);
- 1dc:	85 e0       	ldi	r24, 0x05	; 5
- 1de:	83 bf       	out	0x33, r24	; 51
+ 228:	85 e0       	ldi	r24, 0x05	; 5
+ 22a:	83 bf       	out	0x33, r24	; 51
 	TCNT0=0x58;
- 1e0:	88 e5       	ldi	r24, 0x58	; 88
- 1e2:	82 bf       	out	0x32, r24	; 50
+ 22c:	88 e5       	ldi	r24, 0x58	; 88
+ 22e:	82 bf       	out	0x32, r24	; 50
 	OCR0=0x00;
- 1e4:	1c be       	out	0x3c, r1	; 60
+ 230:	1c be       	out	0x3c, r1	; 60
 	// Timer(s)/Counter(s) Interrupt(s) initialization
 	TIMSK=(0<<OCIE2) | (0<<TOIE2) | (0<<TICIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<TOIE1) | (0<<OCIE0) | (1<<TOIE0);
- 1e6:	81 e0       	ldi	r24, 0x01	; 1
- 1e8:	89 bf       	out	0x39, r24	; 57
+ 232:	81 e0       	ldi	r24, 0x01	; 1
+ 234:	89 bf       	out	0x39, r24	; 57
 }
- 1ea:	08 95       	ret
+ 236:	08 95       	ret
 
-000001ec <__vector_9>:
+00000238 <__vector_9>:
 
 ISR(TIMER0_OVF_vect) {
- 1ec:	1f 92       	push	r1
- 1ee:	0f 92       	push	r0
- 1f0:	0f b6       	in	r0, 0x3f	; 63
- 1f2:	0f 92       	push	r0
- 1f4:	11 24       	eor	r1, r1
- 1f6:	2f 93       	push	r18
- 1f8:	3f 93       	push	r19
- 1fa:	8f 93       	push	r24
- 1fc:	9f 93       	push	r25
+ 238:	1f 92       	push	r1
+ 23a:	0f 92       	push	r0
+ 23c:	0f b6       	in	r0, 0x3f	; 63
+ 23e:	0f 92       	push	r0
+ 240:	11 24       	eor	r1, r1
+ 242:	2f 93       	push	r18
+ 244:	3f 93       	push	r19
+ 246:	8f 93       	push	r24
+ 248:	9f 93       	push	r25
 	// Reinitialize Timer 0 value
 	TCNT0=0x58;
- 1fe:	88 e5       	ldi	r24, 0x58	; 88
- 200:	82 bf       	out	0x32, r24	; 50
+ 24a:	88 e5       	ldi	r24, 0x58	; 88
+ 24c:	82 bf       	out	0x32, r24	; 50
 	
-	int led = 0;
 	if(status == SLEEP) {
- 202:	80 91 62 00 	lds	r24, 0x0062
- 206:	90 91 63 00 	lds	r25, 0x0063
- 20a:	82 30       	cpi	r24, 0x02	; 2
- 20c:	91 05       	cpc	r25, r1
- 20e:	61 f4       	brne	.+24     	; 0x228 <__vector_9+0x3c>
-		if(pwm_led > 50)
- 210:	20 91 64 00 	lds	r18, 0x0064
- 214:	30 91 65 00 	lds	r19, 0x0065
-			led = 1;		
- 218:	81 e0       	ldi	r24, 0x01	; 1
- 21a:	90 e0       	ldi	r25, 0x00	; 0
- 21c:	23 33       	cpi	r18, 0x33	; 51
- 21e:	31 05       	cpc	r19, r1
- 220:	4c f5       	brge	.+82     	; 0x274 <__vector_9+0x88>
- 222:	80 e0       	ldi	r24, 0x00	; 0
- 224:	90 e0       	ldi	r25, 0x00	; 0
- 226:	26 c0       	rjmp	.+76     	; 0x274 <__vector_9+0x88>
-	} else if(status == ACTIVE) {
- 228:	80 91 62 00 	lds	r24, 0x0062
- 22c:	90 91 63 00 	lds	r25, 0x0063
- 230:	83 30       	cpi	r24, 0x03	; 3
- 232:	91 05       	cpc	r25, r1
- 234:	61 f4       	brne	.+24     	; 0x24e <__vector_9+0x62>
-		if(pwm_led > 5)
- 236:	20 91 64 00 	lds	r18, 0x0064
- 23a:	30 91 65 00 	lds	r19, 0x0065
-	TCNT0=0x58;
-	
-	int led = 0;
-	if(status == SLEEP) {
-		if(pwm_led > 50)
-			led = 1;		
- 23e:	81 e0       	ldi	r24, 0x01	; 1
- 240:	90 e0       	ldi	r25, 0x00	; 0
- 242:	26 30       	cpi	r18, 0x06	; 6
- 244:	31 05       	cpc	r19, r1
- 246:	b4 f4       	brge	.+44     	; 0x274 <__vector_9+0x88>
- 248:	80 e0       	ldi	r24, 0x00	; 0
- 24a:	90 e0       	ldi	r25, 0x00	; 0
- 24c:	13 c0       	rjmp	.+38     	; 0x274 <__vector_9+0x88>
-	} else if(status == ACTIVE) {
-		if(pwm_led > 5)
-			led = 1;
-	} else if(status == RUN) {
  24e:	80 91 62 00 	lds	r24, 0x0062
  252:	90 91 63 00 	lds	r25, 0x0063
- 256:	86 30       	cpi	r24, 0x06	; 6
+ 256:	82 30       	cpi	r24, 0x02	; 2
  258:	91 05       	cpc	r25, r1
- 25a:	09 f0       	breq	.+2      	; 0x25e <__vector_9+0x72>
- 25c:	49 c0       	rjmp	.+146    	; 0x2f0 <__vector_9+0x104>
-		if(pwm_led > 1)
- 25e:	20 91 64 00 	lds	r18, 0x0064
- 262:	30 91 65 00 	lds	r19, 0x0065
-	TCNT0=0x58;
-	
-	int led = 0;
-	if(status == SLEEP) {
-		if(pwm_led > 50)
-			led = 1;		
- 266:	81 e0       	ldi	r24, 0x01	; 1
- 268:	90 e0       	ldi	r25, 0x00	; 0
- 26a:	22 30       	cpi	r18, 0x02	; 2
- 26c:	31 05       	cpc	r19, r1
- 26e:	14 f4       	brge	.+4      	; 0x274 <__vector_9+0x88>
- 270:	80 e0       	ldi	r24, 0x00	; 0
- 272:	90 e0       	ldi	r25, 0x00	; 0
-	} else if(status == RUN) {
-		if(pwm_led > 1)
-			led = 1;
-	}
-	
-	pwm_led++;
- 274:	20 91 64 00 	lds	r18, 0x0064
- 278:	30 91 65 00 	lds	r19, 0x0065
- 27c:	2f 5f       	subi	r18, 0xFF	; 255
- 27e:	3f 4f       	sbci	r19, 0xFF	; 255
- 280:	30 93 65 00 	sts	0x0065, r19
- 284:	20 93 64 00 	sts	0x0064, r18
-			
-	if(led == 1) {
- 288:	81 30       	cpi	r24, 0x01	; 1
- 28a:	91 05       	cpc	r25, r1
- 28c:	51 f4       	brne	.+20     	; 0x2a2 <__vector_9+0xb6>
-		DDRB |= (1<<PINB0);
- 28e:	b8 9a       	sbi	0x17, 0	; 23
-		if(PINB & (1<<PINB0)) {
- 290:	b0 9b       	sbis	0x16, 0	; 22
- 292:	02 c0       	rjmp	.+4      	; 0x298 <__vector_9+0xac>
-			PORTB &= ~(1<<PINB0);
- 294:	c0 98       	cbi	0x18, 0	; 24
- 296:	01 c0       	rjmp	.+2      	; 0x29a <__vector_9+0xae>
-		} else {
-			PORTB |= (1<<PINB0);
- 298:	c0 9a       	sbi	0x18, 0	; 24
+ 25a:	81 f4       	brne	.+32     	; 0x27c <__vector_9+0x44>
+		if(pwm_led > 50) {
+ 25c:	80 91 64 00 	lds	r24, 0x0064
+ 260:	90 91 65 00 	lds	r25, 0x0065
+ 264:	83 33       	cpi	r24, 0x33	; 51
+ 266:	91 05       	cpc	r25, r1
+ 268:	b4 f1       	brlt	.+108    	; 0x2d6 <__vector_9+0x9e>
+			PORTB ^= (1<<PINB0);
+ 26a:	98 b3       	in	r25, 0x18	; 24
+ 26c:	81 e0       	ldi	r24, 0x01	; 1
+ 26e:	89 27       	eor	r24, r25
+ 270:	88 bb       	out	0x18, r24	; 24
+			pwm_led = 0;
+ 272:	10 92 65 00 	sts	0x0065, r1
+ 276:	10 92 64 00 	sts	0x0064, r1
+ 27a:	2d c0       	rjmp	.+90     	; 0x2d6 <__vector_9+0x9e>
+		}					
+	} else if(status == ACTIVE) {
+ 27c:	80 91 62 00 	lds	r24, 0x0062
+ 280:	90 91 63 00 	lds	r25, 0x0063
+ 284:	83 30       	cpi	r24, 0x03	; 3
+ 286:	91 05       	cpc	r25, r1
+ 288:	81 f4       	brne	.+32     	; 0x2aa <__vector_9+0x72>
+		if(pwm_led > 5) {
+ 28a:	80 91 64 00 	lds	r24, 0x0064
+ 28e:	90 91 65 00 	lds	r25, 0x0065
+ 292:	86 30       	cpi	r24, 0x06	; 6
+ 294:	91 05       	cpc	r25, r1
+ 296:	fc f0       	brlt	.+62     	; 0x2d6 <__vector_9+0x9e>
+			PORTB ^= (1<<PINB0);
+ 298:	98 b3       	in	r25, 0x18	; 24
+ 29a:	81 e0       	ldi	r24, 0x01	; 1
+ 29c:	89 27       	eor	r24, r25
+ 29e:	88 bb       	out	0x18, r24	; 24
+			pwm_led = 0;
+ 2a0:	10 92 65 00 	sts	0x0065, r1
+ 2a4:	10 92 64 00 	sts	0x0064, r1
+ 2a8:	16 c0       	rjmp	.+44     	; 0x2d6 <__vector_9+0x9e>
+		}
+	} else if(status == RUN) {
+ 2aa:	80 91 62 00 	lds	r24, 0x0062
+ 2ae:	90 91 63 00 	lds	r25, 0x0063
+ 2b2:	86 30       	cpi	r24, 0x06	; 6
+ 2b4:	91 05       	cpc	r25, r1
+ 2b6:	79 f4       	brne	.+30     	; 0x2d6 <__vector_9+0x9e>
+		if(pwm_led > 1) {
+ 2b8:	80 91 64 00 	lds	r24, 0x0064
+ 2bc:	90 91 65 00 	lds	r25, 0x0065
+ 2c0:	82 30       	cpi	r24, 0x02	; 2
+ 2c2:	91 05       	cpc	r25, r1
+ 2c4:	44 f0       	brlt	.+16     	; 0x2d6 <__vector_9+0x9e>
+			PORTB ^= (1<<PINB0);
+ 2c6:	98 b3       	in	r25, 0x18	; 24
+ 2c8:	81 e0       	ldi	r24, 0x01	; 1
+ 2ca:	89 27       	eor	r24, r25
+ 2cc:	88 bb       	out	0x18, r24	; 24
+			pwm_led = 0;
+ 2ce:	10 92 65 00 	sts	0x0065, r1
+ 2d2:	10 92 64 00 	sts	0x0064, r1
 		}
-		pwm_led = 0;
- 29a:	10 92 65 00 	sts	0x0065, r1
- 29e:	10 92 64 00 	sts	0x0064, r1
 	}
+	pwm_led++;	
+ 2d6:	80 91 64 00 	lds	r24, 0x0064
+ 2da:	90 91 65 00 	lds	r25, 0x0065
+ 2de:	01 96       	adiw	r24, 0x01	; 1
+ 2e0:	90 93 65 00 	sts	0x0065, r25
+ 2e4:	80 93 64 00 	sts	0x0064, r24
 	
 	DDRB |= (1<<PB1);
- 2a2:	b9 9a       	sbi	0x17, 1	; 23
+ 2e8:	b9 9a       	sbi	0x17, 1	; 23
 	PORTB |= (1<<PB1);
- 2a4:	c1 9a       	sbi	0x18, 1	; 24
+ 2ea:	c1 9a       	sbi	0x18, 1	; 24
 	#else
 		//round up by default
 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
 	#endif
 
 	__builtin_avr_delay_cycles(__ticks_dc);
- 2a6:	8f ea       	ldi	r24, 0xAF	; 175
- 2a8:	94 e0       	ldi	r25, 0x04	; 4
- 2aa:	01 97       	sbiw	r24, 0x01	; 1
- 2ac:	f1 f7       	brne	.-4      	; 0x2aa <__vector_9+0xbe>
- 2ae:	00 c0       	rjmp	.+0      	; 0x2b0 <__vector_9+0xc4>
- 2b0:	00 00       	nop
+ 2ec:	8f ea       	ldi	r24, 0xAF	; 175
+ 2ee:	94 e0       	ldi	r25, 0x04	; 4
+ 2f0:	01 97       	sbiw	r24, 0x01	; 1
+ 2f2:	f1 f7       	brne	.-4      	; 0x2f0 <__vector_9+0xb8>
+ 2f4:	00 c0       	rjmp	.+0      	; 0x2f6 <__vector_9+0xbe>
+ 2f6:	00 00       	nop
 	_delay_us(LEFT);
 	for(int i=0;i<servopos;i++) {
- 2b2:	80 91 60 00 	lds	r24, 0x0060
- 2b6:	90 91 61 00 	lds	r25, 0x0061
- 2ba:	18 16       	cp	r1, r24
- 2bc:	19 06       	cpc	r1, r25
- 2be:	74 f4       	brge	.+28     	; 0x2dc <__vector_9+0xf0>
- 2c0:	80 e0       	ldi	r24, 0x00	; 0
- 2c2:	90 e0       	ldi	r25, 0x00	; 0
- 2c4:	25 e1       	ldi	r18, 0x15	; 21
- 2c6:	2a 95       	dec	r18
- 2c8:	f1 f7       	brne	.-4      	; 0x2c6 <__vector_9+0xda>
- 2ca:	00 00       	nop
- 2cc:	01 96       	adiw	r24, 0x01	; 1
- 2ce:	20 91 60 00 	lds	r18, 0x0060
- 2d2:	30 91 61 00 	lds	r19, 0x0061
- 2d6:	82 17       	cp	r24, r18
- 2d8:	93 07       	cpc	r25, r19
- 2da:	a4 f3       	brlt	.-24     	; 0x2c4 <__vector_9+0xd8>
+ 2f8:	80 91 60 00 	lds	r24, 0x0060
+ 2fc:	90 91 61 00 	lds	r25, 0x0061
+ 300:	18 16       	cp	r1, r24
+ 302:	19 06       	cpc	r1, r25
+ 304:	74 f4       	brge	.+28     	; 0x322 <__vector_9+0xea>
+ 306:	80 e0       	ldi	r24, 0x00	; 0
+ 308:	90 e0       	ldi	r25, 0x00	; 0
+ 30a:	25 e1       	ldi	r18, 0x15	; 21
+ 30c:	2a 95       	dec	r18
+ 30e:	f1 f7       	brne	.-4      	; 0x30c <__vector_9+0xd4>
+ 310:	00 00       	nop
+ 312:	01 96       	adiw	r24, 0x01	; 1
+ 314:	20 91 60 00 	lds	r18, 0x0060
+ 318:	30 91 61 00 	lds	r19, 0x0061
+ 31c:	82 17       	cp	r24, r18
+ 31e:	93 07       	cpc	r25, r19
+ 320:	a4 f3       	brlt	.-24     	; 0x30a <__vector_9+0xd2>
 		_delay_us(STEP);
 	}
 	PORTB &= ~(1<<PB1);
- 2dc:	c1 98       	cbi	0x18, 1	; 24
+ 322:	c1 98       	cbi	0x18, 1	; 24
 }
- 2de:	9f 91       	pop	r25
- 2e0:	8f 91       	pop	r24
- 2e2:	3f 91       	pop	r19
- 2e4:	2f 91       	pop	r18
- 2e6:	0f 90       	pop	r0
- 2e8:	0f be       	out	0x3f, r0	; 63
- 2ea:	0f 90       	pop	r0
- 2ec:	1f 90       	pop	r1
- 2ee:	18 95       	reti
-	} else if(status == RUN) {
-		if(pwm_led > 1)
-			led = 1;
-	}
-	
-	pwm_led++;
- 2f0:	80 91 64 00 	lds	r24, 0x0064
- 2f4:	90 91 65 00 	lds	r25, 0x0065
- 2f8:	01 96       	adiw	r24, 0x01	; 1
- 2fa:	90 93 65 00 	sts	0x0065, r25
- 2fe:	80 93 64 00 	sts	0x0064, r24
- 302:	cf cf       	rjmp	.-98     	; 0x2a2 <__vector_9+0xb6>
+ 324:	9f 91       	pop	r25
+ 326:	8f 91       	pop	r24
+ 328:	3f 91       	pop	r19
+ 32a:	2f 91       	pop	r18
+ 32c:	0f 90       	pop	r0
+ 32e:	0f be       	out	0x3f, r0	; 63
+ 330:	0f 90       	pop	r0
+ 332:	1f 90       	pop	r1
+ 334:	18 95       	reti
 
-00000304 <main>:
-}
+00000336 <main>:
 
 int main(void)
 {
 	
 	rf12_init();					// ein paar Register setzen (z.B. CLK auf 10MHz)
- 304:	0e 94 b4 01 	call	0x368	; 0x368 <rf12_init>
+ 336:	0e 94 ce 01 	call	0x39c	; 0x39c <rf12_init>
 	rf12_setfreq(RF12FREQ(433.92));	// Sende/Empfangsfrequenz auf 433,92MHz einstellen
- 308:	80 e2       	ldi	r24, 0x20	; 32
- 30a:	96 e0       	ldi	r25, 0x06	; 6
- 30c:	0e 94 fc 01 	call	0x3f8	; 0x3f8 <rf12_setfreq>
+ 33a:	80 e2       	ldi	r24, 0x20	; 32
+ 33c:	96 e0       	ldi	r25, 0x06	; 6
+ 33e:	0e 94 16 02 	call	0x42c	; 0x42c <rf12_setfreq>
 	rf12_setbandwidth(1, 0, 7);		// 400kHz Bandbreite, 0dB Verstärkung, DRSSI threshold: -61dBm
- 310:	81 e0       	ldi	r24, 0x01	; 1
- 312:	60 e0       	ldi	r22, 0x00	; 0
- 314:	47 e0       	ldi	r20, 0x07	; 7
- 316:	0e 94 de 01 	call	0x3bc	; 0x3bc <rf12_setbandwidth>
+ 342:	81 e0       	ldi	r24, 0x01	; 1
+ 344:	60 e0       	ldi	r22, 0x00	; 0
+ 346:	47 e0       	ldi	r20, 0x07	; 7
+ 348:	0e 94 f8 01 	call	0x3f0	; 0x3f0 <rf12_setbandwidth>
 	rf12_setbaud(9600);				// 19200 baud
- 31a:	80 e8       	ldi	r24, 0x80	; 128
- 31c:	95 e2       	ldi	r25, 0x25	; 37
- 31e:	0e 94 0c 02 	call	0x418	; 0x418 <rf12_setbaud>
+ 34c:	80 e8       	ldi	r24, 0x80	; 128
+ 34e:	95 e2       	ldi	r25, 0x25	; 37
+ 350:	0e 94 26 02 	call	0x44c	; 0x44c <rf12_setbaud>
 	rf12_setpower(0, 6);			// 1mW Ausgangsleistung, 120kHz Frequenzshift
- 322:	80 e0       	ldi	r24, 0x00	; 0
- 324:	66 e0       	ldi	r22, 0x06	; 6
- 326:	0e 94 33 02 	call	0x466	; 0x466 <rf12_setpower>
+ 354:	80 e0       	ldi	r24, 0x00	; 0
+ 356:	66 e0       	ldi	r22, 0x06	; 6
+ 358:	0e 94 4d 02 	call	0x49a	; 0x49a <rf12_setpower>
 		
 	init_timer();
- 32a:	0e 94 ee 00 	call	0x1dc	; 0x1dc <init_timer>
+ 35c:	0e 94 14 01 	call	0x228	; 0x228 <init_timer>
+	DDRB |= (1<<PINB0);
+ 360:	b8 9a       	sbi	0x17, 0	; 23
 	sei();
- 32e:	78 94       	sei
+ 362:	78 94       	sei
 	
 	//DDRB |= (1<<PINB0);
     while(1)
     {
 		recive();
- 330:	0e 94 95 00 	call	0x12a	; 0x12a <recive>
- 334:	fd cf       	rjmp	.-6      	; 0x330 <main+0x2c>
+ 364:	0e 94 b6 00 	call	0x16c	; 0x16c <recive>
+ 368:	fd cf       	rjmp	.-6      	; 0x364 <main+0x2e>
 
-00000336 <rf12_trans>:
+0000036a <rf12_trans>:
 unsigned short rf12_trans(unsigned short wert)
 {	
 	unsigned short werti = 0;
 	unsigned char i;
 	
 	RF_PORT &= ~(1<<CS);
- 336:	94 98       	cbi	0x12, 4	; 18
- 338:	40 e1       	ldi	r20, 0x10	; 16
+ 36a:	94 98       	cbi	0x12, 4	; 18
+ 36c:	40 e1       	ldi	r20, 0x10	; 16
 #include "rf12.h"
 #include <util/delay.h>
 
 unsigned short rf12_trans(unsigned short wert)
 {	
 	unsigned short werti = 0;
- 33a:	20 e0       	ldi	r18, 0x00	; 0
- 33c:	30 e0       	ldi	r19, 0x00	; 0
+ 36e:	20 e0       	ldi	r18, 0x00	; 0
+ 370:	30 e0       	ldi	r19, 0x00	; 0
 	unsigned char i;
 	
 	RF_PORT &= ~(1<<CS);
 	for (i=0; i<16; i++)
 	{	
 		if (wert&32768) {
- 33e:	99 23       	and	r25, r25
- 340:	14 f4       	brge	.+4      	; 0x346 <rf12_trans+0x10>
+ 372:	99 23       	and	r25, r25
+ 374:	14 f4       	brge	.+4      	; 0x37a <rf12_trans+0x10>
 			RF_PORT |= (1<<SDI);
- 342:	96 9a       	sbi	0x12, 6	; 18
- 344:	01 c0       	rjmp	.+2      	; 0x348 <rf12_trans+0x12>
+ 376:	96 9a       	sbi	0x12, 6	; 18
+ 378:	01 c0       	rjmp	.+2      	; 0x37c <rf12_trans+0x12>
 		}		
 		else {
 			RF_PORT &= ~(1<<SDI);
- 346:	96 98       	cbi	0x12, 6	; 18
+ 37a:	96 98       	cbi	0x12, 6	; 18
 		}			
 		werti<<=1;
- 348:	22 0f       	add	r18, r18
- 34a:	33 1f       	adc	r19, r19
+ 37c:	22 0f       	add	r18, r18
+ 37e:	33 1f       	adc	r19, r19
 		if (RF_PIN & (1<<SDO)) {
- 34c:	83 99       	sbic	0x10, 3	; 16
+ 380:	83 99       	sbic	0x10, 3	; 16
 			werti|=1;
- 34e:	21 60       	ori	r18, 0x01	; 1
+ 382:	21 60       	ori	r18, 0x01	; 1
 		}		
 		RF_PORT |= (1<<SCK);
- 350:	95 9a       	sbi	0x12, 5	; 18
+ 384:	95 9a       	sbi	0x12, 5	; 18
 		wert<<=1;
- 352:	88 0f       	add	r24, r24
- 354:	99 1f       	adc	r25, r25
- 356:	00 c0       	rjmp	.+0      	; 0x358 <rf12_trans+0x22>
- 358:	00 00       	nop
+ 386:	88 0f       	add	r24, r24
+ 388:	99 1f       	adc	r25, r25
+ 38a:	00 c0       	rjmp	.+0      	; 0x38c <rf12_trans+0x22>
+ 38c:	00 00       	nop
 		_delay_us(0.3);
 		RF_PORT &= ~(1<<SCK);
- 35a:	95 98       	cbi	0x12, 5	; 18
- 35c:	41 50       	subi	r20, 0x01	; 1
+ 38e:	95 98       	cbi	0x12, 5	; 18
+ 390:	41 50       	subi	r20, 0x01	; 1
 {	
 	unsigned short werti = 0;
 	unsigned char i;
 	
 	RF_PORT &= ~(1<<CS);
 	for (i=0; i<16; i++)
- 35e:	79 f7       	brne	.-34     	; 0x33e <rf12_trans+0x8>
+ 392:	79 f7       	brne	.-34     	; 0x372 <rf12_trans+0x8>
 		RF_PORT |= (1<<SCK);
 		wert<<=1;
 		_delay_us(0.3);
 		RF_PORT &= ~(1<<SCK);
 	}
 	RF_PORT |= (1<<CS);
- 360:	94 9a       	sbi	0x12, 4	; 18
+ 394:	94 9a       	sbi	0x12, 4	; 18
 	return werti;
 }
- 362:	82 2f       	mov	r24, r18
- 364:	93 2f       	mov	r25, r19
- 366:	08 95       	ret
+ 396:	82 2f       	mov	r24, r18
+ 398:	93 2f       	mov	r25, r19
+ 39a:	08 95       	ret
 
-00000368 <rf12_init>:
+0000039c <rf12_init>:
 
 void rf12_init(void)
 {
 	RF_DDR |= (1<<SDI) | (1<<SCK) | (1<<CS);
- 368:	81 b3       	in	r24, 0x11	; 17
- 36a:	80 67       	ori	r24, 0x70	; 112
- 36c:	81 bb       	out	0x11, r24	; 17
+ 39c:	81 b3       	in	r24, 0x11	; 17
+ 39e:	80 67       	ori	r24, 0x70	; 112
+ 3a0:	81 bb       	out	0x11, r24	; 17
 	RF_PORT |= (1<<CS);
- 36e:	94 9a       	sbi	0x12, 4	; 18
+ 3a2:	94 9a       	sbi	0x12, 4	; 18
 	#else
 		//round up by default
 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
 	#endif
 
 	__builtin_avr_delay_cycles(__ticks_dc);
- 370:	8f ef       	ldi	r24, 0xFF	; 255
- 372:	90 e7       	ldi	r25, 0x70	; 112
- 374:	a2 e0       	ldi	r26, 0x02	; 2
- 376:	81 50       	subi	r24, 0x01	; 1
- 378:	90 40       	sbci	r25, 0x00	; 0
- 37a:	a0 40       	sbci	r26, 0x00	; 0
- 37c:	e1 f7       	brne	.-8      	; 0x376 <rf12_init+0xe>
- 37e:	00 c0       	rjmp	.+0      	; 0x380 <rf12_init+0x18>
- 380:	00 00       	nop
+ 3a4:	8f ef       	ldi	r24, 0xFF	; 255
+ 3a6:	90 e7       	ldi	r25, 0x70	; 112
+ 3a8:	a2 e0       	ldi	r26, 0x02	; 2
+ 3aa:	81 50       	subi	r24, 0x01	; 1
+ 3ac:	90 40       	sbci	r25, 0x00	; 0
+ 3ae:	a0 40       	sbci	r26, 0x00	; 0
+ 3b0:	e1 f7       	brne	.-8      	; 0x3aa <rf12_init+0xe>
+ 3b2:	00 c0       	rjmp	.+0      	; 0x3b4 <rf12_init+0x18>
+ 3b4:	00 00       	nop
 
 	_delay_ms(100);
 
 	rf12_trans(0xC0E0);			// AVR CLK: 10MHz
- 382:	80 ee       	ldi	r24, 0xE0	; 224
- 384:	90 ec       	ldi	r25, 0xC0	; 192
- 386:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3b6:	80 ee       	ldi	r24, 0xE0	; 224
+ 3b8:	90 ec       	ldi	r25, 0xC0	; 192
+ 3ba:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0x80D7);			// Enable FIFO
- 38a:	87 ed       	ldi	r24, 0xD7	; 215
- 38c:	90 e8       	ldi	r25, 0x80	; 128
- 38e:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3be:	87 ed       	ldi	r24, 0xD7	; 215
+ 3c0:	90 e8       	ldi	r25, 0x80	; 128
+ 3c2:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xC2AB);			// Data Filter: internal
- 392:	8b ea       	ldi	r24, 0xAB	; 171
- 394:	92 ec       	ldi	r25, 0xC2	; 194
- 396:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3c6:	8b ea       	ldi	r24, 0xAB	; 171
+ 3c8:	92 ec       	ldi	r25, 0xC2	; 194
+ 3ca:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xCA81);			// Set FIFO mode
- 39a:	81 e8       	ldi	r24, 0x81	; 129
- 39c:	9a ec       	ldi	r25, 0xCA	; 202
- 39e:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3ce:	81 e8       	ldi	r24, 0x81	; 129
+ 3d0:	9a ec       	ldi	r25, 0xCA	; 202
+ 3d2:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xE000);			// disable wakeuptimer
- 3a2:	80 e0       	ldi	r24, 0x00	; 0
- 3a4:	90 ee       	ldi	r25, 0xE0	; 224
- 3a6:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3d6:	80 e0       	ldi	r24, 0x00	; 0
+ 3d8:	90 ee       	ldi	r25, 0xE0	; 224
+ 3da:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xC800);			// disable low duty cycle
- 3aa:	80 e0       	ldi	r24, 0x00	; 0
- 3ac:	98 ec       	ldi	r25, 0xC8	; 200
- 3ae:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3de:	80 e0       	ldi	r24, 0x00	; 0
+ 3e0:	98 ec       	ldi	r25, 0xC8	; 200
+ 3e2:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xC4F7);			// AFC settings: autotuning: -10kHz...+7,5kHz
- 3b2:	87 ef       	ldi	r24, 0xF7	; 247
- 3b4:	94 ec       	ldi	r25, 0xC4	; 196
- 3b6:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3e6:	87 ef       	ldi	r24, 0xF7	; 247
+ 3e8:	94 ec       	ldi	r25, 0xC4	; 196
+ 3ea:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 3ba:	08 95       	ret
+ 3ee:	08 95       	ret
 
-000003bc <rf12_setbandwidth>:
+000003f0 <rf12_setbandwidth>:
 
 void rf12_setbandwidth(unsigned char bandwidth, unsigned char gain, unsigned char drssi)
 {
 	rf12_trans(0x9400|((bandwidth&7)<<5)|((gain&3)<<3)|(drssi&7));
- 3bc:	90 e0       	ldi	r25, 0x00	; 0
- 3be:	88 0f       	add	r24, r24
- 3c0:	99 1f       	adc	r25, r25
- 3c2:	82 95       	swap	r24
- 3c4:	92 95       	swap	r25
- 3c6:	90 7f       	andi	r25, 0xF0	; 240
- 3c8:	98 27       	eor	r25, r24
- 3ca:	80 7f       	andi	r24, 0xF0	; 240
- 3cc:	98 27       	eor	r25, r24
- 3ce:	90 70       	andi	r25, 0x00	; 0
- 3d0:	50 e0       	ldi	r21, 0x00	; 0
- 3d2:	47 70       	andi	r20, 0x07	; 7
- 3d4:	50 70       	andi	r21, 0x00	; 0
- 3d6:	84 2b       	or	r24, r20
- 3d8:	95 2b       	or	r25, r21
- 3da:	94 69       	ori	r25, 0x94	; 148
- 3dc:	70 e0       	ldi	r23, 0x00	; 0
- 3de:	63 70       	andi	r22, 0x03	; 3
- 3e0:	70 70       	andi	r23, 0x00	; 0
- 3e2:	66 0f       	add	r22, r22
- 3e4:	77 1f       	adc	r23, r23
- 3e6:	66 0f       	add	r22, r22
- 3e8:	77 1f       	adc	r23, r23
- 3ea:	66 0f       	add	r22, r22
- 3ec:	77 1f       	adc	r23, r23
- 3ee:	86 2b       	or	r24, r22
- 3f0:	97 2b       	or	r25, r23
- 3f2:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 3f0:	90 e0       	ldi	r25, 0x00	; 0
+ 3f2:	88 0f       	add	r24, r24
+ 3f4:	99 1f       	adc	r25, r25
+ 3f6:	82 95       	swap	r24
+ 3f8:	92 95       	swap	r25
+ 3fa:	90 7f       	andi	r25, 0xF0	; 240
+ 3fc:	98 27       	eor	r25, r24
+ 3fe:	80 7f       	andi	r24, 0xF0	; 240
+ 400:	98 27       	eor	r25, r24
+ 402:	90 70       	andi	r25, 0x00	; 0
+ 404:	50 e0       	ldi	r21, 0x00	; 0
+ 406:	47 70       	andi	r20, 0x07	; 7
+ 408:	50 70       	andi	r21, 0x00	; 0
+ 40a:	84 2b       	or	r24, r20
+ 40c:	95 2b       	or	r25, r21
+ 40e:	94 69       	ori	r25, 0x94	; 148
+ 410:	70 e0       	ldi	r23, 0x00	; 0
+ 412:	63 70       	andi	r22, 0x03	; 3
+ 414:	70 70       	andi	r23, 0x00	; 0
+ 416:	66 0f       	add	r22, r22
+ 418:	77 1f       	adc	r23, r23
+ 41a:	66 0f       	add	r22, r22
+ 41c:	77 1f       	adc	r23, r23
+ 41e:	66 0f       	add	r22, r22
+ 420:	77 1f       	adc	r23, r23
+ 422:	86 2b       	or	r24, r22
+ 424:	97 2b       	or	r25, r23
+ 426:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 3f6:	08 95       	ret
+ 42a:	08 95       	ret
 
-000003f8 <rf12_setfreq>:
+0000042c <rf12_setfreq>:
 
 void rf12_setfreq(unsigned short freq)
 {	
 	if (freq<96) {				// 430,2400MHz
- 3f8:	80 36       	cpi	r24, 0x60	; 96
- 3fa:	91 05       	cpc	r25, r1
- 3fc:	38 f0       	brcs	.+14     	; 0x40c <rf12_setfreq+0x14>
- 3fe:	2f e0       	ldi	r18, 0x0F	; 15
- 400:	80 34       	cpi	r24, 0x40	; 64
- 402:	92 07       	cpc	r25, r18
- 404:	28 f0       	brcs	.+10     	; 0x410 <rf12_setfreq+0x18>
- 406:	8f e3       	ldi	r24, 0x3F	; 63
- 408:	9f e0       	ldi	r25, 0x0F	; 15
- 40a:	02 c0       	rjmp	.+4      	; 0x410 <rf12_setfreq+0x18>
+ 42c:	80 36       	cpi	r24, 0x60	; 96
+ 42e:	91 05       	cpc	r25, r1
+ 430:	38 f0       	brcs	.+14     	; 0x440 <rf12_setfreq+0x14>
+ 432:	2f e0       	ldi	r18, 0x0F	; 15
+ 434:	80 34       	cpi	r24, 0x40	; 64
+ 436:	92 07       	cpc	r25, r18
+ 438:	28 f0       	brcs	.+10     	; 0x444 <rf12_setfreq+0x18>
+ 43a:	8f e3       	ldi	r24, 0x3F	; 63
+ 43c:	9f e0       	ldi	r25, 0x0F	; 15
+ 43e:	02 c0       	rjmp	.+4      	; 0x444 <rf12_setfreq+0x18>
 		freq=96;
- 40c:	80 e6       	ldi	r24, 0x60	; 96
- 40e:	90 e0       	ldi	r25, 0x00	; 0
+ 440:	80 e6       	ldi	r24, 0x60	; 96
+ 442:	90 e0       	ldi	r25, 0x00	; 0
 	} else if (freq>3903) {		// 439,7575MHz
 		freq=3903;
 	}	
 	rf12_trans(0xA000|freq);
- 410:	90 6a       	ori	r25, 0xA0	; 160
- 412:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 444:	90 6a       	ori	r25, 0xA0	; 160
+ 446:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 416:	08 95       	ret
+ 44a:	08 95       	ret
 
-00000418 <rf12_setbaud>:
+0000044c <rf12_setbaud>:
 
 void rf12_setbaud(unsigned short baud)
 {
 	if (baud<663) {
- 418:	22 e0       	ldi	r18, 0x02	; 2
- 41a:	87 39       	cpi	r24, 0x97	; 151
- 41c:	92 07       	cpc	r25, r18
- 41e:	10 f1       	brcs	.+68     	; 0x464 <__stack+0x5>
+ 44c:	22 e0       	ldi	r18, 0x02	; 2
+ 44e:	87 39       	cpi	r24, 0x97	; 151
+ 450:	92 07       	cpc	r25, r18
+ 452:	10 f1       	brcs	.+68     	; 0x498 <__stack+0x39>
 		return;
 	}	
 	if (baud<5400) {				// Baudrate= 344827,58621/(R+1)/(1+CS*7)
- 420:	25 e1       	ldi	r18, 0x15	; 21
- 422:	88 31       	cpi	r24, 0x18	; 24
- 424:	92 07       	cpc	r25, r18
- 426:	80 f4       	brcc	.+32     	; 0x448 <rf12_setbaud+0x30>
+ 454:	25 e1       	ldi	r18, 0x15	; 21
+ 456:	88 31       	cpi	r24, 0x18	; 24
+ 458:	92 07       	cpc	r25, r18
+ 45a:	80 f4       	brcc	.+32     	; 0x47c <__stack+0x1d>
 		rf12_trans(0xC680|((43104/baud)-1));
- 428:	9c 01       	movw	r18, r24
- 42a:	40 e0       	ldi	r20, 0x00	; 0
- 42c:	50 e0       	ldi	r21, 0x00	; 0
- 42e:	60 e6       	ldi	r22, 0x60	; 96
- 430:	78 ea       	ldi	r23, 0xA8	; 168
- 432:	80 e0       	ldi	r24, 0x00	; 0
- 434:	90 e0       	ldi	r25, 0x00	; 0
- 436:	0e 94 54 03 	call	0x6a8	; 0x6a8 <__divmodsi4>
- 43a:	c9 01       	movw	r24, r18
- 43c:	01 97       	sbiw	r24, 0x01	; 1
- 43e:	80 68       	ori	r24, 0x80	; 128
- 440:	96 6c       	ori	r25, 0xC6	; 198
- 442:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
- 446:	08 95       	ret
+ 45c:	9c 01       	movw	r18, r24
+ 45e:	40 e0       	ldi	r20, 0x00	; 0
+ 460:	50 e0       	ldi	r21, 0x00	; 0
+ 462:	60 e6       	ldi	r22, 0x60	; 96
+ 464:	78 ea       	ldi	r23, 0xA8	; 168
+ 466:	80 e0       	ldi	r24, 0x00	; 0
+ 468:	90 e0       	ldi	r25, 0x00	; 0
+ 46a:	0e 94 6e 03 	call	0x6dc	; 0x6dc <__divmodsi4>
+ 46e:	c9 01       	movw	r24, r18
+ 470:	01 97       	sbiw	r24, 0x01	; 1
+ 472:	80 68       	ori	r24, 0x80	; 128
+ 474:	96 6c       	ori	r25, 0xC6	; 198
+ 476:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
+ 47a:	08 95       	ret
 	} else {
 		rf12_trans(0xC600|((344828UL/baud)-1));
- 448:	9c 01       	movw	r18, r24
- 44a:	40 e0       	ldi	r20, 0x00	; 0
- 44c:	50 e0       	ldi	r21, 0x00	; 0
- 44e:	6c ef       	ldi	r22, 0xFC	; 252
- 450:	72 e4       	ldi	r23, 0x42	; 66
- 452:	85 e0       	ldi	r24, 0x05	; 5
- 454:	90 e0       	ldi	r25, 0x00	; 0
- 456:	0e 94 32 03 	call	0x664	; 0x664 <__udivmodsi4>
- 45a:	c9 01       	movw	r24, r18
- 45c:	01 97       	sbiw	r24, 0x01	; 1
- 45e:	96 6c       	ori	r25, 0xC6	; 198
- 460:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
- 464:	08 95       	ret
+ 47c:	9c 01       	movw	r18, r24
+ 47e:	40 e0       	ldi	r20, 0x00	; 0
+ 480:	50 e0       	ldi	r21, 0x00	; 0
+ 482:	6c ef       	ldi	r22, 0xFC	; 252
+ 484:	72 e4       	ldi	r23, 0x42	; 66
+ 486:	85 e0       	ldi	r24, 0x05	; 5
+ 488:	90 e0       	ldi	r25, 0x00	; 0
+ 48a:	0e 94 4c 03 	call	0x698	; 0x698 <__udivmodsi4>
+ 48e:	c9 01       	movw	r24, r18
+ 490:	01 97       	sbiw	r24, 0x01	; 1
+ 492:	96 6c       	ori	r25, 0xC6	; 198
+ 494:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
+ 498:	08 95       	ret
 
-00000466 <rf12_setpower>:
+0000049a <rf12_setpower>:
 	}	
 }
 
 void rf12_setpower(unsigned char power, unsigned char mod)
 {
 	rf12_trans(0x9800|(power&7)|((mod&15)<<4));
- 466:	90 e0       	ldi	r25, 0x00	; 0
- 468:	87 70       	andi	r24, 0x07	; 7
- 46a:	90 70       	andi	r25, 0x00	; 0
- 46c:	98 69       	ori	r25, 0x98	; 152
- 46e:	70 e0       	ldi	r23, 0x00	; 0
- 470:	62 95       	swap	r22
- 472:	72 95       	swap	r23
- 474:	70 7f       	andi	r23, 0xF0	; 240
- 476:	76 27       	eor	r23, r22
- 478:	60 7f       	andi	r22, 0xF0	; 240
- 47a:	76 27       	eor	r23, r22
- 47c:	70 70       	andi	r23, 0x00	; 0
- 47e:	86 2b       	or	r24, r22
- 480:	97 2b       	or	r25, r23
- 482:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 49a:	90 e0       	ldi	r25, 0x00	; 0
+ 49c:	87 70       	andi	r24, 0x07	; 7
+ 49e:	90 70       	andi	r25, 0x00	; 0
+ 4a0:	98 69       	ori	r25, 0x98	; 152
+ 4a2:	70 e0       	ldi	r23, 0x00	; 0
+ 4a4:	62 95       	swap	r22
+ 4a6:	72 95       	swap	r23
+ 4a8:	70 7f       	andi	r23, 0xF0	; 240
+ 4aa:	76 27       	eor	r23, r22
+ 4ac:	60 7f       	andi	r22, 0xF0	; 240
+ 4ae:	76 27       	eor	r23, r22
+ 4b0:	70 70       	andi	r23, 0x00	; 0
+ 4b2:	86 2b       	or	r24, r22
+ 4b4:	97 2b       	or	r25, r23
+ 4b6:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 486:	08 95       	ret
+ 4ba:	08 95       	ret
 
-00000488 <rf12_ready>:
+000004bc <rf12_ready>:
 
 void rf12_ready(void)
 {	
 	RF_PORT &= ~(1<<CS);
- 488:	94 98       	cbi	0x12, 4	; 18
+ 4bc:	94 98       	cbi	0x12, 4	; 18
 	while (!(RF_PIN & (1<<SDO))); // wait until FIFO ready
- 48a:	83 9b       	sbis	0x10, 3	; 16
- 48c:	fe cf       	rjmp	.-4      	; 0x48a <rf12_ready+0x2>
+ 4be:	83 9b       	sbis	0x10, 3	; 16
+ 4c0:	fe cf       	rjmp	.-4      	; 0x4be <rf12_ready+0x2>
 }
- 48e:	08 95       	ret
+ 4c2:	08 95       	ret
 
-00000490 <rf12_beginasyncrx>:
+000004c4 <rf12_beginasyncrx>:
 
 void rf12_beginasyncrx() {
 	rf12_trans(0x82C8);			// RX on
- 490:	88 ec       	ldi	r24, 0xC8	; 200
- 492:	92 e8       	ldi	r25, 0x82	; 130
- 494:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 4c4:	88 ec       	ldi	r24, 0xC8	; 200
+ 4c6:	92 e8       	ldi	r25, 0x82	; 130
+ 4c8:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xCA81);			// set FIFO mode
- 498:	81 e8       	ldi	r24, 0x81	; 129
- 49a:	9a ec       	ldi	r25, 0xCA	; 202
- 49c:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 4cc:	81 e8       	ldi	r24, 0x81	; 129
+ 4ce:	9a ec       	ldi	r25, 0xCA	; 202
+ 4d0:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xCA83);			// enable FIFO
- 4a0:	83 e8       	ldi	r24, 0x83	; 131
- 4a2:	9a ec       	ldi	r25, 0xCA	; 202
- 4a4:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 4d4:	83 e8       	ldi	r24, 0x83	; 131
+ 4d6:	9a ec       	ldi	r25, 0xCA	; 202
+ 4d8:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 4a8:	08 95       	ret
+ 4dc:	08 95       	ret
 
-000004aa <rf12_hasdata>:
+000004de <rf12_hasdata>:
 uint8_t rf12_hasdata() {
 	RF_PORT &= ~(1<<CS);
- 4aa:	94 98       	cbi	0x12, 4	; 18
+ 4de:	94 98       	cbi	0x12, 4	; 18
 	return !(RF_PIN & (1<<SDO));
- 4ac:	81 e0       	ldi	r24, 0x01	; 1
- 4ae:	83 99       	sbic	0x10, 3	; 16
- 4b0:	80 e0       	ldi	r24, 0x00	; 0
+ 4e0:	81 e0       	ldi	r24, 0x01	; 1
+ 4e2:	83 99       	sbic	0x10, 3	; 16
+ 4e4:	80 e0       	ldi	r24, 0x00	; 0
 }
- 4b2:	08 95       	ret
+ 4e6:	08 95       	ret
 
-000004b4 <rf12_rxbyte>:
+000004e8 <rf12_rxbyte>:
 uint8_t rf12_rxbyte() {
 	return rf12_trans(0xB000);
- 4b4:	80 e0       	ldi	r24, 0x00	; 0
- 4b6:	90 eb       	ldi	r25, 0xB0	; 176
- 4b8:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 4e8:	80 e0       	ldi	r24, 0x00	; 0
+ 4ea:	90 eb       	ldi	r25, 0xB0	; 176
+ 4ec:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 4bc:	08 95       	ret
+ 4f0:	08 95       	ret
 
-000004be <rf12_endasyncrx>:
+000004f2 <rf12_endasyncrx>:
 void rf12_endasyncrx() {
 	rf12_trans(0x8208);			// RX off
- 4be:	88 e0       	ldi	r24, 0x08	; 8
- 4c0:	92 e8       	ldi	r25, 0x82	; 130
- 4c2:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 4f2:	88 e0       	ldi	r24, 0x08	; 8
+ 4f4:	92 e8       	ldi	r25, 0x82	; 130
+ 4f6:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 4c6:	08 95       	ret
+ 4fa:	08 95       	ret
 
-000004c8 <rf12_txdata>:
+000004fc <rf12_txdata>:
 
 void rf12_txdata(unsigned char *data, unsigned char number)
 {	
- 4c8:	0f 93       	push	r16
- 4ca:	1f 93       	push	r17
- 4cc:	cf 93       	push	r28
- 4ce:	df 93       	push	r29
- 4d0:	8c 01       	movw	r16, r24
- 4d2:	c6 2f       	mov	r28, r22
+ 4fc:	0f 93       	push	r16
+ 4fe:	1f 93       	push	r17
+ 500:	cf 93       	push	r28
+ 502:	df 93       	push	r29
+ 504:	8c 01       	movw	r16, r24
+ 506:	c6 2f       	mov	r28, r22
 	unsigned char i;
 	rf12_trans(0x8238);			// TX on
- 4d4:	88 e3       	ldi	r24, 0x38	; 56
- 4d6:	92 e8       	ldi	r25, 0x82	; 130
- 4d8:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 508:	88 e3       	ldi	r24, 0x38	; 56
+ 50a:	92 e8       	ldi	r25, 0x82	; 130
+ 50c:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 4dc:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 510:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8AA);
- 4e0:	8a ea       	ldi	r24, 0xAA	; 170
- 4e2:	98 eb       	ldi	r25, 0xB8	; 184
- 4e4:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 514:	8a ea       	ldi	r24, 0xAA	; 170
+ 516:	98 eb       	ldi	r25, 0xB8	; 184
+ 518:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 4e8:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 51c:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8AA);
- 4ec:	8a ea       	ldi	r24, 0xAA	; 170
- 4ee:	98 eb       	ldi	r25, 0xB8	; 184
- 4f0:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 520:	8a ea       	ldi	r24, 0xAA	; 170
+ 522:	98 eb       	ldi	r25, 0xB8	; 184
+ 524:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 4f4:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 528:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8AA);
- 4f8:	8a ea       	ldi	r24, 0xAA	; 170
- 4fa:	98 eb       	ldi	r25, 0xB8	; 184
- 4fc:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 52c:	8a ea       	ldi	r24, 0xAA	; 170
+ 52e:	98 eb       	ldi	r25, 0xB8	; 184
+ 530:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 500:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 534:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB82D);
- 504:	8d e2       	ldi	r24, 0x2D	; 45
- 506:	98 eb       	ldi	r25, 0xB8	; 184
- 508:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 538:	8d e2       	ldi	r24, 0x2D	; 45
+ 53a:	98 eb       	ldi	r25, 0xB8	; 184
+ 53c:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 50c:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 540:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8D4);
- 510:	84 ed       	ldi	r24, 0xD4	; 212
- 512:	98 eb       	ldi	r25, 0xB8	; 184
- 514:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 544:	84 ed       	ldi	r24, 0xD4	; 212
+ 546:	98 eb       	ldi	r25, 0xB8	; 184
+ 548:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	for (i=0; i<number; i++)
- 518:	cc 23       	and	r28, r28
- 51a:	99 f0       	breq	.+38     	; 0x542 <rf12_txdata+0x7a>
+ 54c:	cc 23       	and	r28, r28
+ 54e:	99 f0       	breq	.+38     	; 0x576 <rf12_txdata+0x7a>
 }
 void rf12_endasyncrx() {
 	rf12_trans(0x8208);			// RX off
 }
 
 void rf12_txdata(unsigned char *data, unsigned char number)
- 51c:	c8 01       	movw	r24, r16
- 51e:	01 96       	adiw	r24, 0x01	; 1
- 520:	c1 50       	subi	r28, 0x01	; 1
- 522:	9c 01       	movw	r18, r24
- 524:	2c 0f       	add	r18, r28
- 526:	31 1d       	adc	r19, r1
- 528:	e9 01       	movw	r28, r18
+ 550:	c8 01       	movw	r24, r16
+ 552:	01 96       	adiw	r24, 0x01	; 1
+ 554:	c1 50       	subi	r28, 0x01	; 1
+ 556:	9c 01       	movw	r18, r24
+ 558:	2c 0f       	add	r18, r28
+ 55a:	31 1d       	adc	r19, r1
+ 55c:	e9 01       	movw	r28, r18
 	rf12_trans(0xB82D);
 	rf12_ready();
 	rf12_trans(0xB8D4);
 	for (i=0; i<number; i++)
 	{		
 		rf12_ready();
- 52a:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 55e:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 		rf12_trans(0xB800|(*data++));
- 52e:	f8 01       	movw	r30, r16
- 530:	81 91       	ld	r24, Z+
- 532:	8f 01       	movw	r16, r30
- 534:	90 e0       	ldi	r25, 0x00	; 0
- 536:	98 6b       	ori	r25, 0xB8	; 184
- 538:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 562:	f8 01       	movw	r30, r16
+ 564:	81 91       	ld	r24, Z+
+ 566:	8f 01       	movw	r16, r30
+ 568:	90 e0       	ldi	r25, 0x00	; 0
+ 56a:	98 6b       	ori	r25, 0xB8	; 184
+ 56c:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xB8AA);
 	rf12_ready();
 	rf12_trans(0xB82D);
 	rf12_ready();
 	rf12_trans(0xB8D4);
 	for (i=0; i<number; i++)
- 53c:	0c 17       	cp	r16, r28
- 53e:	1d 07       	cpc	r17, r29
- 540:	a1 f7       	brne	.-24     	; 0x52a <rf12_txdata+0x62>
+ 570:	0c 17       	cp	r16, r28
+ 572:	1d 07       	cpc	r17, r29
+ 574:	a1 f7       	brne	.-24     	; 0x55e <rf12_txdata+0x62>
 	{		
 		rf12_ready();
 		rf12_trans(0xB800|(*data++));
 	}
 	rf12_ready();
- 542:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 576:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0x8208);			// TX off
- 546:	88 e0       	ldi	r24, 0x08	; 8
- 548:	92 e8       	ldi	r25, 0x82	; 130
- 54a:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 57a:	88 e0       	ldi	r24, 0x08	; 8
+ 57c:	92 e8       	ldi	r25, 0x82	; 130
+ 57e:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 54e:	df 91       	pop	r29
- 550:	cf 91       	pop	r28
- 552:	1f 91       	pop	r17
- 554:	0f 91       	pop	r16
- 556:	08 95       	ret
+ 582:	df 91       	pop	r29
+ 584:	cf 91       	pop	r28
+ 586:	1f 91       	pop	r17
+ 588:	0f 91       	pop	r16
+ 58a:	08 95       	ret
 
-00000558 <rf12_rxdata>:
+0000058c <rf12_rxdata>:
 
 void rf12_rxdata(unsigned char *data, unsigned char number)
 {	
- 558:	0f 93       	push	r16
- 55a:	1f 93       	push	r17
- 55c:	cf 93       	push	r28
- 55e:	df 93       	push	r29
- 560:	8c 01       	movw	r16, r24
- 562:	d6 2f       	mov	r29, r22
+ 58c:	0f 93       	push	r16
+ 58e:	1f 93       	push	r17
+ 590:	cf 93       	push	r28
+ 592:	df 93       	push	r29
+ 594:	8c 01       	movw	r16, r24
+ 596:	d6 2f       	mov	r29, r22
 	unsigned char i;
 	rf12_trans(0x82C8);			// RX on
- 564:	88 ec       	ldi	r24, 0xC8	; 200
- 566:	92 e8       	ldi	r25, 0x82	; 130
- 568:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 598:	88 ec       	ldi	r24, 0xC8	; 200
+ 59a:	92 e8       	ldi	r25, 0x82	; 130
+ 59c:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xCA81);			// set FIFO mode
- 56c:	81 e8       	ldi	r24, 0x81	; 129
- 56e:	9a ec       	ldi	r25, 0xCA	; 202
- 570:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 5a0:	81 e8       	ldi	r24, 0x81	; 129
+ 5a2:	9a ec       	ldi	r25, 0xCA	; 202
+ 5a4:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_trans(0xCA83);			// enable FIFO
- 574:	83 e8       	ldi	r24, 0x83	; 131
- 576:	9a ec       	ldi	r25, 0xCA	; 202
- 578:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 5a8:	83 e8       	ldi	r24, 0x83	; 131
+ 5aa:	9a ec       	ldi	r25, 0xCA	; 202
+ 5ac:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	for (i=0; i<number; i++)
- 57c:	dd 23       	and	r29, r29
- 57e:	99 f0       	breq	.+38     	; 0x5a6 <rf12_rxdata+0x4e>
+ 5b0:	dd 23       	and	r29, r29
+ 5b2:	99 f0       	breq	.+38     	; 0x5da <rf12_rxdata+0x4e>
 	}
 	rf12_ready();
 	rf12_trans(0x8208);			// TX off
 }
 
 void rf12_rxdata(unsigned char *data, unsigned char number)
- 580:	c8 01       	movw	r24, r16
- 582:	01 96       	adiw	r24, 0x01	; 1
- 584:	d1 50       	subi	r29, 0x01	; 1
- 586:	9c 01       	movw	r18, r24
- 588:	2d 0f       	add	r18, r29
- 58a:	31 1d       	adc	r19, r1
- 58c:	e9 01       	movw	r28, r18
+ 5b4:	c8 01       	movw	r24, r16
+ 5b6:	01 96       	adiw	r24, 0x01	; 1
+ 5b8:	d1 50       	subi	r29, 0x01	; 1
+ 5ba:	9c 01       	movw	r18, r24
+ 5bc:	2d 0f       	add	r18, r29
+ 5be:	31 1d       	adc	r19, r1
+ 5c0:	e9 01       	movw	r28, r18
 	rf12_trans(0x82C8);			// RX on
 	rf12_trans(0xCA81);			// set FIFO mode
 	rf12_trans(0xCA83);			// enable FIFO
 	for (i=0; i<number; i++)
 	{	
 		rf12_ready();
- 58e:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 5c2:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 		*data++=rf12_trans(0xB000);
- 592:	80 e0       	ldi	r24, 0x00	; 0
- 594:	90 eb       	ldi	r25, 0xB0	; 176
- 596:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
- 59a:	f8 01       	movw	r30, r16
- 59c:	81 93       	st	Z+, r24
- 59e:	8f 01       	movw	r16, r30
+ 5c6:	80 e0       	ldi	r24, 0x00	; 0
+ 5c8:	90 eb       	ldi	r25, 0xB0	; 176
+ 5ca:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
+ 5ce:	f8 01       	movw	r30, r16
+ 5d0:	81 93       	st	Z+, r24
+ 5d2:	8f 01       	movw	r16, r30
 {	
 	unsigned char i;
 	rf12_trans(0x82C8);			// RX on
 	rf12_trans(0xCA81);			// set FIFO mode
 	rf12_trans(0xCA83);			// enable FIFO
 	for (i=0; i<number; i++)
- 5a0:	ec 17       	cp	r30, r28
- 5a2:	fd 07       	cpc	r31, r29
- 5a4:	a1 f7       	brne	.-24     	; 0x58e <rf12_rxdata+0x36>
+ 5d4:	ec 17       	cp	r30, r28
+ 5d6:	fd 07       	cpc	r31, r29
+ 5d8:	a1 f7       	brne	.-24     	; 0x5c2 <rf12_rxdata+0x36>
 	{	
 		rf12_ready();
 		*data++=rf12_trans(0xB000);
 	}
 	rf12_trans(0x8208);			// RX off
- 5a6:	88 e0       	ldi	r24, 0x08	; 8
- 5a8:	92 e8       	ldi	r25, 0x82	; 130
- 5aa:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 5da:	88 e0       	ldi	r24, 0x08	; 8
+ 5dc:	92 e8       	ldi	r25, 0x82	; 130
+ 5de:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 }
- 5ae:	df 91       	pop	r29
- 5b0:	cf 91       	pop	r28
- 5b2:	1f 91       	pop	r17
- 5b4:	0f 91       	pop	r16
- 5b6:	08 95       	ret
+ 5e2:	df 91       	pop	r29
+ 5e4:	cf 91       	pop	r28
+ 5e6:	1f 91       	pop	r17
+ 5e8:	0f 91       	pop	r16
+ 5ea:	08 95       	ret
 
-000005b8 <rf12_txpacket>:
+000005ec <rf12_txpacket>:
 
 void rf12_txpacket(uint8_t addr, uint8_t from, uint8_t data) {
- 5b8:	1f 93       	push	r17
- 5ba:	cf 93       	push	r28
- 5bc:	df 93       	push	r29
- 5be:	18 2f       	mov	r17, r24
- 5c0:	d6 2f       	mov	r29, r22
- 5c2:	c4 2f       	mov	r28, r20
+ 5ec:	1f 93       	push	r17
+ 5ee:	cf 93       	push	r28
+ 5f0:	df 93       	push	r29
+ 5f2:	18 2f       	mov	r17, r24
+ 5f4:	d6 2f       	mov	r29, r22
+ 5f6:	c4 2f       	mov	r28, r20
 	rf12_trans(0x8238);			// TX on
- 5c4:	88 e3       	ldi	r24, 0x38	; 56
- 5c6:	92 e8       	ldi	r25, 0x82	; 130
- 5c8:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 5f8:	88 e3       	ldi	r24, 0x38	; 56
+ 5fa:	92 e8       	ldi	r25, 0x82	; 130
+ 5fc:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 5cc:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 600:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8AA);
- 5d0:	8a ea       	ldi	r24, 0xAA	; 170
- 5d2:	98 eb       	ldi	r25, 0xB8	; 184
- 5d4:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 604:	8a ea       	ldi	r24, 0xAA	; 170
+ 606:	98 eb       	ldi	r25, 0xB8	; 184
+ 608:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 5d8:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 60c:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8AA);
- 5dc:	8a ea       	ldi	r24, 0xAA	; 170
- 5de:	98 eb       	ldi	r25, 0xB8	; 184
- 5e0:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 610:	8a ea       	ldi	r24, 0xAA	; 170
+ 612:	98 eb       	ldi	r25, 0xB8	; 184
+ 614:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 5e4:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 618:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8AA);
- 5e8:	8a ea       	ldi	r24, 0xAA	; 170
- 5ea:	98 eb       	ldi	r25, 0xB8	; 184
- 5ec:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 61c:	8a ea       	ldi	r24, 0xAA	; 170
+ 61e:	98 eb       	ldi	r25, 0xB8	; 184
+ 620:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 5f0:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 624:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB82D);
- 5f4:	8d e2       	ldi	r24, 0x2D	; 45
- 5f6:	98 eb       	ldi	r25, 0xB8	; 184
- 5f8:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 628:	8d e2       	ldi	r24, 0x2D	; 45
+ 62a:	98 eb       	ldi	r25, 0xB8	; 184
+ 62c:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 5fc:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 630:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB8D4);
- 600:	84 ed       	ldi	r24, 0xD4	; 212
- 602:	98 eb       	ldi	r25, 0xB8	; 184
- 604:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 634:	84 ed       	ldi	r24, 0xD4	; 212
+ 636:	98 eb       	ldi	r25, 0xB8	; 184
+ 638:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 608:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 63c:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB800|addr);
- 60c:	81 2f       	mov	r24, r17
- 60e:	90 e0       	ldi	r25, 0x00	; 0
- 610:	98 6b       	ori	r25, 0xB8	; 184
- 612:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 640:	81 2f       	mov	r24, r17
+ 642:	90 e0       	ldi	r25, 0x00	; 0
+ 644:	98 6b       	ori	r25, 0xB8	; 184
+ 646:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 616:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 64a:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB800|from);
- 61a:	8d 2f       	mov	r24, r29
- 61c:	90 e0       	ldi	r25, 0x00	; 0
- 61e:	98 6b       	ori	r25, 0xB8	; 184
- 620:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 64e:	8d 2f       	mov	r24, r29
+ 650:	90 e0       	ldi	r25, 0x00	; 0
+ 652:	98 6b       	ori	r25, 0xB8	; 184
+ 654:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 624:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 658:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB800|data);
- 628:	8c 2f       	mov	r24, r28
- 62a:	90 e0       	ldi	r25, 0x00	; 0
- 62c:	98 6b       	ori	r25, 0xB8	; 184
- 62e:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 65c:	8c 2f       	mov	r24, r28
+ 65e:	90 e0       	ldi	r25, 0x00	; 0
+ 660:	98 6b       	ori	r25, 0xB8	; 184
+ 662:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 632:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 666:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0xB800);
- 636:	80 e0       	ldi	r24, 0x00	; 0
- 638:	98 eb       	ldi	r25, 0xB8	; 184
- 63a:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
+ 66a:	80 e0       	ldi	r24, 0x00	; 0
+ 66c:	98 eb       	ldi	r25, 0xB8	; 184
+ 66e:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
 	rf12_ready();
- 63e:	0e 94 44 02 	call	0x488	; 0x488 <rf12_ready>
+ 672:	0e 94 5e 02 	call	0x4bc	; 0x4bc <rf12_ready>
 	rf12_trans(0x8208); // TX off
- 642:	88 e0       	ldi	r24, 0x08	; 8
- 644:	92 e8       	ldi	r25, 0x82	; 130
- 646:	0e 94 9b 01 	call	0x336	; 0x336 <rf12_trans>
- 64a:	8f ef       	ldi	r24, 0xFF	; 255
- 64c:	90 e7       	ldi	r25, 0x70	; 112
- 64e:	a2 e0       	ldi	r26, 0x02	; 2
- 650:	81 50       	subi	r24, 0x01	; 1
- 652:	90 40       	sbci	r25, 0x00	; 0
- 654:	a0 40       	sbci	r26, 0x00	; 0
- 656:	e1 f7       	brne	.-8      	; 0x650 <rf12_txpacket+0x98>
- 658:	00 c0       	rjmp	.+0      	; 0x65a <rf12_txpacket+0xa2>
- 65a:	00 00       	nop
+ 676:	88 e0       	ldi	r24, 0x08	; 8
+ 678:	92 e8       	ldi	r25, 0x82	; 130
+ 67a:	0e 94 b5 01 	call	0x36a	; 0x36a <rf12_trans>
+ 67e:	8f ef       	ldi	r24, 0xFF	; 255
+ 680:	90 e7       	ldi	r25, 0x70	; 112
+ 682:	a2 e0       	ldi	r26, 0x02	; 2
+ 684:	81 50       	subi	r24, 0x01	; 1
+ 686:	90 40       	sbci	r25, 0x00	; 0
+ 688:	a0 40       	sbci	r26, 0x00	; 0
+ 68a:	e1 f7       	brne	.-8      	; 0x684 <rf12_txpacket+0x98>
+ 68c:	00 c0       	rjmp	.+0      	; 0x68e <rf12_txpacket+0xa2>
+ 68e:	00 00       	nop
 	_delay_ms(100);
- 65c:	df 91       	pop	r29
- 65e:	cf 91       	pop	r28
- 660:	1f 91       	pop	r17
- 662:	08 95       	ret
+ 690:	df 91       	pop	r29
+ 692:	cf 91       	pop	r28
+ 694:	1f 91       	pop	r17
+ 696:	08 95       	ret
 
-00000664 <__udivmodsi4>:
- 664:	a1 e2       	ldi	r26, 0x21	; 33
- 666:	1a 2e       	mov	r1, r26
- 668:	aa 1b       	sub	r26, r26
- 66a:	bb 1b       	sub	r27, r27
- 66c:	fd 01       	movw	r30, r26
- 66e:	0d c0       	rjmp	.+26     	; 0x68a <__udivmodsi4_ep>
+00000698 <__udivmodsi4>:
+ 698:	a1 e2       	ldi	r26, 0x21	; 33
+ 69a:	1a 2e       	mov	r1, r26
+ 69c:	aa 1b       	sub	r26, r26
+ 69e:	bb 1b       	sub	r27, r27
+ 6a0:	fd 01       	movw	r30, r26
+ 6a2:	0d c0       	rjmp	.+26     	; 0x6be <__udivmodsi4_ep>
 
-00000670 <__udivmodsi4_loop>:
- 670:	aa 1f       	adc	r26, r26
- 672:	bb 1f       	adc	r27, r27
- 674:	ee 1f       	adc	r30, r30
- 676:	ff 1f       	adc	r31, r31
- 678:	a2 17       	cp	r26, r18
- 67a:	b3 07       	cpc	r27, r19
- 67c:	e4 07       	cpc	r30, r20
- 67e:	f5 07       	cpc	r31, r21
- 680:	20 f0       	brcs	.+8      	; 0x68a <__udivmodsi4_ep>
- 682:	a2 1b       	sub	r26, r18
- 684:	b3 0b       	sbc	r27, r19
- 686:	e4 0b       	sbc	r30, r20
- 688:	f5 0b       	sbc	r31, r21
+000006a4 <__udivmodsi4_loop>:
+ 6a4:	aa 1f       	adc	r26, r26
+ 6a6:	bb 1f       	adc	r27, r27
+ 6a8:	ee 1f       	adc	r30, r30
+ 6aa:	ff 1f       	adc	r31, r31
+ 6ac:	a2 17       	cp	r26, r18
+ 6ae:	b3 07       	cpc	r27, r19
+ 6b0:	e4 07       	cpc	r30, r20
+ 6b2:	f5 07       	cpc	r31, r21
+ 6b4:	20 f0       	brcs	.+8      	; 0x6be <__udivmodsi4_ep>
+ 6b6:	a2 1b       	sub	r26, r18
+ 6b8:	b3 0b       	sbc	r27, r19
+ 6ba:	e4 0b       	sbc	r30, r20
+ 6bc:	f5 0b       	sbc	r31, r21
 
-0000068a <__udivmodsi4_ep>:
- 68a:	66 1f       	adc	r22, r22
- 68c:	77 1f       	adc	r23, r23
- 68e:	88 1f       	adc	r24, r24
- 690:	99 1f       	adc	r25, r25
- 692:	1a 94       	dec	r1
- 694:	69 f7       	brne	.-38     	; 0x670 <__udivmodsi4_loop>
- 696:	60 95       	com	r22
- 698:	70 95       	com	r23
- 69a:	80 95       	com	r24
- 69c:	90 95       	com	r25
- 69e:	9b 01       	movw	r18, r22
- 6a0:	ac 01       	movw	r20, r24
- 6a2:	bd 01       	movw	r22, r26
- 6a4:	cf 01       	movw	r24, r30
- 6a6:	08 95       	ret
+000006be <__udivmodsi4_ep>:
+ 6be:	66 1f       	adc	r22, r22
+ 6c0:	77 1f       	adc	r23, r23
+ 6c2:	88 1f       	adc	r24, r24
+ 6c4:	99 1f       	adc	r25, r25
+ 6c6:	1a 94       	dec	r1
+ 6c8:	69 f7       	brne	.-38     	; 0x6a4 <__udivmodsi4_loop>
+ 6ca:	60 95       	com	r22
+ 6cc:	70 95       	com	r23
+ 6ce:	80 95       	com	r24
+ 6d0:	90 95       	com	r25
+ 6d2:	9b 01       	movw	r18, r22
+ 6d4:	ac 01       	movw	r20, r24
+ 6d6:	bd 01       	movw	r22, r26
+ 6d8:	cf 01       	movw	r24, r30
+ 6da:	08 95       	ret
 
-000006a8 <__divmodsi4>:
- 6a8:	97 fb       	bst	r25, 7
- 6aa:	09 2e       	mov	r0, r25
- 6ac:	05 26       	eor	r0, r21
- 6ae:	0e d0       	rcall	.+28     	; 0x6cc <__divmodsi4_neg1>
- 6b0:	57 fd       	sbrc	r21, 7
- 6b2:	04 d0       	rcall	.+8      	; 0x6bc <__divmodsi4_neg2>
- 6b4:	d7 df       	rcall	.-82     	; 0x664 <__udivmodsi4>
- 6b6:	0a d0       	rcall	.+20     	; 0x6cc <__divmodsi4_neg1>
- 6b8:	00 1c       	adc	r0, r0
- 6ba:	38 f4       	brcc	.+14     	; 0x6ca <__divmodsi4_exit>
+000006dc <__divmodsi4>:
+ 6dc:	97 fb       	bst	r25, 7
+ 6de:	09 2e       	mov	r0, r25
+ 6e0:	05 26       	eor	r0, r21
+ 6e2:	0e d0       	rcall	.+28     	; 0x700 <__divmodsi4_neg1>
+ 6e4:	57 fd       	sbrc	r21, 7
+ 6e6:	04 d0       	rcall	.+8      	; 0x6f0 <__divmodsi4_neg2>
+ 6e8:	d7 df       	rcall	.-82     	; 0x698 <__udivmodsi4>
+ 6ea:	0a d0       	rcall	.+20     	; 0x700 <__divmodsi4_neg1>
+ 6ec:	00 1c       	adc	r0, r0
+ 6ee:	38 f4       	brcc	.+14     	; 0x6fe <__divmodsi4_exit>
 
-000006bc <__divmodsi4_neg2>:
- 6bc:	50 95       	com	r21
- 6be:	40 95       	com	r20
- 6c0:	30 95       	com	r19
- 6c2:	21 95       	neg	r18
- 6c4:	3f 4f       	sbci	r19, 0xFF	; 255
- 6c6:	4f 4f       	sbci	r20, 0xFF	; 255
- 6c8:	5f 4f       	sbci	r21, 0xFF	; 255
+000006f0 <__divmodsi4_neg2>:
+ 6f0:	50 95       	com	r21
+ 6f2:	40 95       	com	r20
+ 6f4:	30 95       	com	r19
+ 6f6:	21 95       	neg	r18
+ 6f8:	3f 4f       	sbci	r19, 0xFF	; 255
+ 6fa:	4f 4f       	sbci	r20, 0xFF	; 255
+ 6fc:	5f 4f       	sbci	r21, 0xFF	; 255
 
-000006ca <__divmodsi4_exit>:
- 6ca:	08 95       	ret
+000006fe <__divmodsi4_exit>:
+ 6fe:	08 95       	ret
 
-000006cc <__divmodsi4_neg1>:
- 6cc:	f6 f7       	brtc	.-4      	; 0x6ca <__divmodsi4_exit>
- 6ce:	90 95       	com	r25
- 6d0:	80 95       	com	r24
- 6d2:	70 95       	com	r23
- 6d4:	61 95       	neg	r22
- 6d6:	7f 4f       	sbci	r23, 0xFF	; 255
- 6d8:	8f 4f       	sbci	r24, 0xFF	; 255
- 6da:	9f 4f       	sbci	r25, 0xFF	; 255
- 6dc:	08 95       	ret
+00000700 <__divmodsi4_neg1>:
+ 700:	f6 f7       	brtc	.-4      	; 0x6fe <__divmodsi4_exit>
+ 702:	90 95       	com	r25
+ 704:	80 95       	com	r24
+ 706:	70 95       	com	r23
+ 708:	61 95       	neg	r22
+ 70a:	7f 4f       	sbci	r23, 0xFF	; 255
+ 70c:	8f 4f       	sbci	r24, 0xFF	; 255
+ 70e:	9f 4f       	sbci	r25, 0xFF	; 255
+ 710:	08 95       	ret
 
-000006de <_exit>:
- 6de:	f8 94       	cli
+00000712 <_exit>:
+ 712:	f8 94       	cli
 
-000006e0 <__stop_program>:
- 6e0:	ff cf       	rjmp	.-2      	; 0x6e0 <__stop_program>
+00000714 <__stop_program>:
+ 714:	ff cf       	rjmp	.-2      	; 0x714 <__stop_program>
diff --git a/Reciver/Reciver/Debug/Reciver.map b/Reciver/Reciver/Debug/Reciver.map
index 0b18bab..62d90ce 100644
--- a/Reciver/Reciver/Debug/Reciver.map
+++ b/Reciver/Reciver/Debug/Reciver.map
@@ -124,7 +124,7 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
 .rela.plt
  *(.rela.plt)
 
-.text           0x00000000      0x6e2
+.text           0x00000000      0x716
  *(.vectors)
  .vectors       0x00000000       0x54 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/../../../../avr/lib/avr5/crtm16a.o
                 0x00000000                __vector_default
@@ -200,47 +200,47 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
                 0x0000008e                __vector_16
                 0x0000008e                __vector_18
                 0x0000008e                __vector_20
- .text          0x00000092      0x2a4 Reciver.o
+ .text          0x00000092      0x2d8 Reciver.o
                 0x00000092                turn
-                0x00000108                poll
-                0x0000012a                recive
-                0x000001dc                init_timer
-                0x000001ec                __vector_9
-                0x00000304                main
- .text          0x00000336      0x32e rf12.o
-                0x00000336                rf12_trans
-                0x00000368                rf12_init
-                0x000003bc                rf12_setbandwidth
-                0x000003f8                rf12_setfreq
-                0x00000418                rf12_setbaud
-                0x00000466                rf12_setpower
-                0x00000488                rf12_ready
-                0x00000490                rf12_beginasyncrx
-                0x000004aa                rf12_hasdata
-                0x000004b4                rf12_rxbyte
-                0x000004be                rf12_endasyncrx
-                0x000004c8                rf12_txdata
-                0x00000558                rf12_rxdata
-                0x000005b8                rf12_txpacket
- .text          0x00000664        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
- .text          0x00000664        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
- .text          0x00000664        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
- .text          0x00000664        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
- .text          0x00000664        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
-                0x00000664                . = ALIGN (0x2)
+                0x00000126                poll
+                0x0000016c                recive
+                0x00000228                init_timer
+                0x00000238                __vector_9
+                0x00000336                main
+ .text          0x0000036a      0x32e rf12.o
+                0x0000036a                rf12_trans
+                0x0000039c                rf12_init
+                0x000003f0                rf12_setbandwidth
+                0x0000042c                rf12_setfreq
+                0x0000044c                rf12_setbaud
+                0x0000049a                rf12_setpower
+                0x000004bc                rf12_ready
+                0x000004c4                rf12_beginasyncrx
+                0x000004de                rf12_hasdata
+                0x000004e8                rf12_rxbyte
+                0x000004f2                rf12_endasyncrx
+                0x000004fc                rf12_txdata
+                0x0000058c                rf12_rxdata
+                0x000005ec                rf12_txpacket
+ .text          0x00000698        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
+ .text          0x00000698        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
+ .text          0x00000698        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+ .text          0x00000698        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
+ .text          0x00000698        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
+                0x00000698                . = ALIGN (0x2)
  *(.text.*)
- .text.libgcc   0x00000664       0x44 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
-                0x00000664                __udivmodsi4
- .text.libgcc   0x000006a8       0x36 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
-                0x000006a8                __divmodsi4
- .text.libgcc   0x000006de        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
- .text.libgcc   0x000006de        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
- .text.libgcc   0x000006de        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
-                0x000006de                . = ALIGN (0x2)
+ .text.libgcc   0x00000698       0x44 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
+                0x00000698                __udivmodsi4
+ .text.libgcc   0x000006dc       0x36 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
+                0x000006dc                __divmodsi4
+ .text.libgcc   0x00000712        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+ .text.libgcc   0x00000712        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
+ .text.libgcc   0x00000712        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
+                0x00000712                . = ALIGN (0x2)
  *(.fini9)
- .fini9         0x000006de        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
-                0x000006de                _exit
-                0x000006de                exit
+ .fini9         0x00000712        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+                0x00000712                _exit
+                0x00000712                exit
  *(.fini9)
  *(.fini8)
  *(.fini8)
@@ -259,11 +259,11 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
  *(.fini1)
  *(.fini1)
  *(.fini0)
- .fini0         0x000006de        0x4 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+ .fini0         0x00000712        0x4 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
  *(.fini0)
-                0x000006e2                _etext = .
+                0x00000716                _etext = .
 
-.data           0x00800060        0x4 load address 0x000006e2
+.data           0x00800060        0x4 load address 0x00000716
                 0x00800060                PROVIDE (__data_start, .)
  *(.data)
  .data          0x00800060        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/../../../../avr/lib/avr5/crtm16a.o
@@ -299,8 +299,8 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
  *(.bss*)
  *(COMMON)
                 0x00800066                PROVIDE (__bss_end, .)
-                0x000006e2                __data_load_start = LOADADDR (.data)
-                0x000006e6                __data_load_end = (__data_load_start + SIZEOF (.data))
+                0x00000716                __data_load_start = LOADADDR (.data)
+                0x0000071a                __data_load_end = (__data_load_start + SIZEOF (.data))
 
 .noinit         0x00800066        0x0
                 0x00800066                PROVIDE (__noinit_start, .)
@@ -380,36 +380,36 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
 .debug_pubnames
  *(.debug_pubnames)
 
-.debug_info     0x00000000      0xc6f
+.debug_info     0x00000000      0xc9e
  *(.debug_info)
- .debug_info    0x00000000      0x3d8 Reciver.o
- .debug_info    0x000003d8      0x446 rf12.o
- .debug_info    0x0000081e       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
- .debug_info    0x000008fb       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
- .debug_info    0x000009d8       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
- .debug_info    0x00000ab5       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
- .debug_info    0x00000b92       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
+ .debug_info    0x00000000      0x407 Reciver.o
+ .debug_info    0x00000407      0x446 rf12.o
+ .debug_info    0x0000084d       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
+ .debug_info    0x0000092a       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
+ .debug_info    0x00000a07       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+ .debug_info    0x00000ae4       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
+ .debug_info    0x00000bc1       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
  *(.gnu.linkonce.wi.*)
 
-.debug_abbrev   0x00000000      0x36d
+.debug_abbrev   0x00000000      0x388
  *(.debug_abbrev)
- .debug_abbrev  0x00000000      0x16e Reciver.o
- .debug_abbrev  0x0000016e      0x19b rf12.o
- .debug_abbrev  0x00000309       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
- .debug_abbrev  0x0000031d       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
- .debug_abbrev  0x00000331       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
- .debug_abbrev  0x00000345       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
- .debug_abbrev  0x00000359       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
+ .debug_abbrev  0x00000000      0x189 Reciver.o
+ .debug_abbrev  0x00000189      0x19b rf12.o
+ .debug_abbrev  0x00000324       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
+ .debug_abbrev  0x00000338       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
+ .debug_abbrev  0x0000034c       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+ .debug_abbrev  0x00000360       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
+ .debug_abbrev  0x00000374       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
 
-.debug_line     0x00000000      0x730
+.debug_line     0x00000000      0x73b
  *(.debug_line)
- .debug_line    0x00000000      0x21e Reciver.o
- .debug_line    0x0000021e      0x222 rf12.o
- .debug_line    0x00000440       0xa8 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
- .debug_line    0x000004e8       0xa1 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
- .debug_line    0x00000589       0x88 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
- .debug_line    0x00000611       0x91 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
- .debug_line    0x000006a2       0x8e c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
+ .debug_line    0x00000000      0x229 Reciver.o
+ .debug_line    0x00000229      0x222 rf12.o
+ .debug_line    0x0000044b       0xa8 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_udivmodsi4.o)
+ .debug_line    0x000004f3       0xa1 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_divmodsi4.o)
+ .debug_line    0x00000594       0x88 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_exit.o)
+ .debug_line    0x0000061c       0x91 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_copy_data.o)
+ .debug_line    0x000006ad       0x8e c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr5\libgcc.a(_clear_bss.o)
 
 .debug_frame    0x00000000      0x1c8
  *(.debug_frame)
@@ -423,10 +423,10 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
  .debug_str     0x00000164       0xf7 rf12.o
                                 0x25b (size before relaxing)
 
-.debug_loc      0x00000000      0x620
+.debug_loc      0x00000000      0x5fd
  *(.debug_loc)
- .debug_loc     0x00000000      0x2de Reciver.o
- .debug_loc     0x000002de      0x342 rf12.o
+ .debug_loc     0x00000000      0x2bb Reciver.o
+ .debug_loc     0x000002bb      0x342 rf12.o
 
 .debug_macinfo
  *(.debug_macinfo)
diff --git a/Reciver/Reciver/Debug/Reciver.srec b/Reciver/Reciver/Debug/Reciver.srec
index 09c109a..5a00ee1 100644
--- a/Reciver/Reciver/Debug/Reciver.srec
+++ b/Reciver/Reciver/Debug/Reciver.srec
@@ -1,114 +1,117 @@
 S00F0000526563697665722E7372656345
 S11300000C942A000C9447000C9447000C9447006D
 S11300100C9447000C9447000C9447000C94470040
-S11300200C9447000C94F6000C9447000C94470081
+S11300200C9447000C941C010C9447000C9447005A
 S11300300C9447000C9447000C9447000C94470020
 S11300400C9447000C9447000C9447000C94470010
 S11300500C94470011241FBECFE5D4E0DEBFCDBF12
-S113006010E0A0E6B0E0E2EEF6E002C005900D92EA
+S113006010E0A0E6B0E0E6E1F7E002C005900D92F2
 S1130070A436B107D9F710E0A4E6B0E001C01D92A0
-S1130080A636B107E1F70E9482010C946F030C9429
-S1130090000080916200909163008630910599F18F
-S11300A086E090E0909363008093620088E790E09C
-S11300B090936100809360008FEF96E1A1E18150FD
-S11300C09040A040E1F700C000008CE390E09093E2
-S11300D06100809360008FEF96E1A1E18150904030
-S11300E0A040E1F700C0000084EB90E09093610031
+S1130080A636B107E1F70E949B010C9489030C94F6
+S1130090000080916200909163008630910509F41C
+S11300A041C086E090E0909363008093620088E70B
+S11300B090E090936100809360008FE39CE9019746
+S11300C0F1F700C00000409162005091630081E0AC
+S11300D06AE00E94F6028FEF96E1A1E18150904020
+S11300E0A040E1F700C000008CE390E09093610031
 S11300F0809360008FEF96E1A1E181509040A04091
-S1130100E1F700C000000895899880916200909101
-S113011063008330910541F4819B06C00E945F0215
-S11301200E9449000E9448020895CF930E94480209
-S113013002C00E9484000E9455028823D1F70E94C5
-S11301405A02882341F08A3031F0803F09F044C0DC
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-S11301605A02C82F02C00E9484000E9455028823AC
-S1130170D1F7C13089F50E945A02843051F085309C
-S113018018F48130B1F418C0853051F0873089F407
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-S11302B0000080916000909161001816190674F492
-S11302C080E090E025E12A95F1F700000196209165
-S11302D060003091610082179307A4F3C1989F9145
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-S11302F080916400909165000196909365008093CD
-S11303006400CFCF0E94B40180E296E00E94FC0119
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-S113047062957295707F7627607F76277070862BE1
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-S113068020F0A21BB30BE40BF50B661F771F881F2A
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-S10506E0FFCF46
-S10706E2B40002005A
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+S113065090E0986B0E94B5010E945E028C2F90E09E
+S1130660986B0E94B5010E945E0280E098EB0E94A4
+S1130670B5010E945E0288E092E80E94B5018FEF06
+S113068090E7A2E081509040A040E1F700C0000054
+S1130690DF91CF911F910895A1E21A2EAA1BBB1BD3
+S11306A0FD010DC0AA1FBB1FEE1FFF1FA217B3073A
+S11306B0E407F50720F0A21BB30BE40BF50B661F50
+S11306C0771F881F991F1A9469F760957095809514
+S11306D090959B01AC01BD01CF01089597FB092EB4
+S11306E005260ED057FD04D0D7DF0AD0001C38F4FD
+S11306F050954095309521953F4F4F4F5F4F08954A
+S1130700F6F790958095709561957F4F8F4F9F4F29
+S10907100895F894FFCFE8
+S1070716B400020025
 S9030000FC
diff --git a/Reciver/Reciver/Reciver.c b/Reciver/Reciver/Reciver.c
index 8c91603..3fc9333 100644
--- a/Reciver/Reciver/Reciver.c
+++ b/Reciver/Reciver/Reciver.c
@@ -24,6 +24,8 @@ void turn() {
 		return;
 	status = RUN;
 	servopos = RIGHT-60;
+	_delay_ms(10+DEVICE);
+	rf12_txpacket(MASTER, DEVICE, status);
 	_delay_ms(700);
 	servopos = RIGHT-120;
 	_delay_ms(700);
@@ -40,6 +42,13 @@ void poll() {
 			rf12_beginasyncrx();
 		}
 	}
+	if(status == SLEEP) {
+		if(PIND & (1<<PIND1)) {
+			rf12_endasyncrx();
+			rf12_txpacket(MASTER, DEVICE, DEDECT);
+			rf12_beginasyncrx();
+		}			
+	}
 }
 
 void recive() {
@@ -71,7 +80,10 @@ void recive() {
 					break;
 				}
 				case SETRUN: {
+					rf12_endasyncrx();
 					turn();
+					rf12_beginasyncrx();
+					return;
 				}
 				default:
 				{
@@ -105,29 +117,23 @@ ISR(TIMER0_OVF_vect) {
 	// Reinitialize Timer 0 value
 	TCNT0=0x58;
 	
-	int led = 0;
 	if(status == SLEEP) {
-		if(pwm_led > 50)
-			led = 1;		
+		if(pwm_led > 50) {
+			PORTB ^= (1<<PINB0);
+			pwm_led = 0;
+		}					
 	} else if(status == ACTIVE) {
-		if(pwm_led > 5)
-			led = 1;
-	} else if(status == RUN) {
-		if(pwm_led > 1)
-			led = 1;
-	}
-	
-	pwm_led++;
-			
-	if(led == 1) {
-		DDRB |= (1<<PINB0);
-		if(PINB & (1<<PINB0)) {
-			PORTB &= ~(1<<PINB0);
-		} else {
-			PORTB |= (1<<PINB0);
+		if(pwm_led > 5) {
+			PORTB ^= (1<<PINB0);
+			pwm_led = 0;
+		}
+	} else if(status == RUN) {
+		if(pwm_led > 1) {
+			PORTB ^= (1<<PINB0);
+			pwm_led = 0;
 		}
-		pwm_led = 0;
 	}
+	pwm_led++;	
 	
 	DDRB |= (1<<PB1);
 	PORTB |= (1<<PB1);
@@ -148,6 +154,7 @@ int main(void)
 	rf12_setpower(0, 6);			// 1mW Ausgangsleistung, 120kHz Frequenzshift
 		
 	init_timer();
+	DDRB |= (1<<PINB0);
 	sei();
 	
 	//DDRB |= (1<<PINB0);
diff --git a/Reciver/Reciver/codes.h b/Reciver/Reciver/codes.h
index 075ba2f..54dae38 100644
--- a/Reciver/Reciver/codes.h
+++ b/Reciver/Reciver/codes.h
@@ -24,6 +24,8 @@
 #define SETACTIVE 5
 #define RUN 6
 #define SETRUN 7
+#define DEDECT 8
+#define SETDEDECT 9
 #endif
 
 #endif /* CODES_H_ */
\ No newline at end of file
diff --git a/Sender/Sender/Debug/Sender.elf b/Sender/Sender/Debug/Sender.elf
index 7a431f6..f0fbfab 100644
Binary files a/Sender/Sender/Debug/Sender.elf and b/Sender/Sender/Debug/Sender.elf differ
diff --git a/Sender/Sender/Debug/Sender.hex b/Sender/Sender/Debug/Sender.hex
index a86b22a..d282b65 100644
--- a/Sender/Sender/Debug/Sender.hex
+++ b/Sender/Sender/Debug/Sender.hex
@@ -1,9 +1,9 @@
 :1000000012C02CC02BC02AC029C028C027C026C0BF
-:1000100025C065C323C022C021C020C01FC01EC090
+:1000100025C09BC323C022C021C020C01FC01EC05A
 :100020001DC01CC01BC011241FBECFE5D4E0DEBF25
-:10003000CDBF10E0A0E6B0E0E6E5F8E002C0059034
+:10003000CDBF10E0A0E6B0E0E4ECF8E002C005902F
 :100040000D92AC39B107D9F710E0ACE9B0E001C0CE
-:100050001D92A93AB107E1F797D3FBC3D1CFAC9872
+:100050001D92A93AB107E1F7CED332C4D1CFAC9803
 :1000600040E120E030E0992314F4AA9A01C0AA9854
 :10007000220F331F99992160AB9A880F991F00C0F6
 :100080000000AB98415079F7AC9A822F932F0895D6
@@ -18,9 +18,9 @@
 :100110008036910538F02FE08034920728F08FE385
 :100120009FE002C080E690E0906A99DF089522E0A7
 :1001300087399207F0F025E18831920770F49C012D
-:1001400040E050E060E678EA80E090E067D3C901E3
+:1001400040E050E060E678EA80E090E09ED3C901AC
 :1001500001978068966C83DF08959C0140E050E031
-:100160006CEF72E485E090E037D3C9010197966C9B
+:100160006CEF72E485E090E06ED3C9010197966C64
 :1001700076DF089590E087709070986970E06295DE
 :100180007295707F7627607F76277070862B972B0D
 :1001900066DF0895AC98999BFECF089588EC92E8AD
@@ -57,83 +57,90 @@
 :10038000088002C0880F991F0A94E2F7832B8083AC
 :10039000FA01C080DD24F6013081C701FB01008035
 :1003A00002C0880F991F0A94E2F780958323F60113
-:1003B00080836BC0F801E80FF91F30813330F1F40E
+:1003B00080838EC0F801E80FF91F30813330F1F4EB
 :1003C000FA01C080DD24F6013081C701FB01008005
 :1003D00002C0880F991F0A94E2F7832BF6018083ED
 :1003E000EC91F0E03081C701088002C0880F991FAE
-:1003F0000A94E2F780958323808347C0F801E80FD1
+:1003F0000A94E2F78095832380836AC0F801E80FAE
 :10040000F91F30813630E9F4EC91F0E03081C7011A
 :10041000088002C0880F991F0A94E2F7832B80831B
 :10042000FA01C080DD24F6013081C701FB010080A4
 :1004300002C0880F991F0A94E2F7832BF60180838C
-:1004400024C0F801E80FF91F80818823F1F4EC91B2
+:1004400047C0F801E80FF91F30813323F9F4EC912C
 :10045000F0E03081C701088002C0880F991F0A941C
 :10046000E2F7809583238083FA01C080DD24F601C2
 :100470003081C701FB01008002C0880F991F0A94D8
-:10048000E2F780958323F60180832E5F12962296F1
-:100490004E5F5F4F6E5F7F4F2A3009F064CFDF9170
-:1004A000CF911F910F91FF90EF90DF90CF90089523
-:1004B0002F923F924F925F926F927F928F929F9274
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-:1004D000CF93DF9330DF4FE750E065E770E0CBE686
-:1004E000D0E001E610E020E022243324EE24FF24B3
-:1004F000E3946A015601F6013197A081B0E03B0117
-:100500008C91FB013197A701008002C0440F551F59
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-:10086600303030300101050405040504050438382C
-:1008760032323232323232320200060706070607B9
-:0C08860006073838323232323232323259
+:10048000E2F780958323F601808322C0F801E80F0C
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+:100660009040A040E1F700C0000098DD7894DF9151
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+:1006C000C82FC15001C017DF73DD8823E1F775DD46
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+:1006E000D9F0883081F524C08C2F90E0FC01EF55C3
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+:100700008C2F90E0FC01EF55FF4F23E020838456AF
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+:10072000FF4F26E0208384569F4FFC0110820BC0B0
+:100730008C2F90E0FC01EF55FF4F28E0208384567A
+:100740009F4FFC011082CF9108951F920F920FB618
+:100750000F9211242F933F934F935F936F937F9347
+:100760008F939F93AF93BF93EF93FF93E4DD8091BB
+:10077000A600803130F48091A6008F5F8093A600A0
+:1007800023C01092A6001DDD80E061E041E080DD25
+:1007900080E090E02CE930E041EA50E0F901E80F18
+:1007A000F91F60816B3028F0FA01E80FF91F108201
+:1007B00006C0F901E80FF91F60816F5F6083019641
+:1007C0008530910559F7EADCFF91EF91BF91AF9128
+:1007D0009F918F917F916F915F914F913F912F9159
+:1007E0000F900FBE0F901F90189585E083BF12BE2B
+:1007F00081E089BF08954CDC80E296E089DC81E0ED
+:1008000060E047E068DC80E895E291DC80E066E04B
+:10081000B1DC7CDDEADF78948FEF90E7A2E08150D5
+:100820009040A040E1F700C0000034DFFECF991BEC
+:1008300079E004C0991F961708F0961B881F7A95D7
+:10084000C9F780950895A1E21A2EAA1BBB1BFD01D2
+:100850000DC0AA1FBB1FEE1FFF1FA217B307E4079F
+:10086000F50720F0A21BB30BE40BF50B661F771FF7
+:10087000881F991F1A9469F76095709580959095D7
+:100880009B01AC01BD01CF01089597FB092E052600
+:100890000ED057FD04D0D7DF0AD0001C38F4509595
+:1008A0004095309521953F4F4F4F5F4F0895F6F794
+:1008B00090958095709561957F4F8F4F9F4F0895CC
+:0408C000F894FFCFDA
+:1008C40000010303030303030303303030303030EB
+:1008D40030303030010105040504050405043838BE
+:1008E400323232323232323202000607060706074B
+:0C08F400060738383232323232323232EB
 :00000001FF
diff --git a/Sender/Sender/Debug/Sender.lss b/Sender/Sender/Debug/Sender.lss
index f99bd01..705f748 100644
--- a/Sender/Sender/Debug/Sender.lss
+++ b/Sender/Sender/Debug/Sender.lss
@@ -3,31 +3,31 @@ Sender.elf:     file format elf32-avr
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         00000856  00000000  00000000  00000094  2**1
+  0 .text         000008c4  00000000  00000000  00000094  2**1
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         0000003c  00800060  00000856  000008ea  2**0
+  1 .data         0000003c  00800060  000008c4  00000958  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          0000000d  0080009c  0080009c  00000926  2**0
+  2 .bss          0000000d  0080009c  0080009c  00000994  2**0
                   ALLOC
-  3 .stab         000006cc  00000000  00000000  00000928  2**2
+  3 .stab         000006cc  00000000  00000000  00000994  2**2
                   CONTENTS, READONLY, DEBUGGING
-  4 .stabstr      00000085  00000000  00000000  00000ff4  2**0
+  4 .stabstr      00000085  00000000  00000000  00001060  2**0
                   CONTENTS, READONLY, DEBUGGING
-  5 .debug_aranges 00000100  00000000  00000000  00001080  2**3
+  5 .debug_aranges 00000100  00000000  00000000  000010e8  2**3
                   CONTENTS, READONLY, DEBUGGING
-  6 .debug_info   000011a7  00000000  00000000  00001180  2**0
+  6 .debug_info   00001217  00000000  00000000  000011e8  2**0
                   CONTENTS, READONLY, DEBUGGING
-  7 .debug_abbrev 0000040c  00000000  00000000  00002327  2**0
+  7 .debug_abbrev 0000040c  00000000  00000000  000023ff  2**0
                   CONTENTS, READONLY, DEBUGGING
-  8 .debug_line   00000863  00000000  00000000  00002733  2**0
+  8 .debug_line   0000087a  00000000  00000000  0000280b  2**0
                   CONTENTS, READONLY, DEBUGGING
-  9 .debug_frame  00000284  00000000  00000000  00002f98  2**2
+  9 .debug_frame  00000284  00000000  00000000  00003088  2**2
                   CONTENTS, READONLY, DEBUGGING
- 10 .debug_str    000002d7  00000000  00000000  0000321c  2**0
+ 10 .debug_str    000002df  00000000  00000000  0000330c  2**0
                   CONTENTS, READONLY, DEBUGGING
- 11 .debug_loc    000009f7  00000000  00000000  000034f3  2**0
+ 11 .debug_loc    00000a5a  00000000  00000000  000035eb  2**0
                   CONTENTS, READONLY, DEBUGGING
- 12 .debug_ranges 00000068  00000000  00000000  00003eea  2**0
+ 12 .debug_ranges 00000068  00000000  00000000  00004045  2**0
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -42,7 +42,7 @@ Disassembly of section .text:
    c:	27 c0       	rjmp	.+78     	; 0x5c <__bad_interrupt>
    e:	26 c0       	rjmp	.+76     	; 0x5c <__bad_interrupt>
   10:	25 c0       	rjmp	.+74     	; 0x5c <__bad_interrupt>
-  12:	65 c3       	rjmp	.+1738   	; 0x6de <__vector_9>
+  12:	9b c3       	rjmp	.+1846   	; 0x74a <__vector_9>
   14:	23 c0       	rjmp	.+70     	; 0x5c <__bad_interrupt>
   16:	22 c0       	rjmp	.+68     	; 0x5c <__bad_interrupt>
   18:	21 c0       	rjmp	.+66     	; 0x5c <__bad_interrupt>
@@ -65,7 +65,7 @@ Disassembly of section .text:
   32:	10 e0       	ldi	r17, 0x00	; 0
   34:	a0 e6       	ldi	r26, 0x60	; 96
   36:	b0 e0       	ldi	r27, 0x00	; 0
-  38:	e6 e5       	ldi	r30, 0x56	; 86
+  38:	e4 ec       	ldi	r30, 0xC4	; 196
   3a:	f8 e0       	ldi	r31, 0x08	; 8
   3c:	02 c0       	rjmp	.+4      	; 0x42 <__SREG__+0x3>
   3e:	05 90       	lpm	r0, Z+
@@ -87,8 +87,8 @@ Disassembly of section .text:
   52:	a9 3a       	cpi	r26, 0xA9	; 169
   54:	b1 07       	cpc	r27, r17
   56:	e1 f7       	brne	.-8      	; 0x50 <.do_clear_bss_loop>
-  58:	97 d3       	rcall	.+1838   	; 0x788 <main>
-  5a:	fb c3       	rjmp	.+2038   	; 0x852 <_exit>
+  58:	ce d3       	rcall	.+1948   	; 0x7f6 <main>
+  5a:	32 c4       	rjmp	.+2148   	; 0x8c0 <_exit>
 
 0000005c <__bad_interrupt>:
   5c:	d1 cf       	rjmp	.-94     	; 0x0 <__vectors>
@@ -317,7 +317,7 @@ void rf12_setbaud(unsigned short baud)
  146:	78 ea       	ldi	r23, 0xA8	; 168
  148:	80 e0       	ldi	r24, 0x00	; 0
  14a:	90 e0       	ldi	r25, 0x00	; 0
- 14c:	67 d3       	rcall	.+1742   	; 0x81c <__divmodsi4>
+ 14c:	9e d3       	rcall	.+1852   	; 0x88a <__divmodsi4>
  14e:	c9 01       	movw	r24, r18
  150:	01 97       	sbiw	r24, 0x01	; 1
  152:	80 68       	ori	r24, 0x80	; 128
@@ -333,7 +333,7 @@ void rf12_setbaud(unsigned short baud)
  162:	72 e4       	ldi	r23, 0x42	; 66
  164:	85 e0       	ldi	r24, 0x05	; 5
  166:	90 e0       	ldi	r25, 0x00	; 0
- 168:	37 d3       	rcall	.+1646   	; 0x7d8 <__udivmodsi4>
+ 168:	6e d3       	rcall	.+1756   	; 0x846 <__udivmodsi4>
  16a:	c9 01       	movw	r24, r18
  16c:	01 97       	sbiw	r24, 0x01	; 1
  16e:	96 6c       	ori	r25, 0xC6	; 198
@@ -691,8 +691,8 @@ void rf12_txpacket(uint8_t addr, uint8_t from, uint8_t data) {
  30a:	08 95       	ret
 
 0000030c <init_ports>:
-static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
 static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
+static inline void BIT_TOG(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
 	
 void init_ports() {
 	//LED auf Ausgang
@@ -761,12 +761,12 @@ void led() {
 		if(status_dev[i/2] == SLEEP) {
  35c:	01 ea       	ldi	r16, 0xA1	; 161
  35e:	10 e0       	ldi	r17, 0x00	; 0
-static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
-	*target |= (1<<bit);
+static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
+	return *target & (1<<bit);
 }
 
-static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
-	*target &= ~(1<<bit);
+static inline void BIT_TOG(volatile uint8_t *target, uint8_t bit) {
+	*target ^= (1<<bit);
  360:	ee 24       	eor	r14, r14
  362:	ff 24       	eor	r15, r15
  364:	e3 94       	inc	r14
@@ -833,7 +833,7 @@ static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
  3ac:	83 23       	and	r24, r19
  3ae:	f6 01       	movw	r30, r12
  3b0:	80 83       	st	Z, r24
- 3b2:	6b c0       	rjmp	.+214    	; 0x48a <__stack+0x2b>
+ 3b2:	8e c0       	rjmp	.+284    	; 0x4d0 <__stack+0x71>
 void led() {
 	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
 		if(status_dev[i/2] == SLEEP) {
@@ -894,7 +894,7 @@ static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
  3f4:	80 95       	com	r24
  3f6:	83 23       	and	r24, r19
  3f8:	80 83       	st	Z, r24
- 3fa:	47 c0       	rjmp	.+142    	; 0x48a <__stack+0x2b>
+ 3fa:	6a c0       	rjmp	.+212    	; 0x4d0 <__stack+0x71>
 			BIT_SET(led_port[i],led_pin[i]);
 			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
 		} else if(status_dev[i/2] == ACTIVE) {
@@ -954,7 +954,7 @@ static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
  43a:	83 2b       	or	r24, r19
  43c:	f6 01       	movw	r30, r12
  43e:	80 83       	st	Z, r24
- 440:	24 c0       	rjmp	.+72     	; 0x48a <__stack+0x2b>
+ 440:	47 c0       	rjmp	.+142    	; 0x4d0 <__stack+0x71>
 			BIT_SET(led_port[i+1],led_pin[i+1]);
 			BIT_CLEAR(led_port[i],led_pin[i]);
 		} else if(status_dev[i/2] == RUN) {
@@ -964,9 +964,9 @@ static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
  442:	f8 01       	movw	r30, r16
  444:	e8 0f       	add	r30, r24
  446:	f9 1f       	adc	r31, r25
- 448:	80 81       	ld	r24, Z
- 44a:	88 23       	and	r24, r24
- 44c:	f1 f4       	brne	.+60     	; 0x48a <__stack+0x2b>
+ 448:	30 81       	ld	r19, Z
+ 44a:	33 23       	and	r19, r19
+ 44c:	f9 f4       	brne	.+62     	; 0x48c <__stack+0x2d>
 			BIT_CLEAR(led_port[i],led_pin[i]);
  44e:	ec 91       	ld	r30, X
  450:	f0 e0       	ldi	r31, 0x00	; 0
@@ -1016,857 +1016,950 @@ static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
  484:	83 23       	and	r24, r19
  486:	f6 01       	movw	r30, r12
  488:	80 83       	st	Z, r24
+ 48a:	22 c0       	rjmp	.+68     	; 0x4d0 <__stack+0x71>
+			BIT_SET(led_port[i],led_pin[i]);
+			BIT_SET(led_port[i+1],led_pin[i+1]);
+		} else if(status_dev[i/2] == 0) {
+			BIT_CLEAR(led_port[i],led_pin[i]);
+			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+		} else if(status_dev[i/2] == DEDECT) {
+ 48c:	f8 01       	movw	r30, r16
+ 48e:	e8 0f       	add	r30, r24
+ 490:	f9 1f       	adc	r31, r25
+ 492:	80 81       	ld	r24, Z
+ 494:	88 30       	cpi	r24, 0x08	; 8
+ 496:	e1 f4       	brne	.+56     	; 0x4d0 <__stack+0x71>
+			BIT_TOG(led_port[i],led_pin[i]);
+ 498:	ec 91       	ld	r30, X
+ 49a:	f0 e0       	ldi	r31, 0x00	; 0
+static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
+	return *target & (1<<bit);
+}
+
+static inline void BIT_TOG(volatile uint8_t *target, uint8_t bit) {
+	*target ^= (1<<bit);
+ 49c:	30 81       	ld	r19, Z
+ 49e:	c7 01       	movw	r24, r14
+ 4a0:	08 80       	ld	r0, Y
+ 4a2:	02 c0       	rjmp	.+4      	; 0x4a8 <__stack+0x49>
+ 4a4:	88 0f       	add	r24, r24
+ 4a6:	99 1f       	adc	r25, r25
+ 4a8:	0a 94       	dec	r0
+ 4aa:	e2 f7       	brpl	.-8      	; 0x4a4 <__stack+0x45>
+ 4ac:	83 27       	eor	r24, r19
+ 4ae:	80 83       	st	Z, r24
+		} else if(status_dev[i/2] == 0) {
+			BIT_CLEAR(led_port[i],led_pin[i]);
+			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+		} else if(status_dev[i/2] == DEDECT) {
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
+ 4b0:	fa 01       	movw	r30, r20
+ 4b2:	c0 80       	ld	r12, Z
+ 4b4:	dd 24       	eor	r13, r13
+static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
+	return *target & (1<<bit);
+}
+
+static inline void BIT_TOG(volatile uint8_t *target, uint8_t bit) {
+	*target ^= (1<<bit);
+ 4b6:	f6 01       	movw	r30, r12
+ 4b8:	30 81       	ld	r19, Z
+ 4ba:	c7 01       	movw	r24, r14
+ 4bc:	fb 01       	movw	r30, r22
+ 4be:	00 80       	ld	r0, Z
+ 4c0:	02 c0       	rjmp	.+4      	; 0x4c6 <__stack+0x67>
+ 4c2:	88 0f       	add	r24, r24
+ 4c4:	99 1f       	adc	r25, r25
+ 4c6:	0a 94       	dec	r0
+ 4c8:	e2 f7       	brpl	.-8      	; 0x4c2 <__stack+0x63>
+ 4ca:	83 27       	eor	r24, r19
+ 4cc:	f6 01       	movw	r30, r12
+ 4ce:	80 83       	st	Z, r24
 	//Rows auf PullUp
 	PORTD |= ((1<<PIND0) | (1<<PIND1) | (1<<PIND3)); 
 }
 
 void led() {
 	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
- 48a:	2e 5f       	subi	r18, 0xFE	; 254
- 48c:	12 96       	adiw	r26, 0x02	; 2
- 48e:	22 96       	adiw	r28, 0x02	; 2
- 490:	4e 5f       	subi	r20, 0xFE	; 254
- 492:	5f 4f       	sbci	r21, 0xFF	; 255
- 494:	6e 5f       	subi	r22, 0xFE	; 254
- 496:	7f 4f       	sbci	r23, 0xFF	; 255
- 498:	2a 30       	cpi	r18, 0x0A	; 10
- 49a:	09 f0       	breq	.+2      	; 0x49e <__stack+0x3f>
- 49c:	64 cf       	rjmp	.-312    	; 0x366 <led+0x30>
-		} else if(status_dev[i/2] == 0) {
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 4d0:	2e 5f       	subi	r18, 0xFE	; 254
+ 4d2:	12 96       	adiw	r26, 0x02	; 2
+ 4d4:	22 96       	adiw	r28, 0x02	; 2
+ 4d6:	4e 5f       	subi	r20, 0xFE	; 254
+ 4d8:	5f 4f       	sbci	r21, 0xFF	; 255
+ 4da:	6e 5f       	subi	r22, 0xFE	; 254
+ 4dc:	7f 4f       	sbci	r23, 0xFF	; 255
+ 4de:	2a 30       	cpi	r18, 0x0A	; 10
+ 4e0:	09 f0       	breq	.+2      	; 0x4e4 <__stack+0x85>
+ 4e2:	41 cf       	rjmp	.-382    	; 0x366 <led+0x30>
+		} else if(status_dev[i/2] == DEDECT) {
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
- 49e:	df 91       	pop	r29
- 4a0:	cf 91       	pop	r28
- 4a2:	1f 91       	pop	r17
- 4a4:	0f 91       	pop	r16
- 4a6:	ff 90       	pop	r15
- 4a8:	ef 90       	pop	r14
- 4aa:	df 90       	pop	r13
- 4ac:	cf 90       	pop	r12
- 4ae:	08 95       	ret
+ 4e4:	df 91       	pop	r29
+ 4e6:	cf 91       	pop	r28
+ 4e8:	1f 91       	pop	r17
+ 4ea:	0f 91       	pop	r16
+ 4ec:	ff 90       	pop	r15
+ 4ee:	ef 90       	pop	r14
+ 4f0:	df 90       	pop	r13
+ 4f2:	cf 90       	pop	r12
+ 4f4:	08 95       	ret
 
-000004b0 <poll>:
+000004f6 <poll>:
 void poll() {
- 4b0:	2f 92       	push	r2
- 4b2:	3f 92       	push	r3
- 4b4:	4f 92       	push	r4
- 4b6:	5f 92       	push	r5
- 4b8:	6f 92       	push	r6
- 4ba:	7f 92       	push	r7
- 4bc:	8f 92       	push	r8
- 4be:	9f 92       	push	r9
- 4c0:	af 92       	push	r10
- 4c2:	bf 92       	push	r11
- 4c4:	cf 92       	push	r12
- 4c6:	df 92       	push	r13
- 4c8:	ef 92       	push	r14
- 4ca:	ff 92       	push	r15
- 4cc:	0f 93       	push	r16
- 4ce:	1f 93       	push	r17
- 4d0:	cf 93       	push	r28
- 4d2:	df 93       	push	r29
-	led();
- 4d4:	30 df       	rcall	.-416    	; 0x336 <led>
- 4d6:	4f e7       	ldi	r20, 0x7F	; 127
- 4d8:	50 e0       	ldi	r21, 0x00	; 0
- 4da:	65 e7       	ldi	r22, 0x75	; 117
- 4dc:	70 e0       	ldi	r23, 0x00	; 0
- 4de:	cb e6       	ldi	r28, 0x6B	; 107
- 4e0:	d0 e0       	ldi	r29, 0x00	; 0
- 4e2:	01 e6       	ldi	r16, 0x61	; 97
- 4e4:	10 e0       	ldi	r17, 0x00	; 0
-	uint8_t to = 0;
-	uint8_t data = 0;
-	
-	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
- 4e6:	20 e0       	ldi	r18, 0x00	; 0
-	}	
-}
-void poll() {
-	led();
-	uint8_t to = 0;
-	uint8_t data = 0;
- 4e8:	22 24       	eor	r2, r2
-		}
-	}	
-}
-void poll() {
-	led();
-	uint8_t to = 0;
- 4ea:	33 24       	eor	r3, r3
-static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
-	*target |= (1<<bit);
-}
-
-static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
-	*target &= ~(1<<bit);
- 4ec:	ee 24       	eor	r14, r14
- 4ee:	ff 24       	eor	r15, r15
- 4f0:	e3 94       	inc	r14
+ 4f6:	2f 92       	push	r2
+ 4f8:	3f 92       	push	r3
+ 4fa:	4f 92       	push	r4
+ 4fc:	5f 92       	push	r5
+ 4fe:	6f 92       	push	r6
+ 500:	7f 92       	push	r7
+ 502:	8f 92       	push	r8
+ 504:	9f 92       	push	r9
+ 506:	af 92       	push	r10
+ 508:	bf 92       	push	r11
+ 50a:	cf 92       	push	r12
+ 50c:	df 92       	push	r13
+ 50e:	ef 92       	push	r14
+ 510:	ff 92       	push	r15
+ 512:	0f 93       	push	r16
+ 514:	1f 93       	push	r17
+ 516:	cf 93       	push	r28
+ 518:	df 93       	push	r29
 		
 		//Run Schalter
 		BIT_CLEAR(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf 0
 		_delay_us(0.01);
 		if(!BIT_ON(in_row_port[i+1],in_row_pin[i+1])) {
 			data = SETRUN;
- 4f2:	6a 01       	movw	r12, r20
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 51a:	4f e7       	ldi	r20, 0x7F	; 127
+ 51c:	50 e0       	ldi	r21, 0x00	; 0
+ 51e:	65 e7       	ldi	r22, 0x75	; 117
+ 520:	70 e0       	ldi	r23, 0x00	; 0
+ 522:	cb e6       	ldi	r28, 0x6B	; 107
+ 524:	d0 e0       	ldi	r29, 0x00	; 0
+ 526:	01 e6       	ldi	r16, 0x61	; 97
+ 528:	10 e0       	ldi	r17, 0x00	; 0
+}
+void poll() {
+	uint8_t to = 0;
+	uint8_t data = 0;
+	
+	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
+ 52a:	20 e0       	ldi	r18, 0x00	; 0
 		}
 	}	
 }
 void poll() {
- 4f4:	56 01       	movw	r10, r12
- 4f6:	f6 01       	movw	r30, r12
- 4f8:	31 97       	sbiw	r30, 0x01	; 1
+	uint8_t to = 0;
+	uint8_t data = 0;
+ 52c:	22 24       	eor	r2, r2
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
+		}
+	}	
+}
+void poll() {
+	uint8_t to = 0;
+ 52e:	33 24       	eor	r3, r3
+static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
+	*target |= (1<<bit);
+}
+
+static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
+	*target &= ~(1<<bit);
+ 530:	ee 24       	eor	r14, r14
+ 532:	ff 24       	eor	r15, r15
+ 534:	e3 94       	inc	r14
+		
+		//Run Schalter
+		BIT_CLEAR(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf 0
+		_delay_us(0.01);
+		if(!BIT_ON(in_row_port[i+1],in_row_pin[i+1])) {
+			data = SETRUN;
+ 536:	6a 01       	movw	r12, r20
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
+		}
+	}	
+}
+void poll() {
+ 538:	56 01       	movw	r10, r12
+ 53a:	f6 01       	movw	r30, r12
+ 53c:	31 97       	sbiw	r30, 0x01	; 1
 	uint8_t to = 0;
 	uint8_t data = 0;
 	
 	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
 		//Status Schalter
 		BIT_CLEAR(in_collumn_port[i],in_collumn_pin[i]); //Collumn auf 0
- 4fa:	a0 81       	ld	r26, Z
- 4fc:	b0 e0       	ldi	r27, 0x00	; 0
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 53e:	a0 81       	ld	r26, Z
+ 540:	b0 e0       	ldi	r27, 0x00	; 0
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
 void poll() {
- 4fe:	3b 01       	movw	r6, r22
+ 542:	3b 01       	movw	r6, r22
 static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
 	*target |= (1<<bit);
 }
 
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 	*target &= ~(1<<bit);
- 500:	8c 91       	ld	r24, X
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 544:	8c 91       	ld	r24, X
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
 void poll() {
- 502:	fb 01       	movw	r30, r22
- 504:	31 97       	sbiw	r30, 0x01	; 1
+ 546:	fb 01       	movw	r30, r22
+ 548:	31 97       	sbiw	r30, 0x01	; 1
 static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
 	*target |= (1<<bit);
 }
 
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 	*target &= ~(1<<bit);
- 506:	a7 01       	movw	r20, r14
- 508:	00 80       	ld	r0, Z
- 50a:	02 c0       	rjmp	.+4      	; 0x510 <poll+0x60>
- 50c:	44 0f       	add	r20, r20
- 50e:	55 1f       	adc	r21, r21
- 510:	0a 94       	dec	r0
- 512:	e2 f7       	brpl	.-8      	; 0x50c <poll+0x5c>
- 514:	94 2f       	mov	r25, r20
- 516:	90 95       	com	r25
- 518:	89 23       	and	r24, r25
- 51a:	8c 93       	st	X, r24
+ 54a:	a7 01       	movw	r20, r14
+ 54c:	00 80       	ld	r0, Z
+ 54e:	02 c0       	rjmp	.+4      	; 0x554 <poll+0x5e>
+ 550:	44 0f       	add	r20, r20
+ 552:	55 1f       	adc	r21, r21
+ 554:	0a 94       	dec	r0
+ 556:	e2 f7       	brpl	.-8      	; 0x550 <poll+0x5a>
+ 558:	94 2f       	mov	r25, r20
+ 55a:	90 95       	com	r25
+ 55c:	89 23       	and	r24, r25
+ 55e:	8c 93       	st	X, r24
 	#else
 		//round up by default
 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
 	#endif
 
 	__builtin_avr_delay_cycles(__ticks_dc);
- 51c:	00 00       	nop
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 560:	00 00       	nop
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
 void poll() {
- 51e:	4e 01       	movw	r8, r28
- 520:	fe 01       	movw	r30, r28
- 522:	31 97       	sbiw	r30, 0x01	; 1
+ 562:	4e 01       	movw	r8, r28
+ 564:	fe 01       	movw	r30, r28
+ 566:	31 97       	sbiw	r30, 0x01	; 1
 	
 	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
 		//Status Schalter
 		BIT_CLEAR(in_collumn_port[i],in_collumn_pin[i]); //Collumn auf 0
 		_delay_us(0.01);
 		if(!BIT_ON(in_row_port[i],in_row_pin[i])) {
- 524:	e0 81       	ld	r30, Z
- 526:	f0 e0       	ldi	r31, 0x00	; 0
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 568:	e0 81       	ld	r30, Z
+ 56a:	f0 e0       	ldi	r31, 0x00	; 0
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
 void poll() {
- 528:	28 01       	movw	r4, r16
+ 56c:	28 01       	movw	r4, r16
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 	*target &= ~(1<<bit);
 }
 
 static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
 	return *target & (1<<bit);
- 52a:	30 81       	ld	r19, Z
-			BIT_CLEAR(led_port[i],led_pin[i]);
-			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+ 56e:	30 81       	ld	r19, Z
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
 void poll() {
- 52c:	f8 01       	movw	r30, r16
- 52e:	31 97       	sbiw	r30, 0x01	; 1
+ 570:	f8 01       	movw	r30, r16
+ 572:	31 97       	sbiw	r30, 0x01	; 1
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 	*target &= ~(1<<bit);
 }
 
 static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
 	return *target & (1<<bit);
- 530:	c7 01       	movw	r24, r14
- 532:	00 80       	ld	r0, Z
- 534:	02 c0       	rjmp	.+4      	; 0x53a <poll+0x8a>
- 536:	88 0f       	add	r24, r24
- 538:	99 1f       	adc	r25, r25
- 53a:	0a 94       	dec	r0
- 53c:	e2 f7       	brpl	.-8      	; 0x536 <poll+0x86>
- 53e:	83 23       	and	r24, r19
+ 574:	c7 01       	movw	r24, r14
+ 576:	00 80       	ld	r0, Z
+ 578:	02 c0       	rjmp	.+4      	; 0x57e <poll+0x88>
+ 57a:	88 0f       	add	r24, r24
+ 57c:	99 1f       	adc	r25, r25
+ 57e:	0a 94       	dec	r0
+ 580:	e2 f7       	brpl	.-8      	; 0x57a <poll+0x84>
+ 582:	83 23       	and	r24, r19
 	
 	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
 		//Status Schalter
 		BIT_CLEAR(in_collumn_port[i],in_collumn_pin[i]); //Collumn auf 0
 		_delay_us(0.01);
 		if(!BIT_ON(in_row_port[i],in_row_pin[i])) {
- 540:	b1 f4       	brne	.+44     	; 0x56e <poll+0xbe>
+ 584:	b1 f4       	brne	.+44     	; 0x5b2 <poll+0xbc>
 			if(status_dev[i/2] == SLEEP) {
- 542:	82 2f       	mov	r24, r18
- 544:	86 95       	lsr	r24
- 546:	e1 ea       	ldi	r30, 0xA1	; 161
- 548:	f0 e0       	ldi	r31, 0x00	; 0
- 54a:	e8 0f       	add	r30, r24
- 54c:	f1 1d       	adc	r31, r1
- 54e:	90 81       	ld	r25, Z
- 550:	92 30       	cpi	r25, 0x02	; 2
- 552:	29 f4       	brne	.+10     	; 0x55e <poll+0xae>
+ 586:	82 2f       	mov	r24, r18
+ 588:	86 95       	lsr	r24
+ 58a:	e1 ea       	ldi	r30, 0xA1	; 161
+ 58c:	f0 e0       	ldi	r31, 0x00	; 0
+ 58e:	e8 0f       	add	r30, r24
+ 590:	f1 1d       	adc	r31, r1
+ 592:	90 81       	ld	r25, Z
+ 594:	92 30       	cpi	r25, 0x02	; 2
+ 596:	29 f4       	brne	.+10     	; 0x5a2 <poll+0xac>
 				data = SETACTIVE;
- 554:	0f 2e       	mov	r0, r31
- 556:	f5 e0       	ldi	r31, 0x05	; 5
- 558:	2f 2e       	mov	r2, r31
- 55a:	f0 2d       	mov	r31, r0
- 55c:	03 c0       	rjmp	.+6      	; 0x564 <poll+0xb4>
+ 598:	0f 2e       	mov	r0, r31
+ 59a:	f5 e0       	ldi	r31, 0x05	; 5
+ 59c:	2f 2e       	mov	r2, r31
+ 59e:	f0 2d       	mov	r31, r0
+ 5a0:	03 c0       	rjmp	.+6      	; 0x5a8 <poll+0xb2>
 			} else {
 				data = SETSLEEP;
- 55e:	22 24       	eor	r2, r2
- 560:	68 94       	set
- 562:	22 f8       	bld	r2, 2
+ 5a2:	22 24       	eor	r2, r2
+ 5a4:	68 94       	set
+ 5a6:	22 f8       	bld	r2, 2
 			}
 			//Device
 			to = (i/2)+10;			
- 564:	0f 2e       	mov	r0, r31
- 566:	fa e0       	ldi	r31, 0x0A	; 10
- 568:	3f 2e       	mov	r3, r31
- 56a:	f0 2d       	mov	r31, r0
- 56c:	38 0e       	add	r3, r24
+ 5a8:	0f 2e       	mov	r0, r31
+ 5aa:	fa e0       	ldi	r31, 0x0A	; 10
+ 5ac:	3f 2e       	mov	r3, r31
+ 5ae:	f0 2d       	mov	r31, r0
+ 5b0:	38 0e       	add	r3, r24
 		recive();
     }
 }
 
 static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
 	*target |= (1<<bit);
- 56e:	8c 91       	ld	r24, X
- 570:	84 2b       	or	r24, r20
- 572:	8c 93       	st	X, r24
- 574:	00 00       	nop
+ 5b2:	8c 91       	ld	r24, X
+ 5b4:	84 2b       	or	r24, r20
+ 5b6:	8c 93       	st	X, r24
+ 5b8:	00 00       	nop
 		}
 		BIT_SET(in_collumn_port[i],in_collumn_pin[i]); //Collumn auf wieder auf 1
 		_delay_us(0.01);
 		
 		//Run Schalter
 		BIT_CLEAR(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf 0
- 576:	f5 01       	movw	r30, r10
- 578:	a0 81       	ld	r26, Z
- 57a:	b0 e0       	ldi	r27, 0x00	; 0
+ 5ba:	f5 01       	movw	r30, r10
+ 5bc:	a0 81       	ld	r26, Z
+ 5be:	b0 e0       	ldi	r27, 0x00	; 0
 static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
 	*target |= (1<<bit);
 }
 
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 	*target &= ~(1<<bit);
- 57c:	8c 91       	ld	r24, X
- 57e:	a7 01       	movw	r20, r14
- 580:	f3 01       	movw	r30, r6
- 582:	00 80       	ld	r0, Z
- 584:	02 c0       	rjmp	.+4      	; 0x58a <poll+0xda>
- 586:	44 0f       	add	r20, r20
- 588:	55 1f       	adc	r21, r21
- 58a:	0a 94       	dec	r0
- 58c:	e2 f7       	brpl	.-8      	; 0x586 <poll+0xd6>
- 58e:	94 2f       	mov	r25, r20
- 590:	90 95       	com	r25
- 592:	89 23       	and	r24, r25
- 594:	8c 93       	st	X, r24
- 596:	00 00       	nop
+ 5c0:	8c 91       	ld	r24, X
+ 5c2:	a7 01       	movw	r20, r14
+ 5c4:	f3 01       	movw	r30, r6
+ 5c6:	00 80       	ld	r0, Z
+ 5c8:	02 c0       	rjmp	.+4      	; 0x5ce <poll+0xd8>
+ 5ca:	44 0f       	add	r20, r20
+ 5cc:	55 1f       	adc	r21, r21
+ 5ce:	0a 94       	dec	r0
+ 5d0:	e2 f7       	brpl	.-8      	; 0x5ca <poll+0xd4>
+ 5d2:	94 2f       	mov	r25, r20
+ 5d4:	90 95       	com	r25
+ 5d6:	89 23       	and	r24, r25
+ 5d8:	8c 93       	st	X, r24
+ 5da:	00 00       	nop
 		_delay_us(0.01);
 		
 		//Run Schalter
 		BIT_CLEAR(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf 0
 		_delay_us(0.01);
 		if(!BIT_ON(in_row_port[i+1],in_row_pin[i+1])) {
- 598:	f4 01       	movw	r30, r8
- 59a:	80 81       	ld	r24, Z
- 59c:	e8 2f       	mov	r30, r24
- 59e:	f0 e0       	ldi	r31, 0x00	; 0
+ 5dc:	f4 01       	movw	r30, r8
+ 5de:	80 81       	ld	r24, Z
+ 5e0:	e8 2f       	mov	r30, r24
+ 5e2:	f0 e0       	ldi	r31, 0x00	; 0
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 	*target &= ~(1<<bit);
 }
 
 static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
 	return *target & (1<<bit);
- 5a0:	30 81       	ld	r19, Z
- 5a2:	c7 01       	movw	r24, r14
- 5a4:	f2 01       	movw	r30, r4
- 5a6:	00 80       	ld	r0, Z
- 5a8:	02 c0       	rjmp	.+4      	; 0x5ae <poll+0xfe>
- 5aa:	88 0f       	add	r24, r24
- 5ac:	99 1f       	adc	r25, r25
- 5ae:	0a 94       	dec	r0
- 5b0:	e2 f7       	brpl	.-8      	; 0x5aa <poll+0xfa>
- 5b2:	83 23       	and	r24, r19
+ 5e4:	30 81       	ld	r19, Z
+ 5e6:	c7 01       	movw	r24, r14
+ 5e8:	f2 01       	movw	r30, r4
+ 5ea:	00 80       	ld	r0, Z
+ 5ec:	02 c0       	rjmp	.+4      	; 0x5f2 <poll+0xfc>
+ 5ee:	88 0f       	add	r24, r24
+ 5f0:	99 1f       	adc	r25, r25
+ 5f2:	0a 94       	dec	r0
+ 5f4:	e2 f7       	brpl	.-8      	; 0x5ee <poll+0xf8>
+ 5f6:	83 23       	and	r24, r19
 		_delay_us(0.01);
 		
 		//Run Schalter
 		BIT_CLEAR(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf 0
 		_delay_us(0.01);
 		if(!BIT_ON(in_row_port[i+1],in_row_pin[i+1])) {
- 5b4:	59 f4       	brne	.+22     	; 0x5cc <poll+0x11c>
+ 5f8:	59 f4       	brne	.+22     	; 0x610 <poll+0x11a>
 			data = SETRUN;
 			//Device
 			to = (i/2)+10;
- 5b6:	82 2f       	mov	r24, r18
- 5b8:	86 95       	lsr	r24
- 5ba:	0f 2e       	mov	r0, r31
- 5bc:	fa e0       	ldi	r31, 0x0A	; 10
- 5be:	3f 2e       	mov	r3, r31
- 5c0:	f0 2d       	mov	r31, r0
- 5c2:	38 0e       	add	r3, r24
+ 5fa:	82 2f       	mov	r24, r18
+ 5fc:	86 95       	lsr	r24
+ 5fe:	0f 2e       	mov	r0, r31
+ 600:	fa e0       	ldi	r31, 0x0A	; 10
+ 602:	3f 2e       	mov	r3, r31
+ 604:	f0 2d       	mov	r31, r0
+ 606:	38 0e       	add	r3, r24
 		
 		//Run Schalter
 		BIT_CLEAR(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf 0
 		_delay_us(0.01);
 		if(!BIT_ON(in_row_port[i+1],in_row_pin[i+1])) {
 			data = SETRUN;
- 5c4:	0f 2e       	mov	r0, r31
- 5c6:	f7 e0       	ldi	r31, 0x07	; 7
- 5c8:	2f 2e       	mov	r2, r31
- 5ca:	f0 2d       	mov	r31, r0
+ 608:	0f 2e       	mov	r0, r31
+ 60a:	f7 e0       	ldi	r31, 0x07	; 7
+ 60c:	2f 2e       	mov	r2, r31
+ 60e:	f0 2d       	mov	r31, r0
 		recive();
     }
 }
 
 static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) {
 	*target |= (1<<bit);
- 5cc:	8c 91       	ld	r24, X
- 5ce:	48 2b       	or	r20, r24
- 5d0:	4c 93       	st	X, r20
- 5d2:	00 00       	nop
+ 610:	8c 91       	ld	r24, X
+ 612:	48 2b       	or	r20, r24
+ 614:	4c 93       	st	X, r20
+ 616:	00 00       	nop
+}
 void poll() {
-	led();
 	uint8_t to = 0;
 	uint8_t data = 0;
 	
 	for(uint8_t i=0;i<NUMDEV*2;i=i+2) {
- 5d4:	2e 5f       	subi	r18, 0xFE	; 254
- 5d6:	82 e0       	ldi	r24, 0x02	; 2
- 5d8:	90 e0       	ldi	r25, 0x00	; 0
- 5da:	c8 0e       	add	r12, r24
- 5dc:	d9 1e       	adc	r13, r25
- 5de:	6e 5f       	subi	r22, 0xFE	; 254
- 5e0:	7f 4f       	sbci	r23, 0xFF	; 255
- 5e2:	22 96       	adiw	r28, 0x02	; 2
- 5e4:	0e 5f       	subi	r16, 0xFE	; 254
- 5e6:	1f 4f       	sbci	r17, 0xFF	; 255
- 5e8:	2a 30       	cpi	r18, 0x0A	; 10
- 5ea:	09 f0       	breq	.+2      	; 0x5ee <poll+0x13e>
- 5ec:	83 cf       	rjmp	.-250    	; 0x4f4 <poll+0x44>
+ 618:	2e 5f       	subi	r18, 0xFE	; 254
+ 61a:	82 e0       	ldi	r24, 0x02	; 2
+ 61c:	90 e0       	ldi	r25, 0x00	; 0
+ 61e:	c8 0e       	add	r12, r24
+ 620:	d9 1e       	adc	r13, r25
+ 622:	6e 5f       	subi	r22, 0xFE	; 254
+ 624:	7f 4f       	sbci	r23, 0xFF	; 255
+ 626:	22 96       	adiw	r28, 0x02	; 2
+ 628:	0e 5f       	subi	r16, 0xFE	; 254
+ 62a:	1f 4f       	sbci	r17, 0xFF	; 255
+ 62c:	2a 30       	cpi	r18, 0x0A	; 10
+ 62e:	09 f0       	breq	.+2      	; 0x632 <poll+0x13c>
+ 630:	83 cf       	rjmp	.-250    	; 0x538 <poll+0x42>
 			to = (i/2)+10;
 		}
 		BIT_SET(in_collumn_port[i+1],in_collumn_pin[i+1]); //Collumn auf wieder auf 1
 		_delay_us(0.01);
 	}
 	if(to != 0 && data != 0) {
- 5ee:	33 20       	and	r3, r3
- 5f0:	e1 f0       	breq	.+56     	; 0x62a <poll+0x17a>
- 5f2:	22 20       	and	r2, r2
- 5f4:	d1 f0       	breq	.+52     	; 0x62a <poll+0x17a>
+ 632:	33 20       	and	r3, r3
+ 634:	e1 f0       	breq	.+56     	; 0x66e <poll+0x178>
+ 636:	22 20       	and	r2, r2
+ 638:	d1 f0       	breq	.+52     	; 0x66e <poll+0x178>
 		cli();
- 5f6:	f8 94       	cli
+ 63a:	f8 94       	cli
 		DDRC |= (1<<PC5);
- 5f8:	a5 9a       	sbi	0x14, 5	; 20
+ 63c:	a5 9a       	sbi	0x14, 5	; 20
 		PORTC |= (1<<PC5);
- 5fa:	ad 9a       	sbi	0x15, 5	; 21
+ 63e:	ad 9a       	sbi	0x15, 5	; 21
 		rf12_endasyncrx();
- 5fc:	e2 dd       	rcall	.-1084   	; 0x1c2 <rf12_endasyncrx>
+ 640:	c0 dd       	rcall	.-1152   	; 0x1c2 <rf12_endasyncrx>
 	#else
 		//round up by default
 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
 	#endif
 
 	__builtin_avr_delay_cycles(__ticks_dc);
- 5fe:	af e3       	ldi	r26, 0x3F	; 63
- 600:	bc e9       	ldi	r27, 0x9C	; 156
- 602:	11 97       	sbiw	r26, 0x01	; 1
- 604:	f1 f7       	brne	.-4      	; 0x602 <poll+0x152>
- 606:	00 c0       	rjmp	.+0      	; 0x608 <poll+0x158>
- 608:	00 00       	nop
+ 642:	af e3       	ldi	r26, 0x3F	; 63
+ 644:	bc e9       	ldi	r27, 0x9C	; 156
+ 646:	11 97       	sbiw	r26, 0x01	; 1
+ 648:	f1 f7       	brne	.-4      	; 0x646 <poll+0x150>
+ 64a:	00 c0       	rjmp	.+0      	; 0x64c <poll+0x156>
+ 64c:	00 00       	nop
 		_delay_ms(20);
 		rf12_txpacket(to, MASTER, data);
- 60a:	83 2d       	mov	r24, r3
- 60c:	61 e0       	ldi	r22, 0x01	; 1
- 60e:	42 2d       	mov	r20, r2
- 610:	3f de       	rcall	.-898    	; 0x290 <rf12_txpacket>
+ 64e:	83 2d       	mov	r24, r3
+ 650:	61 e0       	ldi	r22, 0x01	; 1
+ 652:	42 2d       	mov	r20, r2
+ 654:	1d de       	rcall	.-966    	; 0x290 <rf12_txpacket>
 		PORTC &= ~(1<<PC5);
- 612:	ad 98       	cbi	0x15, 5	; 21
- 614:	8f e7       	ldi	r24, 0x7F	; 127
- 616:	98 e3       	ldi	r25, 0x38	; 56
- 618:	a1 e0       	ldi	r26, 0x01	; 1
- 61a:	81 50       	subi	r24, 0x01	; 1
- 61c:	90 40       	sbci	r25, 0x00	; 0
- 61e:	a0 40       	sbci	r26, 0x00	; 0
- 620:	e1 f7       	brne	.-8      	; 0x61a <poll+0x16a>
- 622:	00 c0       	rjmp	.+0      	; 0x624 <poll+0x174>
- 624:	00 00       	nop
+ 656:	ad 98       	cbi	0x15, 5	; 21
+ 658:	8f e7       	ldi	r24, 0x7F	; 127
+ 65a:	98 e3       	ldi	r25, 0x38	; 56
+ 65c:	a1 e0       	ldi	r26, 0x01	; 1
+ 65e:	81 50       	subi	r24, 0x01	; 1
+ 660:	90 40       	sbci	r25, 0x00	; 0
+ 662:	a0 40       	sbci	r26, 0x00	; 0
+ 664:	e1 f7       	brne	.-8      	; 0x65e <poll+0x168>
+ 666:	00 c0       	rjmp	.+0      	; 0x668 <poll+0x172>
+ 668:	00 00       	nop
 		_delay_ms(50);
 		rf12_beginasyncrx();
- 626:	ba dd       	rcall	.-1164   	; 0x19c <rf12_beginasyncrx>
+ 66a:	98 dd       	rcall	.-1232   	; 0x19c <rf12_beginasyncrx>
 		sei();
- 628:	78 94       	sei
+ 66c:	78 94       	sei
 	}
 }
- 62a:	df 91       	pop	r29
- 62c:	cf 91       	pop	r28
- 62e:	1f 91       	pop	r17
- 630:	0f 91       	pop	r16
- 632:	ff 90       	pop	r15
- 634:	ef 90       	pop	r14
- 636:	df 90       	pop	r13
- 638:	cf 90       	pop	r12
- 63a:	bf 90       	pop	r11
- 63c:	af 90       	pop	r10
- 63e:	9f 90       	pop	r9
- 640:	8f 90       	pop	r8
- 642:	7f 90       	pop	r7
- 644:	6f 90       	pop	r6
- 646:	5f 90       	pop	r5
- 648:	4f 90       	pop	r4
- 64a:	3f 90       	pop	r3
- 64c:	2f 90       	pop	r2
- 64e:	08 95       	ret
+ 66e:	df 91       	pop	r29
+ 670:	cf 91       	pop	r28
+ 672:	1f 91       	pop	r17
+ 674:	0f 91       	pop	r16
+ 676:	ff 90       	pop	r15
+ 678:	ef 90       	pop	r14
+ 67a:	df 90       	pop	r13
+ 67c:	cf 90       	pop	r12
+ 67e:	bf 90       	pop	r11
+ 680:	af 90       	pop	r10
+ 682:	9f 90       	pop	r9
+ 684:	8f 90       	pop	r8
+ 686:	7f 90       	pop	r7
+ 688:	6f 90       	pop	r6
+ 68a:	5f 90       	pop	r5
+ 68c:	4f 90       	pop	r4
+ 68e:	3f 90       	pop	r3
+ 690:	2f 90       	pop	r2
+ 692:	08 95       	ret
 
-00000650 <recive>:
+00000694 <recive>:
 
 void recive() {
- 650:	cf 93       	push	r28
+ 694:	cf 93       	push	r28
 	rf12_beginasyncrx();
- 652:	a4 dd       	rcall	.-1208   	; 0x19c <rf12_beginasyncrx>
+ 696:	82 dd       	rcall	.-1276   	; 0x19c <rf12_beginasyncrx>
 	while(rf12_hasdata()) {
- 654:	01 c0       	rjmp	.+2      	; 0x658 <recive+0x8>
+ 698:	01 c0       	rjmp	.+2      	; 0x69c <recive+0x8>
 		poll();
- 656:	2c df       	rcall	.-424    	; 0x4b0 <poll>
+ 69a:	2d df       	rcall	.-422    	; 0x4f6 <poll>
 	}
 }
 
 void recive() {
 	rf12_beginasyncrx();
 	while(rf12_hasdata()) {
- 658:	ab dd       	rcall	.-1194   	; 0x1b0 <rf12_hasdata>
- 65a:	88 23       	and	r24, r24
- 65c:	e1 f7       	brne	.-8      	; 0x656 <recive+0x6>
+ 69c:	89 dd       	rcall	.-1262   	; 0x1b0 <rf12_hasdata>
+ 69e:	88 23       	and	r24, r24
+ 6a0:	e1 f7       	brne	.-8      	; 0x69a <recive+0x6>
 		poll();
 	}
 	uint8_t addr = rf12_rxbyte();
- 65e:	ad dd       	rcall	.-1190   	; 0x1ba <rf12_rxbyte>
+ 6a2:	8b dd       	rcall	.-1258   	; 0x1ba <rf12_rxbyte>
 	if(addr == ALL || addr == MASTER) {
- 660:	82 30       	cpi	r24, 0x02	; 2
- 662:	d8 f5       	brcc	.+118    	; 0x6da <recive+0x8a>
- 664:	01 c0       	rjmp	.+2      	; 0x668 <recive+0x18>
+ 6a4:	82 30       	cpi	r24, 0x02	; 2
+ 6a6:	08 f0       	brcs	.+2      	; 0x6aa <recive+0x16>
+ 6a8:	4e c0       	rjmp	.+156    	; 0x746 <recive+0xb2>
+ 6aa:	01 c0       	rjmp	.+2      	; 0x6ae <recive+0x1a>
 		while(rf12_hasdata()) {
 			poll();
- 666:	24 df       	rcall	.-440    	; 0x4b0 <poll>
+ 6ac:	24 df       	rcall	.-440    	; 0x4f6 <poll>
 	while(rf12_hasdata()) {
 		poll();
 	}
 	uint8_t addr = rf12_rxbyte();
 	if(addr == ALL || addr == MASTER) {
 		while(rf12_hasdata()) {
- 668:	a3 dd       	rcall	.-1210   	; 0x1b0 <rf12_hasdata>
- 66a:	88 23       	and	r24, r24
- 66c:	e1 f7       	brne	.-8      	; 0x666 <recive+0x16>
+ 6ae:	80 dd       	rcall	.-1280   	; 0x1b0 <rf12_hasdata>
+ 6b0:	88 23       	and	r24, r24
+ 6b2:	e1 f7       	brne	.-8      	; 0x6ac <recive+0x18>
 			poll();
 		}
 		uint8_t from = rf12_rxbyte();
- 66e:	a5 dd       	rcall	.-1206   	; 0x1ba <rf12_rxbyte>
+ 6b4:	82 dd       	rcall	.-1276   	; 0x1ba <rf12_rxbyte>
 		if(from != MASTER) {
- 670:	81 30       	cpi	r24, 0x01	; 1
- 672:	99 f1       	breq	.+102    	; 0x6da <recive+0x8a>
+ 6b6:	81 30       	cpi	r24, 0x01	; 1
+ 6b8:	09 f4       	brne	.+2      	; 0x6bc <recive+0x28>
+ 6ba:	45 c0       	rjmp	.+138    	; 0x746 <recive+0xb2>
 			from = (from/10)-1;
- 674:	6a e0       	ldi	r22, 0x0A	; 10
- 676:	a4 d0       	rcall	.+328    	; 0x7c0 <__udivmodqi4>
- 678:	c8 2f       	mov	r28, r24
- 67a:	c1 50       	subi	r28, 0x01	; 1
+ 6bc:	6a e0       	ldi	r22, 0x0A	; 10
+ 6be:	b7 d0       	rcall	.+366    	; 0x82e <__udivmodqi4>
+ 6c0:	c8 2f       	mov	r28, r24
+ 6c2:	c1 50       	subi	r28, 0x01	; 1
 			while(rf12_hasdata()) {
- 67c:	01 c0       	rjmp	.+2      	; 0x680 <recive+0x30>
+ 6c4:	01 c0       	rjmp	.+2      	; 0x6c8 <recive+0x34>
 				poll();
- 67e:	18 df       	rcall	.-464    	; 0x4b0 <poll>
+ 6c6:	17 df       	rcall	.-466    	; 0x4f6 <poll>
 			poll();
 		}
 		uint8_t from = rf12_rxbyte();
 		if(from != MASTER) {
 			from = (from/10)-1;
 			while(rf12_hasdata()) {
- 680:	97 dd       	rcall	.-1234   	; 0x1b0 <rf12_hasdata>
- 682:	88 23       	and	r24, r24
- 684:	e1 f7       	brne	.-8      	; 0x67e <recive+0x2e>
+ 6c8:	73 dd       	rcall	.-1306   	; 0x1b0 <rf12_hasdata>
+ 6ca:	88 23       	and	r24, r24
+ 6cc:	e1 f7       	brne	.-8      	; 0x6c6 <recive+0x32>
 				poll();
 			}
 			uint8_t data = rf12_rxbyte();
- 686:	99 dd       	rcall	.-1230   	; 0x1ba <rf12_rxbyte>
+ 6ce:	75 dd       	rcall	.-1302   	; 0x1ba <rf12_rxbyte>
 			switch(data) {
- 688:	83 30       	cpi	r24, 0x03	; 3
- 68a:	81 f0       	breq	.+32     	; 0x6ac <recive+0x5c>
- 68c:	86 30       	cpi	r24, 0x06	; 6
- 68e:	d1 f0       	breq	.+52     	; 0x6c4 <recive+0x74>
- 690:	82 30       	cpi	r24, 0x02	; 2
- 692:	19 f5       	brne	.+70     	; 0x6da <recive+0x8a>
+ 6d0:	83 30       	cpi	r24, 0x03	; 3
+ 6d2:	b1 f0       	breq	.+44     	; 0x700 <recive+0x6c>
+ 6d4:	84 30       	cpi	r24, 0x04	; 4
+ 6d6:	18 f4       	brcc	.+6      	; 0x6de <recive+0x4a>
+ 6d8:	82 30       	cpi	r24, 0x02	; 2
+ 6da:	a9 f5       	brne	.+106    	; 0x746 <recive+0xb2>
+ 6dc:	05 c0       	rjmp	.+10     	; 0x6e8 <recive+0x54>
+ 6de:	86 30       	cpi	r24, 0x06	; 6
+ 6e0:	d9 f0       	breq	.+54     	; 0x718 <recive+0x84>
+ 6e2:	88 30       	cpi	r24, 0x08	; 8
+ 6e4:	81 f5       	brne	.+96     	; 0x746 <recive+0xb2>
+ 6e6:	24 c0       	rjmp	.+72     	; 0x730 <recive+0x9c>
 				case SLEEP: {
 					status_dev[from] = SLEEP;
- 694:	8c 2f       	mov	r24, r28
- 696:	90 e0       	ldi	r25, 0x00	; 0
- 698:	fc 01       	movw	r30, r24
- 69a:	ef 55       	subi	r30, 0x5F	; 95
- 69c:	ff 4f       	sbci	r31, 0xFF	; 255
- 69e:	22 e0       	ldi	r18, 0x02	; 2
- 6a0:	20 83       	st	Z, r18
+ 6e8:	8c 2f       	mov	r24, r28
+ 6ea:	90 e0       	ldi	r25, 0x00	; 0
+ 6ec:	fc 01       	movw	r30, r24
+ 6ee:	ef 55       	subi	r30, 0x5F	; 95
+ 6f0:	ff 4f       	sbci	r31, 0xFF	; 255
+ 6f2:	22 e0       	ldi	r18, 0x02	; 2
+ 6f4:	20 83       	st	Z, r18
 					status_count[from] = 0;
- 6a2:	84 56       	subi	r24, 0x64	; 100
- 6a4:	9f 4f       	sbci	r25, 0xFF	; 255
- 6a6:	fc 01       	movw	r30, r24
- 6a8:	10 82       	st	Z, r1
+ 6f6:	84 56       	subi	r24, 0x64	; 100
+ 6f8:	9f 4f       	sbci	r25, 0xFF	; 255
+ 6fa:	fc 01       	movw	r30, r24
+ 6fc:	10 82       	st	Z, r1
 					return;
- 6aa:	17 c0       	rjmp	.+46     	; 0x6da <recive+0x8a>
+ 6fe:	23 c0       	rjmp	.+70     	; 0x746 <recive+0xb2>
 				}
 				case ACTIVE: {
 					status_dev[from] = ACTIVE;
- 6ac:	8c 2f       	mov	r24, r28
- 6ae:	90 e0       	ldi	r25, 0x00	; 0
- 6b0:	fc 01       	movw	r30, r24
- 6b2:	ef 55       	subi	r30, 0x5F	; 95
- 6b4:	ff 4f       	sbci	r31, 0xFF	; 255
- 6b6:	23 e0       	ldi	r18, 0x03	; 3
- 6b8:	20 83       	st	Z, r18
+ 700:	8c 2f       	mov	r24, r28
+ 702:	90 e0       	ldi	r25, 0x00	; 0
+ 704:	fc 01       	movw	r30, r24
+ 706:	ef 55       	subi	r30, 0x5F	; 95
+ 708:	ff 4f       	sbci	r31, 0xFF	; 255
+ 70a:	23 e0       	ldi	r18, 0x03	; 3
+ 70c:	20 83       	st	Z, r18
 					status_count[from] = 0;
- 6ba:	84 56       	subi	r24, 0x64	; 100
- 6bc:	9f 4f       	sbci	r25, 0xFF	; 255
- 6be:	fc 01       	movw	r30, r24
- 6c0:	10 82       	st	Z, r1
+ 70e:	84 56       	subi	r24, 0x64	; 100
+ 710:	9f 4f       	sbci	r25, 0xFF	; 255
+ 712:	fc 01       	movw	r30, r24
+ 714:	10 82       	st	Z, r1
 					return;
- 6c2:	0b c0       	rjmp	.+22     	; 0x6da <recive+0x8a>
+ 716:	17 c0       	rjmp	.+46     	; 0x746 <recive+0xb2>
 				}
 				case RUN: {
 					status_dev[from] = RUN;
- 6c4:	8c 2f       	mov	r24, r28
- 6c6:	90 e0       	ldi	r25, 0x00	; 0
- 6c8:	fc 01       	movw	r30, r24
- 6ca:	ef 55       	subi	r30, 0x5F	; 95
- 6cc:	ff 4f       	sbci	r31, 0xFF	; 255
- 6ce:	26 e0       	ldi	r18, 0x06	; 6
- 6d0:	20 83       	st	Z, r18
+ 718:	8c 2f       	mov	r24, r28
+ 71a:	90 e0       	ldi	r25, 0x00	; 0
+ 71c:	fc 01       	movw	r30, r24
+ 71e:	ef 55       	subi	r30, 0x5F	; 95
+ 720:	ff 4f       	sbci	r31, 0xFF	; 255
+ 722:	26 e0       	ldi	r18, 0x06	; 6
+ 724:	20 83       	st	Z, r18
 					status_count[from] = 0;
- 6d2:	84 56       	subi	r24, 0x64	; 100
- 6d4:	9f 4f       	sbci	r25, 0xFF	; 255
- 6d6:	fc 01       	movw	r30, r24
- 6d8:	10 82       	st	Z, r1
+ 726:	84 56       	subi	r24, 0x64	; 100
+ 728:	9f 4f       	sbci	r25, 0xFF	; 255
+ 72a:	fc 01       	movw	r30, r24
+ 72c:	10 82       	st	Z, r1
+					return;
+ 72e:	0b c0       	rjmp	.+22     	; 0x746 <recive+0xb2>
+				}
+				case DEDECT: {
+					status_dev[from] = DEDECT;
+ 730:	8c 2f       	mov	r24, r28
+ 732:	90 e0       	ldi	r25, 0x00	; 0
+ 734:	fc 01       	movw	r30, r24
+ 736:	ef 55       	subi	r30, 0x5F	; 95
+ 738:	ff 4f       	sbci	r31, 0xFF	; 255
+ 73a:	28 e0       	ldi	r18, 0x08	; 8
+ 73c:	20 83       	st	Z, r18
+					status_count[from] = 0;
+ 73e:	84 56       	subi	r24, 0x64	; 100
+ 740:	9f 4f       	sbci	r25, 0xFF	; 255
+ 742:	fc 01       	movw	r30, r24
+ 744:	10 82       	st	Z, r1
 					return;
 				}
 			}
 		}		
 	}
 }
- 6da:	cf 91       	pop	r28
- 6dc:	08 95       	ret
+ 746:	cf 91       	pop	r28
+ 748:	08 95       	ret
 
-000006de <__vector_9>:
+0000074a <__vector_9>:
 
 // Timer 0 overflow interrupt service routine
 ISR(TIMER0_OVF_vect)
 {
- 6de:	1f 92       	push	r1
- 6e0:	0f 92       	push	r0
- 6e2:	0f b6       	in	r0, 0x3f	; 63
- 6e4:	0f 92       	push	r0
- 6e6:	11 24       	eor	r1, r1
- 6e8:	2f 93       	push	r18
- 6ea:	3f 93       	push	r19
- 6ec:	4f 93       	push	r20
- 6ee:	5f 93       	push	r21
- 6f0:	6f 93       	push	r22
- 6f2:	7f 93       	push	r23
- 6f4:	8f 93       	push	r24
- 6f6:	9f 93       	push	r25
- 6f8:	af 93       	push	r26
- 6fa:	bf 93       	push	r27
- 6fc:	ef 93       	push	r30
- 6fe:	ff 93       	push	r31
+ 74a:	1f 92       	push	r1
+ 74c:	0f 92       	push	r0
+ 74e:	0f b6       	in	r0, 0x3f	; 63
+ 750:	0f 92       	push	r0
+ 752:	11 24       	eor	r1, r1
+ 754:	2f 93       	push	r18
+ 756:	3f 93       	push	r19
+ 758:	4f 93       	push	r20
+ 75a:	5f 93       	push	r21
+ 75c:	6f 93       	push	r22
+ 75e:	7f 93       	push	r23
+ 760:	8f 93       	push	r24
+ 762:	9f 93       	push	r25
+ 764:	af 93       	push	r26
+ 766:	bf 93       	push	r27
+ 768:	ef 93       	push	r30
+ 76a:	ff 93       	push	r31
+	led();
+ 76c:	e4 dd       	rcall	.-1080   	; 0x336 <led>
 	if(timer2s < 16) {
- 700:	80 91 a6 00 	lds	r24, 0x00A6
- 704:	80 31       	cpi	r24, 0x10	; 16
- 706:	30 f4       	brcc	.+12     	; 0x714 <__vector_9+0x36>
+ 76e:	80 91 a6 00 	lds	r24, 0x00A6
+ 772:	80 31       	cpi	r24, 0x10	; 16
+ 774:	30 f4       	brcc	.+12     	; 0x782 <__vector_9+0x38>
 		timer2s++;
- 708:	80 91 a6 00 	lds	r24, 0x00A6
- 70c:	8f 5f       	subi	r24, 0xFF	; 255
- 70e:	80 93 a6 00 	sts	0x00A6, r24
+ 776:	80 91 a6 00 	lds	r24, 0x00A6
+ 77a:	8f 5f       	subi	r24, 0xFF	; 255
+ 77c:	80 93 a6 00 	sts	0x00A6, r24
 		return;
- 712:	23 c0       	rjmp	.+70     	; 0x75a <__vector_9+0x7c>
+ 780:	23 c0       	rjmp	.+70     	; 0x7c8 <__vector_9+0x7e>
 	} 
 	timer2s = 0;
- 714:	10 92 a6 00 	sts	0x00A6, r1
+ 782:	10 92 a6 00 	sts	0x00A6, r1
 	rf12_endasyncrx();
- 718:	54 dd       	rcall	.-1368   	; 0x1c2 <rf12_endasyncrx>
+ 786:	1d dd       	rcall	.-1478   	; 0x1c2 <rf12_endasyncrx>
 	rf12_txpacket(ALL, MASTER, PING);
- 71a:	80 e0       	ldi	r24, 0x00	; 0
- 71c:	61 e0       	ldi	r22, 0x01	; 1
- 71e:	41 e0       	ldi	r20, 0x01	; 1
- 720:	b7 dd       	rcall	.-1170   	; 0x290 <rf12_txpacket>
- 722:	80 e0       	ldi	r24, 0x00	; 0
- 724:	90 e0       	ldi	r25, 0x00	; 0
+ 788:	80 e0       	ldi	r24, 0x00	; 0
+ 78a:	61 e0       	ldi	r22, 0x01	; 1
+ 78c:	41 e0       	ldi	r20, 0x01	; 1
+ 78e:	80 dd       	rcall	.-1280   	; 0x290 <rf12_txpacket>
+ 790:	80 e0       	ldi	r24, 0x00	; 0
+ 792:	90 e0       	ldi	r25, 0x00	; 0
 	for(uint8_t i=0;i<NUMDEV;i++) {
 		if(status_count[i] > 10) {
- 726:	2c e9       	ldi	r18, 0x9C	; 156
- 728:	30 e0       	ldi	r19, 0x00	; 0
+ 794:	2c e9       	ldi	r18, 0x9C	; 156
+ 796:	30 e0       	ldi	r19, 0x00	; 0
 			status_dev[i] = 0;
- 72a:	41 ea       	ldi	r20, 0xA1	; 161
- 72c:	50 e0       	ldi	r21, 0x00	; 0
+ 798:	41 ea       	ldi	r20, 0xA1	; 161
+ 79a:	50 e0       	ldi	r21, 0x00	; 0
 	} 
 	timer2s = 0;
 	rf12_endasyncrx();
 	rf12_txpacket(ALL, MASTER, PING);
 	for(uint8_t i=0;i<NUMDEV;i++) {
 		if(status_count[i] > 10) {
- 72e:	f9 01       	movw	r30, r18
- 730:	e8 0f       	add	r30, r24
- 732:	f9 1f       	adc	r31, r25
- 734:	60 81       	ld	r22, Z
- 736:	6b 30       	cpi	r22, 0x0B	; 11
- 738:	28 f0       	brcs	.+10     	; 0x744 <__vector_9+0x66>
+ 79c:	f9 01       	movw	r30, r18
+ 79e:	e8 0f       	add	r30, r24
+ 7a0:	f9 1f       	adc	r31, r25
+ 7a2:	60 81       	ld	r22, Z
+ 7a4:	6b 30       	cpi	r22, 0x0B	; 11
+ 7a6:	28 f0       	brcs	.+10     	; 0x7b2 <__vector_9+0x68>
 			status_dev[i] = 0;
- 73a:	fa 01       	movw	r30, r20
- 73c:	e8 0f       	add	r30, r24
- 73e:	f9 1f       	adc	r31, r25
- 740:	10 82       	st	Z, r1
- 742:	06 c0       	rjmp	.+12     	; 0x750 <__vector_9+0x72>
+ 7a8:	fa 01       	movw	r30, r20
+ 7aa:	e8 0f       	add	r30, r24
+ 7ac:	f9 1f       	adc	r31, r25
+ 7ae:	10 82       	st	Z, r1
+ 7b0:	06 c0       	rjmp	.+12     	; 0x7be <__vector_9+0x74>
 		} else {
 			status_count[i]++;
- 744:	f9 01       	movw	r30, r18
- 746:	e8 0f       	add	r30, r24
- 748:	f9 1f       	adc	r31, r25
- 74a:	60 81       	ld	r22, Z
- 74c:	6f 5f       	subi	r22, 0xFF	; 255
- 74e:	60 83       	st	Z, r22
- 750:	01 96       	adiw	r24, 0x01	; 1
+ 7b2:	f9 01       	movw	r30, r18
+ 7b4:	e8 0f       	add	r30, r24
+ 7b6:	f9 1f       	adc	r31, r25
+ 7b8:	60 81       	ld	r22, Z
+ 7ba:	6f 5f       	subi	r22, 0xFF	; 255
+ 7bc:	60 83       	st	Z, r22
+ 7be:	01 96       	adiw	r24, 0x01	; 1
 		return;
 	} 
 	timer2s = 0;
 	rf12_endasyncrx();
 	rf12_txpacket(ALL, MASTER, PING);
 	for(uint8_t i=0;i<NUMDEV;i++) {
- 752:	85 30       	cpi	r24, 0x05	; 5
- 754:	91 05       	cpc	r25, r1
- 756:	59 f7       	brne	.-42     	; 0x72e <__vector_9+0x50>
+ 7c0:	85 30       	cpi	r24, 0x05	; 5
+ 7c2:	91 05       	cpc	r25, r1
+ 7c4:	59 f7       	brne	.-42     	; 0x79c <__vector_9+0x52>
 			status_dev[i] = 0;
 		} else {
 			status_count[i]++;
 		}
 	}	
 	rf12_beginasyncrx();
- 758:	21 dd       	rcall	.-1470   	; 0x19c <rf12_beginasyncrx>
+ 7c6:	ea dc       	rcall	.-1580   	; 0x19c <rf12_beginasyncrx>
 }
- 75a:	ff 91       	pop	r31
- 75c:	ef 91       	pop	r30
- 75e:	bf 91       	pop	r27
- 760:	af 91       	pop	r26
- 762:	9f 91       	pop	r25
- 764:	8f 91       	pop	r24
- 766:	7f 91       	pop	r23
- 768:	6f 91       	pop	r22
- 76a:	5f 91       	pop	r21
- 76c:	4f 91       	pop	r20
- 76e:	3f 91       	pop	r19
- 770:	2f 91       	pop	r18
- 772:	0f 90       	pop	r0
- 774:	0f be       	out	0x3f, r0	; 63
- 776:	0f 90       	pop	r0
- 778:	1f 90       	pop	r1
- 77a:	18 95       	reti
+ 7c8:	ff 91       	pop	r31
+ 7ca:	ef 91       	pop	r30
+ 7cc:	bf 91       	pop	r27
+ 7ce:	af 91       	pop	r26
+ 7d0:	9f 91       	pop	r25
+ 7d2:	8f 91       	pop	r24
+ 7d4:	7f 91       	pop	r23
+ 7d6:	6f 91       	pop	r22
+ 7d8:	5f 91       	pop	r21
+ 7da:	4f 91       	pop	r20
+ 7dc:	3f 91       	pop	r19
+ 7de:	2f 91       	pop	r18
+ 7e0:	0f 90       	pop	r0
+ 7e2:	0f be       	out	0x3f, r0	; 63
+ 7e4:	0f 90       	pop	r0
+ 7e6:	1f 90       	pop	r1
+ 7e8:	18 95       	reti
 
-0000077c <init_timer>:
+000007ea <init_timer>:
 
 void init_timer() {
 	// Timer/Counter 0 initialization
 	// Clock source: System Clock
 	// Clock value: 7,813 kHz
 	TCCR0=(1<<CS02) | (0<<CS01) | (1<<CS00);
- 77c:	85 e0       	ldi	r24, 0x05	; 5
- 77e:	83 bf       	out	0x33, r24	; 51
+ 7ea:	85 e0       	ldi	r24, 0x05	; 5
+ 7ec:	83 bf       	out	0x33, r24	; 51
 	TCNT0=0x00;
- 780:	12 be       	out	0x32, r1	; 50
+ 7ee:	12 be       	out	0x32, r1	; 50
 
 	// Timer(s)/Counter(s) Interrupt(s) initialization
 	TIMSK=(0<<OCIE2) | (0<<TOIE2) | (0<<TICIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<TOIE1) | (1<<TOIE0);
- 782:	81 e0       	ldi	r24, 0x01	; 1
- 784:	89 bf       	out	0x39, r24	; 57
+ 7f0:	81 e0       	ldi	r24, 0x01	; 1
+ 7f2:	89 bf       	out	0x39, r24	; 57
 }
- 786:	08 95       	ret
+ 7f4:	08 95       	ret
 
-00000788 <main>:
+000007f6 <main>:
 
 int main(void)
 {	
 	rf12_init();					// ein paar Register setzen (z.B. CLK auf 10MHz)
- 788:	83 dc       	rcall	.-1786   	; 0x90 <rf12_init>
+ 7f6:	4c dc       	rcall	.-1896   	; 0x90 <rf12_init>
 	//rf12_ready();
 	rf12_setfreq(RF12FREQ(433.92));	// Sende/Empfangsfrequenz auf 433,92MHz einstellen
- 78a:	80 e2       	ldi	r24, 0x20	; 32
- 78c:	96 e0       	ldi	r25, 0x06	; 6
- 78e:	c0 dc       	rcall	.-1664   	; 0x110 <rf12_setfreq>
+ 7f8:	80 e2       	ldi	r24, 0x20	; 32
+ 7fa:	96 e0       	ldi	r25, 0x06	; 6
+ 7fc:	89 dc       	rcall	.-1774   	; 0x110 <rf12_setfreq>
 	rf12_setbandwidth(1, 0, 7);		// 400kHz Bandbreite, 0dB Verstärkung, DRSSI threshold: -61dBm 
- 790:	81 e0       	ldi	r24, 0x01	; 1
- 792:	60 e0       	ldi	r22, 0x00	; 0
- 794:	47 e0       	ldi	r20, 0x07	; 7
- 796:	9f dc       	rcall	.-1730   	; 0xd6 <rf12_setbandwidth>
+ 7fe:	81 e0       	ldi	r24, 0x01	; 1
+ 800:	60 e0       	ldi	r22, 0x00	; 0
+ 802:	47 e0       	ldi	r20, 0x07	; 7
+ 804:	68 dc       	rcall	.-1840   	; 0xd6 <rf12_setbandwidth>
 	rf12_setbaud(9600);				// 19200 baud
- 798:	80 e8       	ldi	r24, 0x80	; 128
- 79a:	95 e2       	ldi	r25, 0x25	; 37
- 79c:	c8 dc       	rcall	.-1648   	; 0x12e <rf12_setbaud>
+ 806:	80 e8       	ldi	r24, 0x80	; 128
+ 808:	95 e2       	ldi	r25, 0x25	; 37
+ 80a:	91 dc       	rcall	.-1758   	; 0x12e <rf12_setbaud>
 	rf12_setpower(0, 6);			// 1mW Ausgangsleistung, 120kHz Frequenzshift
- 79e:	80 e0       	ldi	r24, 0x00	; 0
- 7a0:	66 e0       	ldi	r22, 0x06	; 6
- 7a2:	e8 dc       	rcall	.-1584   	; 0x174 <rf12_setpower>
+ 80c:	80 e0       	ldi	r24, 0x00	; 0
+ 80e:	66 e0       	ldi	r22, 0x06	; 6
+ 810:	b1 dc       	rcall	.-1694   	; 0x174 <rf12_setpower>
 	init_ports();
- 7a4:	b3 dd       	rcall	.-1178   	; 0x30c <init_ports>
+ 812:	7c dd       	rcall	.-1288   	; 0x30c <init_ports>
 	init_timer();
- 7a6:	ea df       	rcall	.-44     	; 0x77c <init_timer>
+ 814:	ea df       	rcall	.-44     	; 0x7ea <init_timer>
 	sei();
- 7a8:	78 94       	sei
- 7aa:	8f ef       	ldi	r24, 0xFF	; 255
- 7ac:	90 e7       	ldi	r25, 0x70	; 112
- 7ae:	a2 e0       	ldi	r26, 0x02	; 2
- 7b0:	81 50       	subi	r24, 0x01	; 1
- 7b2:	90 40       	sbci	r25, 0x00	; 0
- 7b4:	a0 40       	sbci	r26, 0x00	; 0
- 7b6:	e1 f7       	brne	.-8      	; 0x7b0 <main+0x28>
- 7b8:	00 c0       	rjmp	.+0      	; 0x7ba <main+0x32>
- 7ba:	00 00       	nop
+ 816:	78 94       	sei
+ 818:	8f ef       	ldi	r24, 0xFF	; 255
+ 81a:	90 e7       	ldi	r25, 0x70	; 112
+ 81c:	a2 e0       	ldi	r26, 0x02	; 2
+ 81e:	81 50       	subi	r24, 0x01	; 1
+ 820:	90 40       	sbci	r25, 0x00	; 0
+ 822:	a0 40       	sbci	r26, 0x00	; 0
+ 824:	e1 f7       	brne	.-8      	; 0x81e <main+0x28>
+ 826:	00 c0       	rjmp	.+0      	; 0x828 <main+0x32>
+ 828:	00 00       	nop
 	
 	_delay_ms(100);
 	
     while(1)
     {
 		recive();
- 7bc:	49 df       	rcall	.-366    	; 0x650 <recive>
- 7be:	fe cf       	rjmp	.-4      	; 0x7bc <main+0x34>
+ 82a:	34 df       	rcall	.-408    	; 0x694 <recive>
+ 82c:	fe cf       	rjmp	.-4      	; 0x82a <main+0x34>
 
-000007c0 <__udivmodqi4>:
- 7c0:	99 1b       	sub	r25, r25
- 7c2:	79 e0       	ldi	r23, 0x09	; 9
- 7c4:	04 c0       	rjmp	.+8      	; 0x7ce <__udivmodqi4_ep>
+0000082e <__udivmodqi4>:
+ 82e:	99 1b       	sub	r25, r25
+ 830:	79 e0       	ldi	r23, 0x09	; 9
+ 832:	04 c0       	rjmp	.+8      	; 0x83c <__udivmodqi4_ep>
 
-000007c6 <__udivmodqi4_loop>:
- 7c6:	99 1f       	adc	r25, r25
- 7c8:	96 17       	cp	r25, r22
- 7ca:	08 f0       	brcs	.+2      	; 0x7ce <__udivmodqi4_ep>
- 7cc:	96 1b       	sub	r25, r22
+00000834 <__udivmodqi4_loop>:
+ 834:	99 1f       	adc	r25, r25
+ 836:	96 17       	cp	r25, r22
+ 838:	08 f0       	brcs	.+2      	; 0x83c <__udivmodqi4_ep>
+ 83a:	96 1b       	sub	r25, r22
 
-000007ce <__udivmodqi4_ep>:
- 7ce:	88 1f       	adc	r24, r24
- 7d0:	7a 95       	dec	r23
- 7d2:	c9 f7       	brne	.-14     	; 0x7c6 <__udivmodqi4_loop>
- 7d4:	80 95       	com	r24
- 7d6:	08 95       	ret
+0000083c <__udivmodqi4_ep>:
+ 83c:	88 1f       	adc	r24, r24
+ 83e:	7a 95       	dec	r23
+ 840:	c9 f7       	brne	.-14     	; 0x834 <__udivmodqi4_loop>
+ 842:	80 95       	com	r24
+ 844:	08 95       	ret
 
-000007d8 <__udivmodsi4>:
- 7d8:	a1 e2       	ldi	r26, 0x21	; 33
- 7da:	1a 2e       	mov	r1, r26
- 7dc:	aa 1b       	sub	r26, r26
- 7de:	bb 1b       	sub	r27, r27
- 7e0:	fd 01       	movw	r30, r26
- 7e2:	0d c0       	rjmp	.+26     	; 0x7fe <__udivmodsi4_ep>
+00000846 <__udivmodsi4>:
+ 846:	a1 e2       	ldi	r26, 0x21	; 33
+ 848:	1a 2e       	mov	r1, r26
+ 84a:	aa 1b       	sub	r26, r26
+ 84c:	bb 1b       	sub	r27, r27
+ 84e:	fd 01       	movw	r30, r26
+ 850:	0d c0       	rjmp	.+26     	; 0x86c <__udivmodsi4_ep>
 
-000007e4 <__udivmodsi4_loop>:
- 7e4:	aa 1f       	adc	r26, r26
- 7e6:	bb 1f       	adc	r27, r27
- 7e8:	ee 1f       	adc	r30, r30
- 7ea:	ff 1f       	adc	r31, r31
- 7ec:	a2 17       	cp	r26, r18
- 7ee:	b3 07       	cpc	r27, r19
- 7f0:	e4 07       	cpc	r30, r20
- 7f2:	f5 07       	cpc	r31, r21
- 7f4:	20 f0       	brcs	.+8      	; 0x7fe <__udivmodsi4_ep>
- 7f6:	a2 1b       	sub	r26, r18
- 7f8:	b3 0b       	sbc	r27, r19
- 7fa:	e4 0b       	sbc	r30, r20
- 7fc:	f5 0b       	sbc	r31, r21
+00000852 <__udivmodsi4_loop>:
+ 852:	aa 1f       	adc	r26, r26
+ 854:	bb 1f       	adc	r27, r27
+ 856:	ee 1f       	adc	r30, r30
+ 858:	ff 1f       	adc	r31, r31
+ 85a:	a2 17       	cp	r26, r18
+ 85c:	b3 07       	cpc	r27, r19
+ 85e:	e4 07       	cpc	r30, r20
+ 860:	f5 07       	cpc	r31, r21
+ 862:	20 f0       	brcs	.+8      	; 0x86c <__udivmodsi4_ep>
+ 864:	a2 1b       	sub	r26, r18
+ 866:	b3 0b       	sbc	r27, r19
+ 868:	e4 0b       	sbc	r30, r20
+ 86a:	f5 0b       	sbc	r31, r21
 
-000007fe <__udivmodsi4_ep>:
- 7fe:	66 1f       	adc	r22, r22
- 800:	77 1f       	adc	r23, r23
- 802:	88 1f       	adc	r24, r24
- 804:	99 1f       	adc	r25, r25
- 806:	1a 94       	dec	r1
- 808:	69 f7       	brne	.-38     	; 0x7e4 <__udivmodsi4_loop>
- 80a:	60 95       	com	r22
- 80c:	70 95       	com	r23
- 80e:	80 95       	com	r24
- 810:	90 95       	com	r25
- 812:	9b 01       	movw	r18, r22
- 814:	ac 01       	movw	r20, r24
- 816:	bd 01       	movw	r22, r26
- 818:	cf 01       	movw	r24, r30
- 81a:	08 95       	ret
+0000086c <__udivmodsi4_ep>:
+ 86c:	66 1f       	adc	r22, r22
+ 86e:	77 1f       	adc	r23, r23
+ 870:	88 1f       	adc	r24, r24
+ 872:	99 1f       	adc	r25, r25
+ 874:	1a 94       	dec	r1
+ 876:	69 f7       	brne	.-38     	; 0x852 <__udivmodsi4_loop>
+ 878:	60 95       	com	r22
+ 87a:	70 95       	com	r23
+ 87c:	80 95       	com	r24
+ 87e:	90 95       	com	r25
+ 880:	9b 01       	movw	r18, r22
+ 882:	ac 01       	movw	r20, r24
+ 884:	bd 01       	movw	r22, r26
+ 886:	cf 01       	movw	r24, r30
+ 888:	08 95       	ret
 
-0000081c <__divmodsi4>:
- 81c:	97 fb       	bst	r25, 7
- 81e:	09 2e       	mov	r0, r25
- 820:	05 26       	eor	r0, r21
- 822:	0e d0       	rcall	.+28     	; 0x840 <__divmodsi4_neg1>
- 824:	57 fd       	sbrc	r21, 7
- 826:	04 d0       	rcall	.+8      	; 0x830 <__divmodsi4_neg2>
- 828:	d7 df       	rcall	.-82     	; 0x7d8 <__udivmodsi4>
- 82a:	0a d0       	rcall	.+20     	; 0x840 <__divmodsi4_neg1>
- 82c:	00 1c       	adc	r0, r0
- 82e:	38 f4       	brcc	.+14     	; 0x83e <__divmodsi4_exit>
+0000088a <__divmodsi4>:
+ 88a:	97 fb       	bst	r25, 7
+ 88c:	09 2e       	mov	r0, r25
+ 88e:	05 26       	eor	r0, r21
+ 890:	0e d0       	rcall	.+28     	; 0x8ae <__divmodsi4_neg1>
+ 892:	57 fd       	sbrc	r21, 7
+ 894:	04 d0       	rcall	.+8      	; 0x89e <__divmodsi4_neg2>
+ 896:	d7 df       	rcall	.-82     	; 0x846 <__udivmodsi4>
+ 898:	0a d0       	rcall	.+20     	; 0x8ae <__divmodsi4_neg1>
+ 89a:	00 1c       	adc	r0, r0
+ 89c:	38 f4       	brcc	.+14     	; 0x8ac <__divmodsi4_exit>
 
-00000830 <__divmodsi4_neg2>:
- 830:	50 95       	com	r21
- 832:	40 95       	com	r20
- 834:	30 95       	com	r19
- 836:	21 95       	neg	r18
- 838:	3f 4f       	sbci	r19, 0xFF	; 255
- 83a:	4f 4f       	sbci	r20, 0xFF	; 255
- 83c:	5f 4f       	sbci	r21, 0xFF	; 255
+0000089e <__divmodsi4_neg2>:
+ 89e:	50 95       	com	r21
+ 8a0:	40 95       	com	r20
+ 8a2:	30 95       	com	r19
+ 8a4:	21 95       	neg	r18
+ 8a6:	3f 4f       	sbci	r19, 0xFF	; 255
+ 8a8:	4f 4f       	sbci	r20, 0xFF	; 255
+ 8aa:	5f 4f       	sbci	r21, 0xFF	; 255
 
-0000083e <__divmodsi4_exit>:
- 83e:	08 95       	ret
+000008ac <__divmodsi4_exit>:
+ 8ac:	08 95       	ret
 
-00000840 <__divmodsi4_neg1>:
- 840:	f6 f7       	brtc	.-4      	; 0x83e <__divmodsi4_exit>
- 842:	90 95       	com	r25
- 844:	80 95       	com	r24
- 846:	70 95       	com	r23
- 848:	61 95       	neg	r22
- 84a:	7f 4f       	sbci	r23, 0xFF	; 255
- 84c:	8f 4f       	sbci	r24, 0xFF	; 255
- 84e:	9f 4f       	sbci	r25, 0xFF	; 255
- 850:	08 95       	ret
+000008ae <__divmodsi4_neg1>:
+ 8ae:	f6 f7       	brtc	.-4      	; 0x8ac <__divmodsi4_exit>
+ 8b0:	90 95       	com	r25
+ 8b2:	80 95       	com	r24
+ 8b4:	70 95       	com	r23
+ 8b6:	61 95       	neg	r22
+ 8b8:	7f 4f       	sbci	r23, 0xFF	; 255
+ 8ba:	8f 4f       	sbci	r24, 0xFF	; 255
+ 8bc:	9f 4f       	sbci	r25, 0xFF	; 255
+ 8be:	08 95       	ret
 
-00000852 <_exit>:
- 852:	f8 94       	cli
+000008c0 <_exit>:
+ 8c0:	f8 94       	cli
 
-00000854 <__stop_program>:
- 854:	ff cf       	rjmp	.-2      	; 0x854 <__stop_program>
+000008c2 <__stop_program>:
+ 8c2:	ff cf       	rjmp	.-2      	; 0x8c2 <__stop_program>
diff --git a/Sender/Sender/Debug/Sender.map b/Sender/Sender/Debug/Sender.map
index 2d3244a..43f45d3 100644
--- a/Sender/Sender/Debug/Sender.map
+++ b/Sender/Sender/Debug/Sender.map
@@ -126,7 +126,7 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
 .rela.plt
  *(.rela.plt)
 
-.text           0x00000000      0x856
+.text           0x00000000      0x8c4
  *(.vectors)
  .vectors       0x00000000       0x26 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/../../../../avr/lib/avr4/crtm8a.o
                 0x00000000                __vector_default
@@ -215,36 +215,36 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
                 0x000001ca                rf12_txdata
                 0x0000023c                rf12_rxdata
                 0x00000290                rf12_txpacket
- .text          0x0000030c      0x4b4 Sender.o
+ .text          0x0000030c      0x522 Sender.o
                 0x0000030c                init_ports
                 0x00000336                led
-                0x000004b0                poll
-                0x00000650                recive
-                0x000006de                __vector_9
-                0x0000077c                init_timer
-                0x00000788                main
- .text          0x000007c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
- .text          0x000007c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
- .text          0x000007c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
- .text          0x000007c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
- .text          0x000007c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
- .text          0x000007c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
-                0x000007c0                . = ALIGN (0x2)
+                0x000004f6                poll
+                0x00000694                recive
+                0x0000074a                __vector_9
+                0x000007ea                init_timer
+                0x000007f6                main
+ .text          0x0000082e        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
+ .text          0x0000082e        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
+ .text          0x0000082e        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
+ .text          0x0000082e        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
+ .text          0x0000082e        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
+ .text          0x0000082e        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
+                0x0000082e                . = ALIGN (0x2)
  *(.text.*)
- .text.libgcc   0x000007c0       0x18 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
-                0x000007c0                __udivmodqi4
- .text.libgcc   0x000007d8       0x44 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
-                0x000007d8                __udivmodsi4
- .text.libgcc   0x0000081c       0x36 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
-                0x0000081c                __divmodsi4
- .text.libgcc   0x00000852        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
- .text.libgcc   0x00000852        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
- .text.libgcc   0x00000852        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
-                0x00000852                . = ALIGN (0x2)
+ .text.libgcc   0x0000082e       0x18 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
+                0x0000082e                __udivmodqi4
+ .text.libgcc   0x00000846       0x44 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
+                0x00000846                __udivmodsi4
+ .text.libgcc   0x0000088a       0x36 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
+                0x0000088a                __divmodsi4
+ .text.libgcc   0x000008c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
+ .text.libgcc   0x000008c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
+ .text.libgcc   0x000008c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
+                0x000008c0                . = ALIGN (0x2)
  *(.fini9)
- .fini9         0x00000852        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
-                0x00000852                _exit
-                0x00000852                exit
+ .fini9         0x000008c0        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
+                0x000008c0                _exit
+                0x000008c0                exit
  *(.fini9)
  *(.fini8)
  *(.fini8)
@@ -263,11 +263,11 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
  *(.fini1)
  *(.fini1)
  *(.fini0)
- .fini0         0x00000852        0x4 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
+ .fini0         0x000008c0        0x4 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
  *(.fini0)
-                0x00000856                _etext = .
+                0x000008c4                _etext = .
 
-.data           0x00800060       0x3c load address 0x00000856
+.data           0x00800060       0x3c load address 0x000008c4
                 0x00800060                PROVIDE (__data_start, .)
  *(.data)
  .data          0x00800060        0x0 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/../../../../avr/lib/avr4/crtm8a.o
@@ -312,8 +312,8 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
  *(.bss*)
  *(COMMON)
                 0x008000a9                PROVIDE (__bss_end, .)
-                0x00000856                __data_load_start = LOADADDR (.data)
-                0x00000892                __data_load_end = (__data_load_start + SIZEOF (.data))
+                0x000008c4                __data_load_start = LOADADDR (.data)
+                0x00000900                __data_load_end = (__data_load_start + SIZEOF (.data))
 
 .noinit         0x008000a9        0x0
                 0x008000a9                PROVIDE (__noinit_start, .)
@@ -395,16 +395,16 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
 .debug_pubnames
  *(.debug_pubnames)
 
-.debug_info     0x00000000     0x11a7
+.debug_info     0x00000000     0x1217
  *(.debug_info)
  .debug_info    0x00000000      0x444 rf12.o
- .debug_info    0x00000444      0x835 Sender.o
- .debug_info    0x00000c79       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
- .debug_info    0x00000d56       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
- .debug_info    0x00000e33       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
- .debug_info    0x00000f10       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
- .debug_info    0x00000fed       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
- .debug_info    0x000010ca       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
+ .debug_info    0x00000444      0x8a5 Sender.o
+ .debug_info    0x00000ce9       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
+ .debug_info    0x00000dc6       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
+ .debug_info    0x00000ea3       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
+ .debug_info    0x00000f80       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
+ .debug_info    0x0000105d       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
+ .debug_info    0x0000113a       0xdd c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
  *(.gnu.linkonce.wi.*)
 
 .debug_abbrev   0x00000000      0x40c
@@ -418,33 +418,33 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
  .debug_abbrev  0x000003e4       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
  .debug_abbrev  0x000003f8       0x14 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
 
-.debug_line     0x00000000      0x863
+.debug_line     0x00000000      0x87a
  *(.debug_line)
  .debug_line    0x00000000      0x222 rf12.o
- .debug_line    0x00000222      0x2bf Sender.o
- .debug_line    0x000004e1       0x92 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
- .debug_line    0x00000573       0xa8 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
- .debug_line    0x0000061b       0xa1 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
- .debug_line    0x000006bc       0x88 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
- .debug_line    0x00000744       0x91 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
- .debug_line    0x000007d5       0x8e c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
+ .debug_line    0x00000222      0x2d6 Sender.o
+ .debug_line    0x000004f8       0x92 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodqi4.o)
+ .debug_line    0x0000058a       0xa8 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_udivmodsi4.o)
+ .debug_line    0x00000632       0xa1 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_divmodsi4.o)
+ .debug_line    0x000006d3       0x88 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_exit.o)
+ .debug_line    0x0000075b       0x91 c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_copy_data.o)
+ .debug_line    0x000007ec       0x8e c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1.95/avrtoolchain/bin/../lib/gcc/avr/4.6.2/avr4\libgcc.a(_clear_bss.o)
 
 .debug_frame    0x00000000      0x284
  *(.debug_frame)
  .debug_frame   0x00000000      0x12c rf12.o
  .debug_frame   0x0000012c      0x158 Sender.o
 
-.debug_str      0x00000000      0x2d7
+.debug_str      0x00000000      0x2df
  *(.debug_str)
  .debug_str     0x00000000      0x206 rf12.o
                                 0x259 (size before relaxing)
- .debug_str     0x00000206       0xd1 Sender.o
-                                0x219 (size before relaxing)
+ .debug_str     0x00000206       0xd9 Sender.o
+                                0x221 (size before relaxing)
 
-.debug_loc      0x00000000      0x9f7
+.debug_loc      0x00000000      0xa5a
  *(.debug_loc)
  .debug_loc     0x00000000      0x342 rf12.o
- .debug_loc     0x00000342      0x6b5 Sender.o
+ .debug_loc     0x00000342      0x718 Sender.o
 
 .debug_macinfo
  *(.debug_macinfo)
diff --git a/Sender/Sender/Debug/Sender.srec b/Sender/Sender/Debug/Sender.srec
index 7c9471a..b1f978e 100644
--- a/Sender/Sender/Debug/Sender.srec
+++ b/Sender/Sender/Debug/Sender.srec
@@ -1,10 +1,10 @@
 S00E000053656E6465722E73726563B5
 S113000012C02CC02BC02AC029C028C027C026C0BB
-S113001025C065C323C022C021C020C01FC01EC08C
+S113001025C09BC323C022C021C020C01FC01EC056
 S11300201DC01CC01BC011241FBECFE5D4E0DEBF21
-S1130030CDBF10E0A0E6B0E0E6E5F8E002C0059030
+S1130030CDBF10E0A0E6B0E0E4ECF8E002C005902B
 S11300400D92AC39B107D9F710E0ACE9B0E001C0CA
-S11300501D92A93AB107E1F797D3FBC3D1CFAC986E
+S11300501D92A93AB107E1F7CED332C4D1CFAC98FF
 S113006040E120E030E0992314F4AA9A01C0AA9850
 S1130070220F331F99992160AB9A880F991F00C0F2
 S11300800000AB98415079F7AC9A822F932F0895D2
@@ -19,9 +19,9 @@ S1130100660F771F660F771F862B972BA8DF08953E
 S11301108036910538F02FE08034920728F08FE381
 S11301209FE002C080E690E0906A99DF089522E0A3
 S113013087399207F0F025E18831920770F49C0129
-S113014040E050E060E678EA80E090E067D3C901DF
+S113014040E050E060E678EA80E090E09ED3C901A8
 S113015001978068966C83DF08959C0140E050E02D
-S11301606CEF72E485E090E037D3C9010197966C97
+S11301606CEF72E485E090E06ED3C9010197966C60
 S113017076DF089590E087709070986970E06295DA
 S11301807295707F7627607F76277070862B972B09
 S113019066DF0895AC98999BFECF089588EC92E8A9
@@ -58,83 +58,90 @@ S1130370F91F30813230F1F4EC91F0E03081C701A3
 S1130380088002C0880F991F0A94E2F7832B8083A8
 S1130390FA01C080DD24F6013081C701FB01008031
 S11303A002C0880F991F0A94E2F780958323F6010F
-S11303B080836BC0F801E80FF91F30813330F1F40A
+S11303B080838EC0F801E80FF91F30813330F1F4E7
 S11303C0FA01C080DD24F6013081C701FB01008001
 S11303D002C0880F991F0A94E2F7832BF6018083E9
 S11303E0EC91F0E03081C701088002C0880F991FAA
-S11303F00A94E2F780958323808347C0F801E80FCD
+S11303F00A94E2F78095832380836AC0F801E80FAA
 S1130400F91F30813630E9F4EC91F0E03081C70116
 S1130410088002C0880F991F0A94E2F7832B808317
 S1130420FA01C080DD24F6013081C701FB010080A0
 S113043002C0880F991F0A94E2F7832BF601808388
-S113044024C0F801E80FF91F80818823F1F4EC91AE
+S113044047C0F801E80FF91F30813323F9F4EC9128
 S1130450F0E03081C701088002C0880F991F0A9418
 S1130460E2F7809583238083FA01C080DD24F601BE
 S11304703081C701FB01008002C0880F991F0A94D4
-S1130480E2F780958323F60180832E5F12962296ED
-S11304904E5F5F4F6E5F7F4F2A3009F064CFDF916C
-S11304A0CF911F910F91FF90EF90DF90CF9008951F
-S11304B02F923F924F925F926F927F928F929F9270
-S11304C0AF92BF92CF92DF92EF92FF920F931F935E
-S11304D0CF93DF9330DF4FE750E065E770E0CBE682
-S11304E0D0E001E610E020E022243324EE24FF24AF
-S11304F0E3946A015601F6013197A081B0E03B0113
-S11305008C91FB013197A701008002C0440F551F55
-S11305100A94E2F7942F909589238C9300004E015E
-S1130520FE013197E081F0E028013081F801319734
-S1130530C701008002C0880F991F0A94E2F7832341
-S1130540B1F4822F8695E1EAF0E0E80FF11D908185
-S1130550923029F40F2EF5E02F2EF02D03C0222423
-S1130560689422F80F2EFAE03F2EF02D380E8C916D
-S1130570842B8C930000F501A081B0E08C91A7013D
-S1130580F301008002C0440F551F0A94E2F7942F30
-S1130590909589238C930000F4018081E82FF0E08A
-S11305A03081C701F201008002C0880F991F0A94AC
-S11305B0E2F7832359F4822F86950F2EFAE03F2E1B
-S11305C0F02D380E0F2EF7E02F2EF02D8C91482BA6
-S11305D04C9300002E5F82E090E0C80ED91E6E5F3F
-S11305E07F4F22960E5F1F4F2A3009F083CF3320AE
-S11305F0E1F02220D1F0F894A59AAD9AE2DDAFE3C0
-S1130600BCE91197F1F700C00000832D61E0422D91
-S11306103FDEAD988FE798E3A1E081509040A04081
-S1130620E1F700C00000BADD7894DF91CF911F910B
-S11306300F91FF90EF90DF90CF90BF90AF909F907D
-S11306408F907F906F905F904F903F902F90089580
-S1130650CF93A4DD01C02CDFABDD8823E1F7ADDD52
-S11306608230D8F501C024DFA3DD8823E1F7A5DDBE
-S1130670813099F16AE0A4D0C82FC15001C018DFBD
-S113068097DD8823E1F799DD833081F08630D1F05E
-S1130690823019F58C2F90E0FC01EF55FF4F22E0DA
-S11306A0208384569F4FFC01108217C08C2F90E04A
-S11306B0FC01EF55FF4F23E0208384569F4FFC013C
-S11306C010820BC08C2F90E0FC01EF55FF4F26E009
-S11306D0208384569F4FFC011082CF9108951F926E
-S11306E00F920FB60F9211242F933F934F935F9362
-S11306F06F937F938F939F93AF93BF93EF93FF93E6
-S11307008091A600803130F48091A6008F5F8093A1
-S1130710A60023C01092A60054DD80E061E041E011
-S1130720B7DD80E090E02CE930E041EA50E0F901E7
-S1130730E80FF91F60816B3028F0FA01E80FF91F08
-S1130740108206C0F901E80FF91F60816F5F6083B2
-S113075001968530910559F721DDFF91EF91BF9105
-S1130760AF919F918F917F916F915F914F913F9145
-S11307702F910F900FBE0F901F90189585E083BFA7
-S113078012BE81E089BF089583DC80E296E0C0DC7C
-S113079081E060E047E09FDC80E895E2C8DC80E02F
-S11307A066E0E8DCB3DDEADF78948FEF90E7A2E05F
-S11307B081509040A040E1F700C0000049DFFECF27
-S11307C0991B79E004C0991F961708F0961B881F9F
-S11307D07A95C9F780950895A1E21A2EAA1BBB1B2E
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diff --git a/Sender/Sender/Sender.c b/Sender/Sender/Sender.c
index cb361b3..b04b9ef 100644
--- a/Sender/Sender/Sender.c
+++ b/Sender/Sender/Sender.c
@@ -34,6 +34,7 @@ const uint8_t in_row_pin[]  = {PIND0, PIND1, PIND3, PIND3, PIND3, PIND3, PIND3,
 static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
 static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
 static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
+static inline void BIT_TOG(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline));
 	
 void init_ports() {
 	//LED auf Ausgang
@@ -69,11 +70,13 @@ void led() {
 		} else if(status_dev[i/2] == 0) {
 			BIT_CLEAR(led_port[i],led_pin[i]);
 			BIT_CLEAR(led_port[i+1],led_pin[i+1]);
+		} else if(status_dev[i/2] == DEDECT) {
+			BIT_TOG(led_port[i],led_pin[i]);
+			BIT_TOG(led_port[i+1],led_pin[i+1]);
 		}
 	}	
 }
 void poll() {
-	led();
 	uint8_t to = 0;
 	uint8_t data = 0;
 	
@@ -151,6 +154,15 @@ void recive() {
 					status_count[from] = 0;
 					return;
 				}
+				case DEDECT: {
+					status_dev[from] = DEDECT;
+					status_count[from] = 0;
+					return;
+				}
+				default: {
+					rf12_endasyncrx();
+					return;
+				}
 			}
 		}		
 	}
@@ -159,6 +171,7 @@ void recive() {
 // Timer 0 overflow interrupt service routine
 ISR(TIMER0_OVF_vect)
 {
+	led();
 	if(timer2s < 16) {
 		timer2s++;
 		return;
@@ -217,4 +230,8 @@ static inline void BIT_CLEAR(volatile uint8_t *target, uint8_t bit) {
 
 static inline uint8_t BIT_ON(volatile uint8_t *target, uint8_t bit) {
 	return *target & (1<<bit);
+}
+
+static inline void BIT_TOG(volatile uint8_t *target, uint8_t bit) {
+	*target ^= (1<<bit);
 }
\ No newline at end of file
diff --git a/Sender/Sender/codes.h b/Sender/Sender/codes.h
index 54f3d7e..fa8597c 100644
--- a/Sender/Sender/codes.h
+++ b/Sender/Sender/codes.h
@@ -22,6 +22,8 @@
 #define SETACTIVE 5
 #define RUN 6
 #define SETRUN 7
+#define DEDECT 8
+#define SETDEDECT 9
 #endif
 
 #endif /* CODES_H_ */
\ No newline at end of file