281 lines
5.6 KiB
C
281 lines
5.6 KiB
C
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#ifndef MCP2515_DEFS_H
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#define MCP2515_DEFS_H
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/** \name SPI Kommandos */
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/*@{*/
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#define SPI_RESET 0xC0
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#define SPI_READ 0x03
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#define SPI_READ_RX 0x90
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#define SPI_WRITE 0x02
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#define SPI_WRITE_TX 0x40
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#define SPI_RTS 0x80
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#define SPI_READ_STATUS 0xA0
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#define SPI_RX_STATUS 0xB0
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#define SPI_BIT_MODIFY 0x05
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/*@}*/
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/** \name Adressen der Register des MCP2515
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*
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* Die Redundanten Adressen von z.B. dem Register CANSTAT
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* (0x0E, 0x1E, 0x2E, ...) wurden dabei nicht mit aufgelistet.
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*/
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/*@{*/
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#define RXF0SIDH 0x00
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#define RXF0SIDL 0x01
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#define RXF0EID8 0x02
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#define RXF0EID0 0x03
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#define RXF1SIDH 0x04
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#define RXF1SIDL 0x05
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#define RXF1EID8 0x06
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#define RXF1EID0 0x07
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#define RXF2SIDH 0x08
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#define RXF2SIDL 0x09
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#define RXF2EID8 0x0A
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#define RXF2EID0 0x0B
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#define BFPCTRL 0x0C
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#define TXRTSCTRL 0x0D
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#define CANSTAT 0x0E
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#define CANCTRL 0x0F
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#define RXF3SIDH 0x10
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#define RXF3SIDL 0x11
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#define RXF3EID8 0x12
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#define RXF3EID0 0x13
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#define RXF4SIDH 0x14
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#define RXF4SIDL 0x15
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#define RXF4EID8 0x16
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#define RXF4EID0 0x17
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#define RXF5SIDH 0x18
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#define RXF5SIDL 0x19
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#define RXF5EID8 0x1A
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#define RXF5EID0 0x1B
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#define TEC 0x1C
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#define REC 0x1D
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#define RXM0SIDH 0x20
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#define RXM0SIDL 0x21
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#define RXM0EID8 0x22
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#define RXM0EID0 0x23
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#define RXM1SIDH 0x24
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#define RXM1SIDL 0x25
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#define RXM1EID8 0x26
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#define RXM1EID0 0x27
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#define CNF3 0x28
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#define CNF2 0x29
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#define CNF1 0x2A
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#define CANINTE 0x2B
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#define CANINTF 0x2C
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#define EFLG 0x2D
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#define TXB0CTRL 0x30
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#define TXB0SIDH 0x31
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#define TXB0SIDL 0x32
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#define TXB0EID8 0x33
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#define TXB0EID0 0x34
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#define TXB0DLC 0x35
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#define TXB0D0 0x36
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#define TXB0D1 0x37
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#define TXB0D2 0x38
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#define TXB0D3 0x39
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#define TXB0D4 0x3A
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#define TXB0D5 0x3B
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#define TXB0D6 0x3C
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#define TXB0D7 0x3D
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#define TXB1CTRL 0x40
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#define TXB1SIDH 0x41
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#define TXB1SIDL 0x42
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#define TXB1EID8 0x43
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#define TXB1EID0 0x44
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#define TXB1DLC 0x45
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#define TXB1D0 0x46
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#define TXB1D1 0x47
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#define TXB1D2 0x48
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#define TXB1D3 0x49
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#define TXB1D4 0x4A
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#define TXB1D5 0x4B
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#define TXB1D6 0x4C
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#define TXB1D7 0x4D
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#define TXB2CTRL 0x50
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#define TXB2SIDH 0x51
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#define TXB2SIDL 0x52
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#define TXB2EID8 0x53
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#define TXB2EID0 0x54
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#define TXB2DLC 0x55
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#define TXB2D0 0x56
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#define TXB2D1 0x57
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#define TXB2D2 0x58
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#define TXB2D3 0x59
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#define TXB2D4 0x5A
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#define TXB2D5 0x5B
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#define TXB2D6 0x5C
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#define TXB2D7 0x5D
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#define RXB0CTRL 0x60
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#define RXB0SIDH 0x61
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#define RXB0SIDL 0x62
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#define RXB0EID8 0x63
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#define RXB0EID0 0x64
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#define RXB0DLC 0x65
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#define RXB0D0 0x66
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#define RXB0D1 0x67
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#define RXB0D2 0x68
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#define RXB0D3 0x69
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#define RXB0D4 0x6A
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#define RXB0D5 0x6B
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#define RXB0D6 0x6C
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#define RXB0D7 0x6D
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#define RXB1CTRL 0x70
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#define RXB1SIDH 0x71
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#define RXB1SIDL 0x72
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#define RXB1EID8 0x73
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#define RXB1EID0 0x74
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#define RXB1DLC 0x75
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#define RXB1D0 0x76
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#define RXB1D1 0x77
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#define RXB1D2 0x78
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#define RXB1D3 0x79
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#define RXB1D4 0x7A
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#define RXB1D5 0x7B
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#define RXB1D6 0x7C
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#define RXB1D7 0x7D
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/*@}*/
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/** \name Bitdefinition der verschiedenen Register */
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/*@{*/
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/** \brief Bitdefinition von BFPCTRL */
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#define B1BFS 5
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#define B0BFS 4
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#define B1BFE 3
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#define B0BFE 2
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#define B1BFM 1
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#define B0BFM 0
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/** \brief Bitdefinition von TXRTSCTRL */
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#define B2RTS 5
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#define B1RTS 4
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#define B0RTS 3
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#define B2RTSM 2
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#define B1RTSM 1
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#define B0RTSM 0
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/** \brief Bitdefinition von CANSTAT */
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#define OPMOD2 7
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#define OPMOD1 6
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#define OPMOD0 5
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#define ICOD2 3
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#define ICOD1 2
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#define ICOD0 1
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/** \brief Bitdefinition von CANCTRL */
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#define REQOP2 7
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#define REQOP1 6
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#define REQOP0 5
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#define ABAT 4
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#define CLKEN 2
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#define CLKPRE1 1
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#define CLKPRE0 0
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/** \brief Bitdefinition von CNF3 */
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#define WAKFIL 6
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#define PHSEG22 2
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#define PHSEG21 1
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#define PHSEG20 0
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/** \brief Bitdefinition von CNF2 */
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#define BTLMODE 7
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#define SAM 6
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#define PHSEG12 5
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#define PHSEG11 4
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#define PHSEG10 3
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#define PHSEG2 2
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#define PHSEG1 1
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#define PHSEG0 0
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/** \brief Bitdefinition von CNF1 */
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#define SJW1 7
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#define SJW0 6
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#define BRP5 5
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#define BRP4 4
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#define BRP3 3
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#define BRP2 2
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#define BRP1 1
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#define BRP0 0
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/** \brief Bitdefinition von CANINTE */
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#define MERRE 7
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#define WAKIE 6
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#define ERRIE 5
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#define TX2IE 4
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#define TX1IE 3
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#define TX0IE 2
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#define RX1IE 1
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#define RX0IE 0
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/** \brief Bitdefinition von CANINTF */
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#define MERRF 7
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#define WAKIF 6
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#define ERRIF 5
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#define TX2IF 4
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#define TX1IF 3
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#define TX0IF 2
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#define RX1IF 1
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#define RX0IF 0
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/** \brief Bitdefinition von EFLG */
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#define RX1OVR 7
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#define RX0OVR 6
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#define TXB0 5
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#define TXEP 4
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#define RXEP 3
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#define TXWAR 2
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#define RXWAR 1
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#define EWARN 0
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/** \brief Bitdefinition von TXBnCTRL (n = 0, 1, 2) */
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#define ABTF 6
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#define MLOA 5
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#define TXERR 4
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#define TXREQ 3
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#define TXP1 1
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#define TXP0 0
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/** \brief Bitdefinition von RXB0CTRL */
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#define RXM1 6
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#define RXM0 5
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#define RXRTR 3
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#define BUKT 2
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#define BUKT1 1
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#define FILHIT0 0
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/** \brief Bitdefinition von TXBnSIDL (n = 0, 1) */
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#define EXIDE 3
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/**
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* \brief Bitdefinition von RXB1CTRL
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* \see RXM1, RXM0, RXRTR und FILHIT0 sind schon fuer RXB0CTRL definiert
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*/
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#define FILHIT2 2
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#define FILHIT1 1
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/** \brief Bitdefinition von RXBnSIDL (n = 0, 1) */
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#define SRR 4
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#define IDE 3
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/**
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* \brief Bitdefinition von RXBnDLC (n = 0, 1)
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* \see TXBnDLC (gleiche Bits)
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*/
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#define RTR 6
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#define DLC3 3
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#define DLC2 2
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#define DLC1 1
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#define DLC0 0
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/*@}*/
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#endif // MCP2515_DEFS_H
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