Hacker-Jeopardy/Mainboard/Mainboard/Debug/Mainboard.lss
2013-10-07 16:10:19 +00:00

2503 lines
88 KiB
Plaintext

Mainboard.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .data 0000003e 00800100 00000ef6 00000f8a 2**0
CONTENTS, ALLOC, LOAD, DATA
1 .text 00000ef6 00000000 00000000 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .bss 0000000c 0080013e 0080013e 00000fc8 2**0
ALLOC
3 .stab 00000d2c 00000000 00000000 00000fc8 2**2
CONTENTS, READONLY, DEBUGGING
4 .stabstr 00000209 00000000 00000000 00001cf4 2**0
CONTENTS, READONLY, DEBUGGING
5 .comment 0000002f 00000000 00000000 00001efd 2**0
CONTENTS, READONLY
6 .debug_aranges 000001f0 00000000 00000000 00001f2c 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_info 000020ca 00000000 00000000 0000211c 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_abbrev 00000d9a 00000000 00000000 000041e6 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_line 000010cf 00000000 00000000 00004f80 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_frame 00000510 00000000 00000000 00006050 2**2
CONTENTS, READONLY, DEBUGGING
11 .debug_str 0000074d 00000000 00000000 00006560 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 0000198b 00000000 00000000 00006cad 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000190 00000000 00000000 00008638 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 0c 94 61 00 jmp 0xc2 ; 0xc2 <__ctors_end>
4: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
8: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
c: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
10: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
14: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
18: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
1c: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
20: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
24: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
28: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
2c: 0c 94 34 03 jmp 0x668 ; 0x668 <__vector_11>
30: 0c 94 5c 03 jmp 0x6b8 ; 0x6b8 <__vector_12>
34: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
38: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
3c: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
40: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
44: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
48: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
4c: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
50: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
54: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
58: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
5c: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
60: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
64: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
68: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
6c: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
70: 0c 94 7e 00 jmp 0xfc ; 0xfc <__bad_interrupt>
00000074 <device_descriptor>:
74: 12 01 00 02 ff 00 00 10 ad de ee be 00 01 01 02 ................
84: 03 01 ..
00000086 <string0>:
86: 04 03 09 04 ....
0000008a <string1>:
8a: 14 03 42 00 6c 00 75 00 62 00 62 00 46 00 69 00 ..B.l.u.b.b.F.i.
9a: 73 00 68 00 00 00 s.h...
000000a0 <string2>:
a0: 20 03 48 00 61 00 63 00 6b 00 65 00 72 00 2d 00 .H.a.c.k.e.r.-.
b0: 4a 00 65 00 6f 00 70 00 61 00 72 00 64 00 79 00 J.e.o.p.a.r.d.y.
...
000000c2 <__ctors_end>:
c2: 11 24 eor r1, r1
c4: 1f be out 0x3f, r1 ; 63
c6: cf ef ldi r28, 0xFF ; 255
c8: d4 e0 ldi r29, 0x04 ; 4
ca: de bf out 0x3e, r29 ; 62
cc: cd bf out 0x3d, r28 ; 61
000000ce <__do_copy_data>:
ce: 11 e0 ldi r17, 0x01 ; 1
d0: a0 e0 ldi r26, 0x00 ; 0
d2: b1 e0 ldi r27, 0x01 ; 1
d4: e6 ef ldi r30, 0xF6 ; 246
d6: fe e0 ldi r31, 0x0E ; 14
d8: 02 c0 rjmp .+4 ; 0xde <__do_copy_data+0x10>
da: 05 90 lpm r0, Z+
dc: 0d 92 st X+, r0
de: ae 33 cpi r26, 0x3E ; 62
e0: b1 07 cpc r27, r17
e2: d9 f7 brne .-10 ; 0xda <__do_copy_data+0xc>
000000e4 <__do_clear_bss>:
e4: 21 e0 ldi r18, 0x01 ; 1
e6: ae e3 ldi r26, 0x3E ; 62
e8: b1 e0 ldi r27, 0x01 ; 1
ea: 01 c0 rjmp .+2 ; 0xee <.do_clear_bss_start>
000000ec <.do_clear_bss_loop>:
ec: 1d 92 st X+, r1
000000ee <.do_clear_bss_start>:
ee: aa 34 cpi r26, 0x4A ; 74
f0: b2 07 cpc r27, r18
f2: e1 f7 brne .-8 ; 0xec <.do_clear_bss_loop>
f4: 0e 94 33 01 call 0x266 ; 0x266 <main>
f8: 0c 94 79 07 jmp 0xef2 ; 0xef2 <_exit>
000000fc <__bad_interrupt>:
fc: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
00000100 <led>:
100: 95 b1 in r25, 0x05 ; 5
102: 9f 71 andi r25, 0x1F ; 31
104: 95 b9 out 0x05, r25 ; 5
106: 95 b1 in r25, 0x05 ; 5
108: 82 95 swap r24
10a: 88 0f add r24, r24
10c: 80 7e andi r24, 0xE0 ; 224
10e: 98 2b or r25, r24
110: 95 b9 out 0x05, r25 ; 5
112: 08 95 ret
00000114 <init_led>:
114: 84 b1 in r24, 0x04 ; 4
116: 80 6e ori r24, 0xE0 ; 224
118: 84 b9 out 0x04, r24 ; 4
11a: 08 95 ret
0000011c <init>:
11c: 86 e0 ldi r24, 0x06 ; 6
11e: 90 e0 ldi r25, 0x00 ; 0
120: 0e 94 80 00 call 0x100 ; 0x100 <led>
124: 78 94 sei
126: 0e 94 8a 00 call 0x114 ; 0x114 <init_led>
12a: 0e 94 4e 01 call 0x29c ; 0x29c <init_rs232>
12e: 0e 94 ba 01 call 0x374 ; 0x374 <init_usb>
132: 08 95 ret
00000134 <fade>:
134: 2f 92 push r2
136: 3f 92 push r3
138: 4f 92 push r4
13a: 5f 92 push r5
13c: 6f 92 push r6
13e: 7f 92 push r7
140: 8f 92 push r8
142: 9f 92 push r9
144: af 92 push r10
146: bf 92 push r11
148: cf 92 push r12
14a: df 92 push r13
14c: ef 92 push r14
14e: ff 92 push r15
150: 0f 93 push r16
152: 1f 93 push r17
154: cf 93 push r28
156: df 93 push r29
158: 7c 01 movw r14, r24
15a: 8b 01 movw r16, r22
15c: 5a 01 movw r10, r20
15e: c0 e0 ldi r28, 0x00 ; 0
160: d0 e0 ldi r29, 0x00 ; 0
162: 21 2c mov r2, r1
164: 31 2c mov r3, r1
166: 42 2c mov r4, r2
168: 53 2c mov r5, r3
16a: 2c c0 rjmp .+88 ; 0x1c4 <fade+0x90>
16c: 86 2c mov r8, r6
16e: 97 2c mov r9, r7
170: c7 01 movw r24, r14
172: 0e 94 80 00 call 0x100 ; 0x100 <led>
176: 8f ef ldi r24, 0xFF ; 255
178: 88 1a sub r8, r24
17a: 98 0a sbc r9, r24
17c: 8f ef ldi r24, 0xFF ; 255
17e: 88 16 cp r8, r24
180: 91 04 cpc r9, r1
182: b1 f7 brne .-20 ; 0x170 <fade+0x3c>
184: 1c 16 cp r1, r28
186: 1d 06 cpc r1, r29
188: 5c f4 brge .+22 ; 0x1a0 <fade+0x6c>
18a: 84 2c mov r8, r4
18c: 95 2c mov r9, r5
18e: c8 01 movw r24, r16
190: 0e 94 80 00 call 0x100 ; 0x100 <led>
194: 8f ef ldi r24, 0xFF ; 255
196: 88 1a sub r8, r24
198: 98 0a sbc r9, r24
19a: 8c 16 cp r8, r28
19c: 9d 06 cpc r9, r29
19e: b9 f7 brne .-18 ; 0x18e <fade+0x5a>
1a0: 8f ef ldi r24, 0xFF ; 255
1a2: c8 1a sub r12, r24
1a4: d8 0a sbc r13, r24
1a6: ca 14 cp r12, r10
1a8: db 04 cpc r13, r11
1aa: 21 f4 brne .+8 ; 0x1b4 <fade+0x80>
1ac: 07 c0 rjmp .+14 ; 0x1bc <fade+0x88>
1ae: 61 01 movw r12, r2
1b0: 6c 2e mov r6, r28
1b2: 7d 2e mov r7, r29
1b4: cf 3f cpi r28, 0xFF ; 255
1b6: d1 05 cpc r29, r1
1b8: cc f2 brlt .-78 ; 0x16c <fade+0x38>
1ba: e4 cf rjmp .-56 ; 0x184 <fade+0x50>
1bc: 21 96 adiw r28, 0x01 ; 1
1be: cf 3f cpi r28, 0xFF ; 255
1c0: d1 05 cpc r29, r1
1c2: 21 f0 breq .+8 ; 0x1cc <fade+0x98>
1c4: 1a 14 cp r1, r10
1c6: 1b 04 cpc r1, r11
1c8: 94 f3 brlt .-28 ; 0x1ae <fade+0x7a>
1ca: f8 cf rjmp .-16 ; 0x1bc <fade+0x88>
1cc: df 91 pop r29
1ce: cf 91 pop r28
1d0: 1f 91 pop r17
1d2: 0f 91 pop r16
1d4: ff 90 pop r15
1d6: ef 90 pop r14
1d8: df 90 pop r13
1da: cf 90 pop r12
1dc: bf 90 pop r11
1de: af 90 pop r10
1e0: 9f 90 pop r9
1e2: 8f 90 pop r8
1e4: 7f 90 pop r7
1e6: 6f 90 pop r6
1e8: 5f 90 pop r5
1ea: 4f 90 pop r4
1ec: 3f 90 pop r3
1ee: 2f 90 pop r2
1f0: 08 95 ret
000001f2 <programRainbow>:
1f2: c8 2f mov r28, r24
1f4: 4a e0 ldi r20, 0x0A ; 10
1f6: 50 e0 ldi r21, 0x00 ; 0
1f8: 64 e0 ldi r22, 0x04 ; 4
1fa: 70 e0 ldi r23, 0x00 ; 0
1fc: 87 e0 ldi r24, 0x07 ; 7
1fe: 90 e0 ldi r25, 0x00 ; 0
200: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
204: 4c 2f mov r20, r28
206: 50 e0 ldi r21, 0x00 ; 0
208: 66 e0 ldi r22, 0x06 ; 6
20a: 70 e0 ldi r23, 0x00 ; 0
20c: 84 e0 ldi r24, 0x04 ; 4
20e: 90 e0 ldi r25, 0x00 ; 0
210: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
214: 4c 2f mov r20, r28
216: 50 e0 ldi r21, 0x00 ; 0
218: 62 e0 ldi r22, 0x02 ; 2
21a: 70 e0 ldi r23, 0x00 ; 0
21c: 86 e0 ldi r24, 0x06 ; 6
21e: 90 e0 ldi r25, 0x00 ; 0
220: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
224: 4c 2f mov r20, r28
226: 50 e0 ldi r21, 0x00 ; 0
228: 63 e0 ldi r22, 0x03 ; 3
22a: 70 e0 ldi r23, 0x00 ; 0
22c: 82 e0 ldi r24, 0x02 ; 2
22e: 90 e0 ldi r25, 0x00 ; 0
230: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
234: 4c 2f mov r20, r28
236: 50 e0 ldi r21, 0x00 ; 0
238: 61 e0 ldi r22, 0x01 ; 1
23a: 70 e0 ldi r23, 0x00 ; 0
23c: 83 e0 ldi r24, 0x03 ; 3
23e: 90 e0 ldi r25, 0x00 ; 0
240: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
244: 4c 2f mov r20, r28
246: 50 e0 ldi r21, 0x00 ; 0
248: 65 e0 ldi r22, 0x05 ; 5
24a: 70 e0 ldi r23, 0x00 ; 0
24c: 81 e0 ldi r24, 0x01 ; 1
24e: 90 e0 ldi r25, 0x00 ; 0
250: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
254: 4c 2f mov r20, r28
256: 50 e0 ldi r21, 0x00 ; 0
258: 64 e0 ldi r22, 0x04 ; 4
25a: 70 e0 ldi r23, 0x00 ; 0
25c: 85 e0 ldi r24, 0x05 ; 5
25e: 90 e0 ldi r25, 0x00 ; 0
260: 0e 94 9a 00 call 0x134 ; 0x134 <fade>
264: cf cf rjmp .-98 ; 0x204 <programRainbow+0x12>
00000266 <main>:
266: 0e 94 8e 00 call 0x11c ; 0x11c <init>
26a: 82 e0 ldi r24, 0x02 ; 2
26c: 90 e0 ldi r25, 0x00 ; 0
26e: 0e 94 80 00 call 0x100 ; 0x100 <led>
272: 8c e3 ldi r24, 0x3C ; 60
274: 0e 94 f9 00 call 0x1f2 ; 0x1f2 <programRainbow>
00000278 <uart_putchar>:
278: cf 93 push r28
27a: c8 2f mov r28, r24
27c: 8a 30 cpi r24, 0x0A ; 10
27e: 19 f4 brne .+6 ; 0x286 <uart_putchar+0xe>
280: 8d e0 ldi r24, 0x0D ; 13
282: 0e 94 3c 01 call 0x278 ; 0x278 <uart_putchar>
286: e8 ec ldi r30, 0xC8 ; 200
288: f0 e0 ldi r31, 0x00 ; 0
28a: 90 81 ld r25, Z
28c: 95 ff sbrs r25, 5
28e: fd cf rjmp .-6 ; 0x28a <uart_putchar+0x12>
290: c0 93 ce 00 sts 0x00CE, r28
294: 80 e0 ldi r24, 0x00 ; 0
296: 90 e0 ldi r25, 0x00 ; 0
298: cf 91 pop r28
29a: 08 95 ret
0000029c <init_rs232>:
29c: 86 e0 ldi r24, 0x06 ; 6
29e: 80 93 ca 00 sts 0x00CA, r24
2a2: e9 ec ldi r30, 0xC9 ; 201
2a4: f0 e0 ldi r31, 0x00 ; 0
2a6: 80 81 ld r24, Z
2a8: 88 60 ori r24, 0x08 ; 8
2aa: 80 83 st Z, r24
2ac: 87 e6 ldi r24, 0x67 ; 103
2ae: 80 93 cc 00 sts 0x00CC, r24
2b2: 80 e0 ldi r24, 0x00 ; 0
2b4: 91 e0 ldi r25, 0x01 ; 1
2b6: 90 93 47 01 sts 0x0147, r25
2ba: 80 93 46 01 sts 0x0146, r24
2be: 08 95 ret
000002c0 <usb_controlrequest>:
2c0: cf 93 push r28
2c2: df 93 push r29
2c4: cd b7 in r28, 0x3d ; 61
2c6: de b7 in r29, 0x3e ; 62
2c8: 60 97 sbiw r28, 0x10 ; 16
2ca: 0f b6 in r0, 0x3f ; 63
2cc: f8 94 cli
2ce: de bf out 0x3e, r29 ; 62
2d0: 0f be out 0x3f, r0 ; 63
2d2: cd bf out 0x3d, r28 ; 61
2d4: 2c e0 ldi r18, 0x0C ; 12
2d6: e5 e1 ldi r30, 0x15 ; 21
2d8: f1 e0 ldi r31, 0x01 ; 1
2da: de 01 movw r26, r28
2dc: 11 96 adiw r26, 0x01 ; 1
2de: 01 90 ld r0, Z+
2e0: 0d 92 st X+, r0
2e2: 2a 95 dec r18
2e4: e1 f7 brne .-8 ; 0x2de <usb_controlrequest+0x1e>
2e6: 1d 86 std Y+13, r1 ; 0x0d
2e8: 1e 86 std Y+14, r1 ; 0x0e
2ea: 1f 86 std Y+15, r1 ; 0x0f
2ec: 18 8a std Y+16, r1 ; 0x10
2ee: fc 01 movw r30, r24
2f0: 20 81 ld r18, Z
2f2: 23 3c cpi r18, 0xC3 ; 195
2f4: 51 f4 brne .+20 ; 0x30a <usb_controlrequest+0x4a>
2f6: 81 81 ldd r24, Z+1 ; 0x01
2f8: 81 30 cpi r24, 0x01 ; 1
2fa: 49 f4 brne .+18 ; 0x30e <usb_controlrequest+0x4e>
2fc: 60 e1 ldi r22, 0x10 ; 16
2fe: ce 01 movw r24, r28
300: 01 96 adiw r24, 0x01 ; 1
302: 0e 94 e2 02 call 0x5c4 ; 0x5c4 <usb_txdata_control>
306: 81 e0 ldi r24, 0x01 ; 1
308: 03 c0 rjmp .+6 ; 0x310 <usb_controlrequest+0x50>
30a: 80 e0 ldi r24, 0x00 ; 0
30c: 01 c0 rjmp .+2 ; 0x310 <usb_controlrequest+0x50>
30e: 80 e0 ldi r24, 0x00 ; 0
310: 60 96 adiw r28, 0x10 ; 16
312: 0f b6 in r0, 0x3f ; 63
314: f8 94 cli
316: de bf out 0x3e, r29 ; 62
318: 0f be out 0x3f, r0 ; 63
31a: cd bf out 0x3d, r28 ; 61
31c: df 91 pop r29
31e: cf 91 pop r28
320: 08 95 ret
00000322 <usb_ep>:
322: cf 93 push r28
324: df 93 push r29
326: cd b7 in r28, 0x3d ; 61
328: de b7 in r29, 0x3e ; 62
32a: a0 97 sbiw r28, 0x20 ; 32
32c: 0f b6 in r0, 0x3f ; 63
32e: f8 94 cli
330: de bf out 0x3e, r29 ; 62
332: 0f be out 0x3f, r0 ; 63
334: cd bf out 0x3d, r28 ; 61
336: 81 30 cpi r24, 0x01 ; 1
338: a1 f4 brne .+40 ; 0x362 <usb_ep+0x40>
33a: 40 e2 ldi r20, 0x20 ; 32
33c: be 01 movw r22, r28
33e: 6f 5f subi r22, 0xFF ; 255
340: 7f 4f sbci r23, 0xFF ; 255
342: 0e 94 bd 02 call 0x57a ; 0x57a <usb_rxdata>
346: 88 23 and r24, r24
348: 61 f0 breq .+24 ; 0x362 <usb_ep+0x40>
34a: 18 a2 std Y+32, r1 ; 0x20
34c: ce 01 movw r24, r28
34e: 01 96 adiw r24, 0x01 ; 1
350: 0e 94 54 07 call 0xea8 ; 0xea8 <strupr>
354: 40 e2 ldi r20, 0x20 ; 32
356: be 01 movw r22, r28
358: 6f 5f subi r22, 0xFF ; 255
35a: 7f 4f sbci r23, 0xFF ; 255
35c: 81 e8 ldi r24, 0x81 ; 129
35e: 0e 94 05 03 call 0x60a ; 0x60a <usb_txdata>
362: a0 96 adiw r28, 0x20 ; 32
364: 0f b6 in r0, 0x3f ; 63
366: f8 94 cli
368: de bf out 0x3e, r29 ; 62
36a: 0f be out 0x3f, r0 ; 63
36c: cd bf out 0x3d, r28 ; 61
36e: df 91 pop r29
370: cf 91 pop r28
372: 08 95 ret
00000374 <init_usb>:
374: 0e 94 bd 01 call 0x37a ; 0x37a <usb_init>
378: 08 95 ret
0000037a <usb_init>:
37a: 80 ea ldi r24, 0xA0 ; 160
37c: 80 93 d8 00 sts 0x00D8, r24
380: 86 e0 ldi r24, 0x06 ; 6
382: 89 bd out 0x29, r24 ; 41
384: 09 b4 in r0, 0x29 ; 41
386: 00 fe sbrs r0, 0
388: fd cf rjmp .-6 ; 0x384 <usb_init+0xa>
38a: 80 e8 ldi r24, 0x80 ; 128
38c: 80 93 d8 00 sts 0x00D8, r24
390: 10 92 e0 00 sts 0x00E0, r1
394: 10 92 3e 01 sts 0x013E, r1
398: 8f ef ldi r24, 0xFF ; 255
39a: 80 93 0e 01 sts 0x010E, r24
39e: 3c 98 cbi 0x07, 4 ; 7
3a0: 88 e0 ldi r24, 0x08 ; 8
3a2: 80 93 e2 00 sts 0x00E2, r24
3a6: 08 95 ret
000003a8 <usb_endpoints>:
3a8: 2f 92 push r2
3aa: 3f 92 push r3
3ac: 4f 92 push r4
3ae: 5f 92 push r5
3b0: 7f 92 push r7
3b2: 8f 92 push r8
3b4: 9f 92 push r9
3b6: af 92 push r10
3b8: cf 92 push r12
3ba: df 92 push r13
#if (NUMINTERFACES>1)
void usb_endpoints(uint8_t ifnumber) // with interface number
#else
void usb_endpoints(void)
#endif
{
3bc: ef 92 push r14
3be: ff 92 push r15
3c0: 0f 93 push r16
3c2: 1f 93 push r17
3c4: cf 93 push r28
3c6: df 93 push r29
3c8: 28 2f mov r18, r24
//-----------------------------------------------------------------------------
// Initializing Endpoints
//-----------------------------------------------------------------------------
#if (NUMINTERFACES>1)
void usb_endpoints(uint8_t ifnumber) // with interface number
3ca: 90 e0 ldi r25, 0x00 ; 0
3cc: 6c e0 ldi r22, 0x0C ; 12
3ce: 70 e0 ldi r23, 0x00 ; 0
3d0: 0e 94 0a 06 call 0xc14 ; 0xc14 <__mulhi3>
3d4: fc 01 movw r30, r24
3d6: eb 5d subi r30, 0xDB ; 219
3d8: fe 4f sbci r31, 0xFE ; 254
3da: 82 2f mov r24, r18
3dc: 90 e0 ldi r25, 0x00 ; 0
3de: 6c e0 ldi r22, 0x0C ; 12
3e0: 70 e0 ldi r23, 0x00 ; 0
3e2: 0e 94 0a 06 call 0xc14 ; 0xc14 <__mulhi3>
3e6: 89 5d subi r24, 0xD9 ; 217
3e8: 9e 4f sbci r25, 0xFE ; 254
3ea: 41 e0 ldi r20, 0x01 ; 1
#endif
uint8_t i;
for (i=0; i<MAX_ENDPOINT; i++) {
if (EPC.ep_type!=EP_TYPE_DISABLED) {
UENUM = i+1; // select endpoint
3ec: 0f 2e mov r0, r31
3ee: f9 ee ldi r31, 0xE9 ; 233
3f0: cf 2e mov r12, r31
3f2: d1 2c mov r13, r1
3f4: f0 2d mov r31, r0
UECONX = _BV(EPEN); // enable endpoint
3f6: 0f 2e mov r0, r31
3f8: fb ee ldi r31, 0xEB ; 235
3fa: ef 2e mov r14, r31
3fc: f1 2c mov r15, r1
3fe: f0 2d mov r31, r0
400: aa 24 eor r10, r10
402: a3 94 inc r10
UECFG0X = EPC.ep_type; // transfer type and direction
404: 0c ee ldi r16, 0xEC ; 236
406: 10 e0 ldi r17, 0x00 ; 0
UECFG1X = EP_SIZE(EPC.ep_size)|
408: 6d ee ldi r22, 0xED ; 237
40a: 70 e0 ldi r23, 0x00 ; 0
(EPC.ep_buffer); // bufer size and bank
if (IN_TRANSFER) UEIENX = 0; // no interrupts handling for IN endpoints
else UEIENX = _BV(RXOUTE); // interrupt handling for incoming data (OUT endpoint)
40c: 0f 2e mov r0, r31
40e: f0 ef ldi r31, 0xF0 ; 240
410: 4f 2e mov r4, r31
412: 51 2c mov r5, r1
414: f0 2d mov r31, r0
416: 68 94 set
418: 99 24 eor r9, r9
41a: 92 f8 bld r9, 2
for (i=0; i<MAX_ENDPOINT; i++) {
if (EPC.ep_type!=EP_TYPE_DISABLED) {
UENUM = i+1; // select endpoint
UECONX = _BV(EPEN); // enable endpoint
UECFG0X = EPC.ep_type; // transfer type and direction
UECFG1X = EP_SIZE(EPC.ep_size)|
41c: 81 2c mov r8, r1
41e: 68 94 set
420: 77 24 eor r7, r7
422: 74 f8 bld r7, 4
//-----------------------------------------------------------------------------
// Initializing Endpoints
//-----------------------------------------------------------------------------
#if (NUMINTERFACES>1)
void usb_endpoints(uint8_t ifnumber) // with interface number
424: df 01 movw r26, r30
#define IN_TRANSFER EP_CONFIG[i].ep_type & 0x01
#endif
uint8_t i;
for (i=0; i<MAX_ENDPOINT; i++) {
if (EPC.ep_type!=EP_TYPE_DISABLED) {
426: 20 81 ld r18, Z
428: 2f 3f cpi r18, 0xFF ; 255
42a: 59 f1 breq .+86 ; 0x482 <usb_endpoints+0xda>
UENUM = i+1; // select endpoint
42c: e6 01 movw r28, r12
42e: 48 83 st Y, r20
UECONX = _BV(EPEN); // enable endpoint
430: e7 01 movw r28, r14
432: a8 82 st Y, r10
UECFG0X = EPC.ep_type; // transfer type and direction
434: 20 81 ld r18, Z
436: e8 01 movw r28, r16
438: 28 83 st Y, r18
//-----------------------------------------------------------------------------
// Initializing Endpoints
//-----------------------------------------------------------------------------
#if (NUMINTERFACES>1)
void usb_endpoints(uint8_t ifnumber) // with interface number
43a: 1c 01 movw r2, r24
43c: 9c 01 movw r18, r24
43e: 21 50 subi r18, 0x01 ; 1
440: 31 09 sbc r19, r1
for (i=0; i<MAX_ENDPOINT; i++) {
if (EPC.ep_type!=EP_TYPE_DISABLED) {
UENUM = i+1; // select endpoint
UECONX = _BV(EPEN); // enable endpoint
UECFG0X = EPC.ep_type; // transfer type and direction
UECFG1X = EP_SIZE(EPC.ep_size)|
442: e9 01 movw r28, r18
444: 28 81 ld r18, Y
446: 20 38 cpi r18, 0x80 ; 128
448: 41 f0 breq .+16 ; 0x45a <usb_endpoints+0xb2>
44a: 20 34 cpi r18, 0x40 ; 64
44c: 41 f0 breq .+16 ; 0x45e <usb_endpoints+0xb6>
44e: 20 32 cpi r18, 0x20 ; 32
450: 41 f0 breq .+16 ; 0x462 <usb_endpoints+0xba>
452: 20 31 cpi r18, 0x10 ; 16
454: 41 f4 brne .+16 ; 0x466 <usb_endpoints+0xbe>
456: 37 2d mov r19, r7
458: 07 c0 rjmp .+14 ; 0x468 <usb_endpoints+0xc0>
45a: 30 e4 ldi r19, 0x40 ; 64
45c: 05 c0 rjmp .+10 ; 0x468 <usb_endpoints+0xc0>
45e: 30 e3 ldi r19, 0x30 ; 48
460: 03 c0 rjmp .+6 ; 0x468 <usb_endpoints+0xc0>
462: 30 e2 ldi r19, 0x20 ; 32
464: 01 c0 rjmp .+2 ; 0x468 <usb_endpoints+0xc0>
466: 38 2d mov r19, r8
468: e1 01 movw r28, r2
46a: 28 81 ld r18, Y
46c: 23 2b or r18, r19
46e: eb 01 movw r28, r22
470: 28 83 st Y, r18
(EPC.ep_buffer); // bufer size and bank
if (IN_TRANSFER) UEIENX = 0; // no interrupts handling for IN endpoints
472: 2c 91 ld r18, X
474: 20 ff sbrs r18, 0
476: 03 c0 rjmp .+6 ; 0x47e <usb_endpoints+0xd6>
478: d2 01 movw r26, r4
47a: 1c 92 st X, r1
47c: 02 c0 rjmp .+4 ; 0x482 <usb_endpoints+0xda>
else UEIENX = _BV(RXOUTE); // interrupt handling for incoming data (OUT endpoint)
47e: e2 01 movw r28, r4
480: 98 82 st Y, r9
482: 4f 5f subi r20, 0xFF ; 255
484: 33 96 adiw r30, 0x03 ; 3
486: 03 96 adiw r24, 0x03 ; 3
#define EPC EP_CONFIG[i]
#define IN_TRANSFER EP_CONFIG[i].ep_type & 0x01
#endif
uint8_t i;
for (i=0; i<MAX_ENDPOINT; i++) {
488: 45 30 cpi r20, 0x05 ; 5
48a: 61 f6 brne .-104 ; 0x424 <usb_endpoints+0x7c>
}
}
#ifdef MEGA4_6
UERST = 0x7E; // endpoint FIFO reset for endpoint 1, 2, 3, 4, 5 and 6
#else
UERST = 0x1E; // endpoint FIFO reset for endpoint 1, 2, 3 and 4
48c: ea ee ldi r30, 0xEA ; 234
48e: f0 e0 ldi r31, 0x00 ; 0
490: 8e e1 ldi r24, 0x1E ; 30
492: 80 83 st Z, r24
#endif
UERST = 0;
494: 10 82 st Z, r1
}
496: df 91 pop r29
498: cf 91 pop r28
49a: 1f 91 pop r17
49c: 0f 91 pop r16
49e: ff 90 pop r15
4a0: ef 90 pop r14
4a2: df 90 pop r13
4a4: cf 90 pop r12
4a6: af 90 pop r10
4a8: 9f 90 pop r9
4aa: 8f 90 pop r8
4ac: 7f 90 pop r7
4ae: 5f 90 pop r5
4b0: 4f 90 pop r4
4b2: 3f 90 pop r3
4b4: 2f 90 pop r2
4b6: 08 95 ret
000004b8 <usb_wait_in>:
void usb_wait_in(void)
// wait for host, until it's ready to receive IN package
{
uint8_t i;
do {
i = UEINTX;
4b8: e8 ee ldi r30, 0xE8 ; 232
4ba: f0 e0 ldi r31, 0x00 ; 0
4bc: 80 81 ld r24, Z
} while (!(i & (_BV(TXINI)|_BV(RXOUTI))));
4be: 85 70 andi r24, 0x05 ; 5
4c0: e9 f3 breq .-6 ; 0x4bc <usb_wait_in+0x4>
}
4c2: 08 95 ret
000004c4 <usb_desc_out>:
void usb_desc_out(bool isRAM, const uint8_t *pgmaddr, uint8_t size, uint16_t maxsize)
// return descriptor over endpoint 0 to host from flash memory or RAM
{
4c4: af 92 push r10
4c6: bf 92 push r11
4c8: cf 92 push r12
4ca: df 92 push r13
4cc: ef 92 push r14
4ce: ff 92 push r15
4d0: 0f 93 push r16
4d2: 1f 93 push r17
4d4: cf 93 push r28
4d6: df 93 push r29
4d8: d8 2e mov r13, r24
4da: d6 2f mov r29, r22
4dc: c7 2f mov r28, r23
uint8_t i=0, len, n;
const uint8_t *addr;
addr=pgmaddr;
len=size;
if (len>maxsize) len=maxsize;
4de: e4 2f mov r30, r20
4e0: f0 e0 ldi r31, 0x00 ; 0
4e2: 2e 17 cp r18, r30
4e4: 3f 07 cpc r19, r31
4e6: 10 f4 brcc .+4 ; 0x4ec <usb_desc_out+0x28>
4e8: c2 2e mov r12, r18
4ea: 01 c0 rjmp .+2 ; 0x4ee <usb_desc_out+0x2a>
{
uint8_t i=0, len, n;
const uint8_t *addr;
addr=pgmaddr;
len=size;
4ec: c4 2e mov r12, r20
if (len>maxsize) len=maxsize;
do {
usb_wait_in();
4ee: 0e 94 5c 02 call 0x4b8 ; 0x4b8 <usb_wait_in>
4f2: 0d 2f mov r16, r29
4f4: 1c 2f mov r17, r28
if (i & _BV(RXOUTI)) return; // cancel
// send IN package
n = (len < ENDPOINT0_SIZE) ? len : ENDPOINT0_SIZE;
4f6: 68 94 set
4f8: aa 24 eor r10, r10
4fa: a4 f8 bld r10, 4
for (i = n; i; i--)
UEDATX = isRAM ? *addr++ : pgm_read_byte(addr++);
len -= n;
USB_SEND_IN;
4fc: 0f 2e mov r0, r31
4fe: f8 ee ldi r31, 0xE8 ; 232
500: ef 2e mov r14, r31
502: f1 2c mov r15, r1
504: f0 2d mov r31, r0
506: 0f 2e mov r0, r31
508: fe ef ldi r31, 0xFE ; 254
50a: bf 2e mov r11, r31
50c: f0 2d mov r31, r0
usb_wait_in();
if (i & _BV(RXOUTI)) return; // cancel
// send IN package
n = (len < ENDPOINT0_SIZE) ? len : ENDPOINT0_SIZE;
for (i = n; i; i--)
UEDATX = isRAM ? *addr++ : pgm_read_byte(addr++);
50e: c1 ef ldi r28, 0xF1 ; 241
510: d0 e0 ldi r29, 0x00 ; 0
if (len>maxsize) len=maxsize;
do {
usb_wait_in();
if (i & _BV(RXOUTI)) return; // cancel
// send IN package
n = (len < ENDPOINT0_SIZE) ? len : ENDPOINT0_SIZE;
512: 2c 2d mov r18, r12
514: 80 e1 ldi r24, 0x10 ; 16
516: 8c 15 cp r24, r12
518: 08 f4 brcc .+2 ; 0x51c <__stack+0x1d>
51a: 2a 2d mov r18, r10
for (i = n; i; i--)
51c: 22 23 and r18, r18
51e: d9 f0 breq .+54 ; 0x556 <__stack+0x57>
520: f8 01 movw r30, r16
522: 92 2f mov r25, r18
UEDATX = isRAM ? *addr++ : pgm_read_byte(addr++);
524: dd 20 and r13, r13
526: 11 f0 breq .+4 ; 0x52c <__stack+0x2d>
528: 80 81 ld r24, Z
52a: 01 c0 rjmp .+2 ; 0x52e <__stack+0x2f>
52c: 84 91 lpm r24, Z
52e: 88 83 st Y, r24
do {
usb_wait_in();
if (i & _BV(RXOUTI)) return; // cancel
// send IN package
n = (len < ENDPOINT0_SIZE) ? len : ENDPOINT0_SIZE;
for (i = n; i; i--)
530: 91 50 subi r25, 0x01 ; 1
532: 31 96 adiw r30, 0x01 ; 1
534: 91 11 cpse r25, r1
536: f6 cf rjmp .-20 ; 0x524 <__stack+0x25>
do {
i = UEINTX;
} while (!(i & (_BV(TXINI)|_BV(RXOUTI))));
}
void usb_desc_out(bool isRAM, const uint8_t *pgmaddr, uint8_t size, uint16_t maxsize)
538: 62 2f mov r22, r18
53a: 61 50 subi r22, 0x01 ; 1
53c: 70 e0 ldi r23, 0x00 ; 0
53e: 6f 5f subi r22, 0xFF ; 255
540: 7f 4f sbci r23, 0xFF ; 255
542: 06 0f add r16, r22
544: 17 1f adc r17, r23
if (i & _BV(RXOUTI)) return; // cancel
// send IN package
n = (len < ENDPOINT0_SIZE) ? len : ENDPOINT0_SIZE;
for (i = n; i; i--)
UEDATX = isRAM ? *addr++ : pgm_read_byte(addr++);
len -= n;
546: c2 1a sub r12, r18
USB_SEND_IN;
548: f7 01 movw r30, r14
54a: b0 82 st Z, r11
} while (len || n == ENDPOINT0_SIZE);
54c: c1 10 cpse r12, r1
54e: 07 c0 rjmp .+14 ; 0x55e <__stack+0x5f>
550: 20 31 cpi r18, 0x10 ; 16
552: 29 f0 breq .+10 ; 0x55e <__stack+0x5f>
554: 07 c0 rjmp .+14 ; 0x564 <__stack+0x65>
// send IN package
n = (len < ENDPOINT0_SIZE) ? len : ENDPOINT0_SIZE;
for (i = n; i; i--)
UEDATX = isRAM ? *addr++ : pgm_read_byte(addr++);
len -= n;
USB_SEND_IN;
556: f7 01 movw r30, r14
558: b0 82 st Z, r11
} while (len || n == ENDPOINT0_SIZE);
55a: cc 20 and r12, r12
55c: 19 f0 breq .+6 ; 0x564 <__stack+0x65>
addr=pgmaddr;
len=size;
if (len>maxsize) len=maxsize;
do {
usb_wait_in();
55e: 0e 94 5c 02 call 0x4b8 ; 0x4b8 <usb_wait_in>
562: d7 cf rjmp .-82 ; 0x512 <__stack+0x13>
for (i = n; i; i--)
UEDATX = isRAM ? *addr++ : pgm_read_byte(addr++);
len -= n;
USB_SEND_IN;
} while (len || n == ENDPOINT0_SIZE);
}
564: df 91 pop r29
566: cf 91 pop r28
568: 1f 91 pop r17
56a: 0f 91 pop r16
56c: ff 90 pop r15
56e: ef 90 pop r14
570: df 90 pop r13
572: cf 90 pop r12
574: bf 90 pop r11
576: af 90 pop r10
578: 08 95 ret
0000057a <usb_rxdata>:
uint16_t r, i;
#else
uint8_t r, i;
#endif
UENUM = endpoint; // select endpoint
57a: 80 93 e9 00 sts 0x00E9, r24
#ifdef MEGA4_6
r = ((uint16_t)(UEBCHX)<<8)+UEBCLX;
#else
r = UEBCLX;
57e: 90 91 f2 00 lds r25, 0x00F2
582: 94 17 cp r25, r20
584: 08 f4 brcc .+2 ; 0x588 <usb_rxdata+0xe>
586: 49 2f mov r20, r25
#endif
if (r>maxdatasize) r = maxdatasize;
if (r) { // data available in input endpoint
588: 44 23 and r20, r20
58a: d1 f0 breq .+52 ; 0x5c0 <usb_rxdata+0x46>
58c: 36 2f mov r19, r22
58e: e6 2f mov r30, r22
590: f7 2f mov r31, r23
for (i=0; i<r; i++) buffer[i]=UEDATX;
592: a1 ef ldi r26, 0xF1 ; 241
594: b0 e0 ldi r27, 0x00 ; 0
596: 9c 91 ld r25, X
598: 91 93 st Z+, r25
59a: 9e 2f mov r25, r30
59c: 93 1b sub r25, r19
59e: 94 17 cp r25, r20
5a0: d0 f3 brcs .-12 ; 0x596 <usb_rxdata+0x1c>
#ifdef MEGA4_6
if ((((uint16_t)(UEBCHX)<<8)+UEBCLX)==0) { // buffer is empty
#else
if (UEBCLX==0) { // buffer is empty
5a2: 90 91 f2 00 lds r25, 0x00F2
5a6: 91 11 cpse r25, r1
5a8: 0b c0 rjmp .+22 ; 0x5c0 <usb_rxdata+0x46>
#endif
UERST = _BV(endpoint); // endpoint FIFO reset
5aa: 21 e0 ldi r18, 0x01 ; 1
5ac: 30 e0 ldi r19, 0x00 ; 0
5ae: 02 c0 rjmp .+4 ; 0x5b4 <usb_rxdata+0x3a>
5b0: 22 0f add r18, r18
5b2: 33 1f adc r19, r19
5b4: 8a 95 dec r24
5b6: e2 f7 brpl .-8 ; 0x5b0 <usb_rxdata+0x36>
5b8: ea ee ldi r30, 0xEA ; 234
5ba: f0 e0 ldi r31, 0x00 ; 0
5bc: 20 83 st Z, r18
UERST = 0;
5be: 10 82 st Z, r1
}
}
return r;
}
5c0: 84 2f mov r24, r20
5c2: 08 95 ret
000005c4 <usb_txdata_control>:
bool usb_txdata_control(uint8_t *buffer, uint8_t datasize)
{
uint8_t i;
if (datasize) {
5c4: 66 23 and r22, r22
5c6: e9 f0 breq .+58 ; 0x602 <usb_txdata_control+0x3e>
UENUM = 0;
5c8: 10 92 e9 00 sts 0x00E9, r1
#define STALL UECONX = _BV(STALLRQ) | _BV(EPEN)
static inline void usb_wait_in_ready(void)
{
while (!(UEINTX & _BV(TXINI)));
5cc: e8 ee ldi r30, 0xE8 ; 232
5ce: f0 e0 ldi r31, 0x00 ; 0
5d0: 20 81 ld r18, Z
5d2: 20 ff sbrs r18, 0
5d4: fd cf rjmp .-6 ; 0x5d0 <usb_txdata_control+0xc>
UENUM = 0;
usb_wait_in_ready();
#ifdef MEGA4_6
if ((((uint16_t)(UEBCHX)<<8)+UEBCLX)==0) { // buffer is empty
#else
if (UEBCLX==0) { // buffer is empty
5d6: 20 91 f2 00 lds r18, 0x00F2
5da: 21 11 cpse r18, r1
5dc: 14 c0 rjmp .+40 ; 0x606 <usb_txdata_control+0x42>
5de: 28 2f mov r18, r24
5e0: e8 2f mov r30, r24
5e2: f9 2f mov r31, r25
#endif
for (i=0; i<datasize; i++) UEDATX = buffer[i];
5e4: a1 ef ldi r26, 0xF1 ; 241
5e6: b0 e0 ldi r27, 0x00 ; 0
5e8: 81 91 ld r24, Z+
5ea: 8c 93 st X, r24
5ec: 8e 2f mov r24, r30
5ee: 82 1b sub r24, r18
5f0: 86 17 cp r24, r22
5f2: d0 f3 brcs .-12 ; 0x5e8 <usb_txdata_control+0x24>
UEINTX&=~_BV(TXINI); // necessary (in this order) (changed V1.1.1)
5f4: e8 ee ldi r30, 0xE8 ; 232
5f6: f0 e0 ldi r31, 0x00 ; 0
5f8: 80 81 ld r24, Z
5fa: 8e 7f andi r24, 0xFE ; 254
5fc: 80 83 st Z, r24
return true;
5fe: 81 e0 ldi r24, 0x01 ; 1
600: 08 95 ret
}
}
return false;
602: 80 e0 ldi r24, 0x00 ; 0
604: 08 95 ret
606: 80 e0 ldi r24, 0x00 ; 0
}
608: 08 95 ret
0000060a <usb_txdata>:
#ifdef MEGA4_6
bool usb_txdata(uint8_t endpoint, uint8_t *buffer, uint16_t datasize)
#else
bool usb_txdata(uint8_t endpoint, uint8_t *buffer, uint8_t datasize)
#endif
{
60a: cf 93 push r28
60c: df 93 push r29
uint16_t i;
#else
uint8_t i;
#endif
if (datasize) {
60e: 44 23 and r20, r20
610: 29 f1 breq .+74 ; 0x65c <usb_txdata+0x52>
UENUM = endpoint;
612: 80 93 e9 00 sts 0x00E9, r24
#define STALL UECONX = _BV(STALLRQ) | _BV(EPEN)
static inline void usb_wait_in_ready(void)
{
while (!(UEINTX & _BV(TXINI)));
616: e8 ee ldi r30, 0xE8 ; 232
618: f0 e0 ldi r31, 0x00 ; 0
61a: 80 81 ld r24, Z
61c: 80 ff sbrs r24, 0
61e: fd cf rjmp .-6 ; 0x61a <usb_txdata+0x10>
UENUM = endpoint;
usb_wait_in_ready();
#ifdef MEGA4_6
if ((((uint16_t)(UEBCHX)<<8)+UEBCLX)==0) { // buffer is empty
#else
if (UEBCLX==0) { // buffer is empty
620: 80 91 f2 00 lds r24, 0x00F2
624: 81 11 cpse r24, r1
626: 1c c0 rjmp .+56 ; 0x660 <usb_txdata+0x56>
628: 96 2f mov r25, r22
62a: e6 2f mov r30, r22
62c: f7 2f mov r31, r23
#endif
for (i=0; i<datasize; i++)
if (UEINTX & _BV(RWAL)) UEDATX = buffer[i];
62e: a8 ee ldi r26, 0xE8 ; 232
630: b0 e0 ldi r27, 0x00 ; 0
632: c1 ef ldi r28, 0xF1 ; 241
634: d0 e0 ldi r29, 0x00 ; 0
636: 8c 91 ld r24, X
638: 85 ff sbrs r24, 5
63a: 02 c0 rjmp .+4 ; 0x640 <usb_txdata+0x36>
63c: 80 81 ld r24, Z
63e: 88 83 st Y, r24
640: 31 96 adiw r30, 0x01 ; 1
#ifdef MEGA4_6
if ((((uint16_t)(UEBCHX)<<8)+UEBCLX)==0) { // buffer is empty
#else
if (UEBCLX==0) { // buffer is empty
#endif
for (i=0; i<datasize; i++)
642: 8e 2f mov r24, r30
644: 89 1b sub r24, r25
646: 84 17 cp r24, r20
648: b0 f3 brcs .-20 ; 0x636 <usb_txdata+0x2c>
if (UEINTX & _BV(RWAL)) UEDATX = buffer[i];
UEINTX&=~_BV(TXINI); // necessary (in this order) (changed V1.1.1)
64a: e8 ee ldi r30, 0xE8 ; 232
64c: f0 e0 ldi r31, 0x00 ; 0
64e: 80 81 ld r24, Z
650: 8e 7f andi r24, 0xFE ; 254
652: 80 83 st Z, r24
UEINTX=0x7F; // (uint8_t)~_BV(FIFOCON);
654: 8f e7 ldi r24, 0x7F ; 127
656: 80 83 st Z, r24
return true;
658: 81 e0 ldi r24, 0x01 ; 1
65a: 03 c0 rjmp .+6 ; 0x662 <usb_txdata+0x58>
}
}
return false;
65c: 80 e0 ldi r24, 0x00 ; 0
65e: 01 c0 rjmp .+2 ; 0x662 <usb_txdata+0x58>
660: 80 e0 ldi r24, 0x00 ; 0
}
662: df 91 pop r29
664: cf 91 pop r28
666: 08 95 ret
00000668 <__vector_11>:
// USB Device Interrupt
//-----------------------------------------------------------------------------
// Hardware interrupts of the USB controller
ISR(USB_GEN_vect)
{
668: 1f 92 push r1
66a: 0f 92 push r0
66c: 0f b6 in r0, 0x3f ; 63
66e: 0f 92 push r0
670: 11 24 eor r1, r1
672: 8f 93 push r24
674: ef 93 push r30
676: ff 93 push r31
uint8_t intbits;
intbits = UDINT; // save flags
678: e1 ee ldi r30, 0xE1 ; 225
67a: f0 e0 ldi r31, 0x00 ; 0
67c: 80 81 ld r24, Z
UDINT = 0; // reset flags
67e: 10 82 st Z, r1
if (intbits & _BV(EORSTI)) { // End Of Reset Interrupt Flag
680: 83 ff sbrs r24, 3
682: 12 c0 rjmp .+36 ; 0x6a8 <__vector_11+0x40>
// initialize endpoint 0 for control transfers
UENUM = 0;
684: 10 92 e9 00 sts 0x00E9, r1
UECONX = _BV(EPEN);
688: 81 e0 ldi r24, 0x01 ; 1
68a: 80 93 eb 00 sts 0x00EB, r24
UECFG0X = EP_TYPE_CONTROL;
68e: 10 92 ec 00 sts 0x00EC, r1
UECFG1X = EP_SIZE(ENDPOINT0_SIZE) | EP_SINGLE_BUFFER;
692: 82 e1 ldi r24, 0x12 ; 18
694: 80 93 ed 00 sts 0x00ED, r24
UEIENX = _BV(RXSTPE); // enable interrupt for incoming data
698: 88 e0 ldi r24, 0x08 ; 8
69a: 80 93 f0 00 sts 0x00F0, r24
usb_conf = 0;
69e: 10 92 3e 01 sts 0x013E, r1
#if (NUMINTERFACES>1)
usb_if = 0xFF;
6a2: 8f ef ldi r24, 0xFF ; 255
6a4: 80 93 0e 01 sts 0x010E, r24
#endif
}
}
6a8: ff 91 pop r31
6aa: ef 91 pop r30
6ac: 8f 91 pop r24
6ae: 0f 90 pop r0
6b0: 0f be out 0x3f, r0 ; 63
6b2: 0f 90 pop r0
6b4: 1f 90 pop r1
6b6: 18 95 reti
000006b8 <__vector_12>:
// Endpoint Interrupts
//-----------------------------------------------------------------------------
// Interrupts, triggered by incoming data in an endpoint, are handled here.
ISR(USB_COM_vect)
{
6b8: 1f 92 push r1
6ba: 0f 92 push r0
6bc: 0f b6 in r0, 0x3f ; 63
6be: 0f 92 push r0
6c0: 11 24 eor r1, r1
6c2: 3f 92 push r3
6c4: 4f 92 push r4
6c6: 5f 92 push r5
6c8: 6f 92 push r6
6ca: 7f 92 push r7
6cc: 8f 92 push r8
6ce: 9f 92 push r9
6d0: af 92 push r10
6d2: bf 92 push r11
6d4: cf 92 push r12
6d6: df 92 push r13
6d8: ef 92 push r14
6da: ff 92 push r15
6dc: 0f 93 push r16
6de: 1f 93 push r17
6e0: 2f 93 push r18
6e2: 3f 93 push r19
6e4: 4f 93 push r20
6e6: 5f 93 push r21
6e8: 6f 93 push r22
6ea: 7f 93 push r23
6ec: 8f 93 push r24
6ee: 9f 93 push r25
6f0: af 93 push r26
6f2: bf 93 push r27
6f4: ef 93 push r30
6f6: ff 93 push r31
6f8: cf 93 push r28
6fa: df 93 push r29
6fc: cd b7 in r28, 0x3d ; 61
6fe: de b7 in r29, 0x3e ; 62
700: 2a 97 sbiw r28, 0x0a ; 10
702: de bf out 0x3e, r29 ; 62
704: cd bf out 0x3d, r28 ; 61
#if (USESN==2) // serial number in RAM
struct usb_string_descriptor_ram buf;
#endif
struct usb_control_request ucr;
if (UEINT & 0x01) {
706: 80 91 f4 00 lds r24, 0x00F4
70a: 80 ff sbrs r24, 0
70c: 4c c2 rjmp .+1176 ; 0xba6 <__vector_12+0x4ee>
// handle interrupts of endpoint 0 (control transfers)
UENUM = 0;
70e: 10 92 e9 00 sts 0x00E9, r1
intbits = UEINTX; // save interrupt flags of the endpoint
712: 80 91 e8 00 lds r24, 0x00E8
if (intbits & _BV(RXSTPI)) { // control transfer, setup
716: 83 ff sbrs r24, 3
718: 13 c2 rjmp .+1062 ; 0xb40 <__vector_12+0x488>
ucr.bmRequestType = UEDATX;
71a: e1 ef ldi r30, 0xF1 ; 241
71c: f0 e0 ldi r31, 0x00 ; 0
71e: 80 81 ld r24, Z
720: 89 83 std Y+1, r24 ; 0x01
ucr.bRequest = UEDATX;
722: 80 81 ld r24, Z
724: 8a 83 std Y+2, r24 ; 0x02
ucr.wValue = UEDATX;
726: 20 81 ld r18, Z
728: 30 e0 ldi r19, 0x00 ; 0
72a: 3c 83 std Y+4, r19 ; 0x04
72c: 2b 83 std Y+3, r18 ; 0x03
ucr.wValue |= (UEDATX << 8);
72e: 40 81 ld r20, Z
730: 94 2f mov r25, r20
732: 80 e0 ldi r24, 0x00 ; 0
734: 82 2b or r24, r18
736: 93 2b or r25, r19
738: 9c 83 std Y+4, r25 ; 0x04
73a: 8b 83 std Y+3, r24 ; 0x03
ucr.wIndex = UEDATX;
73c: 20 81 ld r18, Z
73e: 30 e0 ldi r19, 0x00 ; 0
740: 3e 83 std Y+6, r19 ; 0x06
742: 2d 83 std Y+5, r18 ; 0x05
ucr.wIndex |= (UEDATX << 8);
744: 40 81 ld r20, Z
746: 94 2f mov r25, r20
748: 80 e0 ldi r24, 0x00 ; 0
74a: 82 2b or r24, r18
74c: 93 2b or r25, r19
74e: 9e 83 std Y+6, r25 ; 0x06
750: 8d 83 std Y+5, r24 ; 0x05
ucr.wLength = UEDATX;
752: 20 81 ld r18, Z
754: 30 e0 ldi r19, 0x00 ; 0
756: 38 87 std Y+8, r19 ; 0x08
758: 2f 83 std Y+7, r18 ; 0x07
ucr.wLength |= (UEDATX << 8);
75a: 40 81 ld r20, Z
75c: 94 2f mov r25, r20
75e: 80 e0 ldi r24, 0x00 ; 0
760: 82 2b or r24, r18
762: 93 2b or r25, r19
764: 98 87 std Y+8, r25 ; 0x08
766: 8f 83 std Y+7, r24 ; 0x07
UEINTX = ~(_BV(RXSTPI) | _BV(RXOUTI) | _BV(TXINI));
768: 82 ef ldi r24, 0xF2 ; 242
76a: 80 93 e8 00 sts 0x00E8, r24
if (ucr.bRequest == GET_DESCRIPTOR) {
76e: 8a 81 ldd r24, Y+2 ; 0x02
770: 86 30 cpi r24, 0x06 ; 6
772: 09 f0 breq .+2 ; 0x776 <__vector_12+0xbe>
774: 24 c1 rjmp .+584 ; 0x9be <__vector_12+0x306>
switch (ucr.wValue) {
776: 8b 81 ldd r24, Y+3 ; 0x03
778: 9c 81 ldd r25, Y+4 ; 0x04
77a: 81 15 cp r24, r1
77c: 23 e0 ldi r18, 0x03 ; 3
77e: 92 07 cpc r25, r18
780: 09 f4 brne .+2 ; 0x784 <__vector_12+0xcc>
782: fb c0 rjmp .+502 ; 0x97a <__vector_12+0x2c2>
784: 48 f4 brcc .+18 ; 0x798 <__vector_12+0xe0>
786: 81 15 cp r24, r1
788: 51 e0 ldi r21, 0x01 ; 1
78a: 95 07 cpc r25, r21
78c: 79 f0 breq .+30 ; 0x7ac <__vector_12+0xf4>
78e: 81 15 cp r24, r1
790: 92 40 sbci r25, 0x02 ; 2
792: 09 f0 breq .+2 ; 0x796 <__vector_12+0xde>
794: 10 c1 rjmp .+544 ; 0x9b6 <__vector_12+0x2fe>
796: 24 c0 rjmp .+72 ; 0x7e0 <__vector_12+0x128>
798: 81 30 cpi r24, 0x01 ; 1
79a: b3 e0 ldi r27, 0x03 ; 3
79c: 9b 07 cpc r25, r27
79e: 09 f4 brne .+2 ; 0x7a2 <__vector_12+0xea>
7a0: f6 c0 rjmp .+492 ; 0x98e <__vector_12+0x2d6>
7a2: 82 30 cpi r24, 0x02 ; 2
7a4: 93 40 sbci r25, 0x03 ; 3
7a6: 09 f0 breq .+2 ; 0x7aa <__vector_12+0xf2>
7a8: 06 c1 rjmp .+524 ; 0x9b6 <__vector_12+0x2fe>
7aa: fb c0 rjmp .+502 ; 0x9a2 <__vector_12+0x2ea>
case 0x0100: // device descriptor
usb_desc_out(false,&device_descriptor[0],pgm_read_byte(&device_descriptor[0]),ucr.wLength);
7ac: e4 e7 ldi r30, 0x74 ; 116
7ae: f0 e0 ldi r31, 0x00 ; 0
7b0: 44 91 lpm r20, Z
7b2: 2f 81 ldd r18, Y+7 ; 0x07
7b4: 38 85 ldd r19, Y+8 ; 0x08
7b6: bf 01 movw r22, r30
7b8: 80 e0 ldi r24, 0x00 ; 0
7ba: 0e 94 62 02 call 0x4c4 ; 0x4c4 <usb_desc_out>
break;
7be: 02 c2 rjmp .+1028 ; 0xbc4 <__vector_12+0x50c>
case 0x0200: // configuration descriptor
// get number of activated endpoints
n=0;
#if (NUMINTERFACES>1)
for (j=0; j<NUMINTERFACES; j++)
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[j][i].ep_type!=EP_TYPE_DISABLED);
7c0: 9a 2f mov r25, r26
7c2: 50 81 ld r21, Z
7c4: 5f 3f cpi r21, 0xFF ; 255
7c6: 09 f4 brne .+2 ; 0x7ca <__vector_12+0x112>
7c8: 9b 2f mov r25, r27
7ca: 49 0f add r20, r25
7cc: 81 50 subi r24, 0x01 ; 1
7ce: 33 96 adiw r30, 0x03 ; 3
7d0: 81 11 cpse r24, r1
7d2: f6 cf rjmp .-20 ; 0x7c0 <__vector_12+0x108>
7d4: 2f 5f subi r18, 0xFF ; 255
7d6: 3f 4f sbci r19, 0xFF ; 255
break;
case 0x0200: // configuration descriptor
// get number of activated endpoints
n=0;
#if (NUMINTERFACES>1)
for (j=0; j<NUMINTERFACES; j++)
7d8: 22 30 cpi r18, 0x02 ; 2
7da: 31 05 cpc r19, r1
7dc: 39 f4 brne .+14 ; 0x7ec <__vector_12+0x134>
7de: 10 c0 rjmp .+32 ; 0x800 <__vector_12+0x148>
ucr.wIndex |= (UEDATX << 8);
ucr.wLength = UEDATX;
ucr.wLength |= (UEDATX << 8);
UEINTX = ~(_BV(RXSTPI) | _BV(RXOUTI) | _BV(TXINI));
if (ucr.bRequest == GET_DESCRIPTOR) {
switch (ucr.wValue) {
7e0: 20 e0 ldi r18, 0x00 ; 0
7e2: 30 e0 ldi r19, 0x00 ; 0
7e4: 40 e0 ldi r20, 0x00 ; 0
//-----------------------------------------------------------------------------
// Endpoint Interrupts
//-----------------------------------------------------------------------------
// Interrupts, triggered by incoming data in an endpoint, are handled here.
ISR(USB_COM_vect)
7e6: 14 e0 ldi r17, 0x04 ; 4
case 0x0200: // configuration descriptor
// get number of activated endpoints
n=0;
#if (NUMINTERFACES>1)
for (j=0; j<NUMINTERFACES; j++)
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[j][i].ep_type!=EP_TYPE_DISABLED);
7e8: a1 e0 ldi r26, 0x01 ; 1
7ea: b0 e0 ldi r27, 0x00 ; 0
//-----------------------------------------------------------------------------
// Endpoint Interrupts
//-----------------------------------------------------------------------------
// Interrupts, triggered by incoming data in an endpoint, are handled here.
ISR(USB_COM_vect)
7ec: c9 01 movw r24, r18
7ee: 6c e0 ldi r22, 0x0C ; 12
7f0: 70 e0 ldi r23, 0x00 ; 0
7f2: 0e 94 0a 06 call 0xc14 ; 0xc14 <__mulhi3>
7f6: fc 01 movw r30, r24
7f8: eb 5d subi r30, 0xDB ; 219
7fa: fe 4f sbci r31, 0xFE ; 254
7fc: 81 2f mov r24, r17
7fe: e0 cf rjmp .-64 ; 0x7c0 <__vector_12+0x108>
for (j=0; j<NUMINTERFACES; j++)
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[j][i].ep_type!=EP_TYPE_DISABLED);
#else
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[i].ep_type!=EP_TYPE_DISABLED);
#endif
s = sizeof(cfg_desc)+NUMINTERFACES*sizeof(if_desc)+n*sizeof(ep_desc);
800: 84 2f mov r24, r20
802: 88 0f add r24, r24
804: 88 0f add r24, r24
806: 88 0f add r24, r24
808: 84 1b sub r24, r20
80a: 0f 2e mov r0, r31
80c: fb e1 ldi r31, 0x1B ; 27
80e: ef 2e mov r14, r31
810: f0 2d mov r31, r0
812: e8 0e add r14, r24
cfg = malloc(s); // allocate memory
814: 8e 2d mov r24, r14
816: 90 e0 ldi r25, 0x00 ; 0
818: 0e 94 1c 06 call 0xc38 ; 0xc38 <malloc>
81c: 08 2f mov r16, r24
81e: 19 2f mov r17, r25
// initialize configuration descriptor
cfg->bLength = sizeof(cfg_desc);
820: 89 e0 ldi r24, 0x09 ; 9
822: d8 01 movw r26, r16
824: 8c 93 st X, r24
cfg->bDescriptorType = 2;
826: 82 e0 ldi r24, 0x02 ; 2
828: 11 96 adiw r26, 0x01 ; 1
82a: 8c 93 st X, r24
82c: 11 97 sbiw r26, 0x01 ; 1
cfg->wTotalLength = s;
82e: 12 96 adiw r26, 0x02 ; 2
830: ec 92 st X, r14
832: 12 97 sbiw r26, 0x02 ; 2
834: 13 96 adiw r26, 0x03 ; 3
836: 1c 92 st X, r1
838: 13 97 sbiw r26, 0x03 ; 3
cfg->bNumInterfaces = NUMINTERFACES;
83a: 14 96 adiw r26, 0x04 ; 4
83c: 8c 93 st X, r24
83e: 14 97 sbiw r26, 0x04 ; 4
cfg->bConfigurationValue = 1;
840: 81 e0 ldi r24, 0x01 ; 1
842: 15 96 adiw r26, 0x05 ; 5
844: 8c 93 st X, r24
846: 15 97 sbiw r26, 0x05 ; 5
cfg->iConfiguration = 0;
848: 16 96 adiw r26, 0x06 ; 6
84a: 1c 92 st X, r1
84c: 16 97 sbiw r26, 0x06 ; 6
cfg->bmAttributes = POWERING;
84e: 80 ec ldi r24, 0xC0 ; 192
850: 17 96 adiw r26, 0x07 ; 7
852: 8c 93 st X, r24
854: 17 97 sbiw r26, 0x07 ; 7
cfg->bMaxPower = MAXPOWER>>1;
856: 8a ef ldi r24, 0xFA ; 250
858: 18 96 adiw r26, 0x08 ; 8
85a: 8c 93 st X, r24
// initialize interface descriptor
ifp = (if_desc *)((uint16_t)(cfg)+sizeof(cfg_desc));
85c: f8 01 movw r30, r16
85e: 39 96 adiw r30, 0x09 ; 9
860: 1a 86 std Y+10, r1 ; 0x0a
862: 19 86 std Y+9, r1 ; 0x09
//-----------------------------------------------------------------------------
// Endpoint Interrupts
//-----------------------------------------------------------------------------
// Interrupts, triggered by incoming data in an endpoint, are handled here.
ISR(USB_COM_vect)
864: 44 e0 ldi r20, 0x04 ; 4
866: a1 2c mov r10, r1
// initialize interface descriptor
ifp = (if_desc *)((uint16_t)(cfg)+sizeof(cfg_desc));
#if (NUMINTERFACES>1)
for (j=0; j<NUMINTERFACES; j++) {
n = 0;
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[j][i].ep_type!=EP_TYPE_DISABLED); // number of endpoints for one interface
868: 88 24 eor r8, r8
86a: 83 94 inc r8
86c: f8 2c mov r15, r8
86e: 9a 2c mov r9, r10
#else
j = 0;
#endif
ifp->bLength = sizeof(if_desc);
870: 0f 2e mov r0, r31
872: f9 e0 ldi r31, 0x09 ; 9
874: 7f 2e mov r7, r31
876: f0 2d mov r31, r0
ifp->bDescriptorType = 4;
ifp->bInterfaceNumber = j;
ifp->bAlternateSetting = 0;
ifp->bNumEndpoints = n;
ifp->bInterfaceClass = 0xFF;
878: dd 24 eor r13, r13
87a: da 94 dec r13
ifp->iInterface = 0;
epp = (ep_desc *)((uint16_t)(ifp)+sizeof(if_desc));
if (n) { // endpoints
for (i=0; i<MAX_ENDPOINT; i++) {
if (EPCO.ep_type!=EP_TYPE_DISABLED) {
epp->bLength = sizeof(ep_desc);
87c: 0f 2e mov r0, r31
87e: f7 e0 ldi r31, 0x07 ; 7
880: bf 2e mov r11, r31
882: f0 2d mov r31, r0
epp->bDescriptorType = 5;
884: 0f 2e mov r0, r31
886: f5 e0 ldi r31, 0x05 ; 5
888: cf 2e mov r12, r31
88a: f0 2d mov r31, r0
epp->bEndpointAddress = (i+1)|(EPCO.ep_type<<7);
epp->bmAttributes = EP_TRANSFER(EPCO.ep_type);
88c: 68 94 set
88e: 66 24 eor r6, r6
890: 61 f8 bld r6, 1
892: 0f 2e mov r0, r31
894: f3 e0 ldi r31, 0x03 ; 3
896: 5f 2e mov r5, r31
898: f0 2d mov r31, r0
89a: 56 c0 rjmp .+172 ; 0x948 <__vector_12+0x290>
// initialize interface descriptor
ifp = (if_desc *)((uint16_t)(cfg)+sizeof(cfg_desc));
#if (NUMINTERFACES>1)
for (j=0; j<NUMINTERFACES; j++) {
n = 0;
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[j][i].ep_type!=EP_TYPE_DISABLED); // number of endpoints for one interface
89c: 7f 2d mov r23, r15
89e: dc 01 movw r26, r24
8a0: 2c 91 ld r18, X
8a2: 2f 3f cpi r18, 0xFF ; 255
8a4: 09 f4 brne .+2 ; 0x8a8 <__vector_12+0x1f0>
8a6: 79 2d mov r23, r9
8a8: 67 0f add r22, r23
8aa: 51 50 subi r21, 0x01 ; 1
8ac: 03 96 adiw r24, 0x03 ; 3
8ae: 51 11 cpse r21, r1
8b0: f5 cf rjmp .-22 ; 0x89c <__vector_12+0x1e4>
#else
j = 0;
#endif
ifp->bLength = sizeof(if_desc);
8b2: 70 82 st Z, r7
ifp->bDescriptorType = 4;
8b4: 41 83 std Z+1, r20 ; 0x01
ifp->bInterfaceNumber = j;
8b6: 42 82 std Z+2, r4 ; 0x02
ifp->bAlternateSetting = 0;
8b8: 13 82 std Z+3, r1 ; 0x03
ifp->bNumEndpoints = n;
8ba: 64 83 std Z+4, r22 ; 0x04
ifp->bInterfaceClass = 0xFF;
8bc: d5 82 std Z+5, r13 ; 0x05
ifp->bInterfaceSubClass = 0x00;
8be: 16 82 std Z+6, r1 ; 0x06
ifp->bInterfaceProtocol = 0xFF;
8c0: d7 82 std Z+7, r13 ; 0x07
ifp->iInterface = 0;
8c2: 10 86 std Z+8, r1 ; 0x08
epp = (ep_desc *)((uint16_t)(ifp)+sizeof(if_desc));
8c4: 39 96 adiw r30, 0x09 ; 9
if (n) { // endpoints
8c6: 66 23 and r22, r22
8c8: c1 f1 breq .+112 ; 0x93a <__vector_12+0x282>
//-----------------------------------------------------------------------------
// Endpoint Interrupts
//-----------------------------------------------------------------------------
// Interrupts, triggered by incoming data in an endpoint, are handled here.
ISR(USB_COM_vect)
8ca: 83 2f mov r24, r19
8cc: 93 2d mov r25, r3
8ce: 6c e0 ldi r22, 0x0C ; 12
8d0: 70 e0 ldi r23, 0x00 ; 0
8d2: 0e 94 0a 06 call 0xc14 ; 0xc14 <__mulhi3>
8d6: 9c 01 movw r18, r24
8d8: 2a 5d subi r18, 0xDA ; 218
8da: 3e 4f sbci r19, 0xFE ; 254
8dc: 48 2c mov r4, r8
8de: c9 01 movw r24, r18
8e0: b9 01 movw r22, r18
8e2: 61 50 subi r22, 0x01 ; 1
8e4: 71 09 sbc r23, r1
ifp->bInterfaceProtocol = 0xFF;
ifp->iInterface = 0;
epp = (ep_desc *)((uint16_t)(ifp)+sizeof(if_desc));
if (n) { // endpoints
for (i=0; i<MAX_ENDPOINT; i++) {
if (EPCO.ep_type!=EP_TYPE_DISABLED) {
8e6: db 01 movw r26, r22
8e8: 5c 91 ld r21, X
8ea: 5f 3f cpi r21, 0xFF ; 255
8ec: 01 f1 breq .+64 ; 0x92e <__vector_12+0x276>
epp->bLength = sizeof(ep_desc);
8ee: b0 82 st Z, r11
epp->bDescriptorType = 5;
8f0: c1 82 std Z+1, r12 ; 0x01
epp->bEndpointAddress = (i+1)|(EPCO.ep_type<<7);
8f2: 65 2f mov r22, r21
8f4: 67 95 ror r22
8f6: 66 27 eor r22, r22
8f8: 67 95 ror r22
8fa: 64 29 or r22, r4
8fc: 62 83 std Z+2, r22 ; 0x02
epp->bmAttributes = EP_TRANSFER(EPCO.ep_type);
8fe: 51 34 cpi r21, 0x41 ; 65
900: 41 f0 breq .+16 ; 0x912 <__vector_12+0x25a>
902: 50 34 cpi r21, 0x40 ; 64
904: 41 f0 breq .+16 ; 0x916 <__vector_12+0x25e>
906: 51 38 cpi r21, 0x81 ; 129
908: 41 f0 breq .+16 ; 0x91a <__vector_12+0x262>
90a: 50 38 cpi r21, 0x80 ; 128
90c: 41 f4 brne .+16 ; 0x91e <__vector_12+0x266>
90e: 56 2d mov r21, r6
910: 07 c0 rjmp .+14 ; 0x920 <__vector_12+0x268>
912: 5f 2d mov r21, r15
914: 05 c0 rjmp .+10 ; 0x920 <__vector_12+0x268>
916: 5f 2d mov r21, r15
918: 03 c0 rjmp .+6 ; 0x920 <__vector_12+0x268>
91a: 56 2d mov r21, r6
91c: 01 c0 rjmp .+2 ; 0x920 <__vector_12+0x268>
91e: 55 2d mov r21, r5
920: 53 83 std Z+3, r21 ; 0x03
epp->wMaxPacketSize = EPCO.ep_size;
922: dc 01 movw r26, r24
924: 8c 91 ld r24, X
926: 84 83 std Z+4, r24 ; 0x04
928: 15 82 std Z+5, r1 ; 0x05
epp->bInterval = 0;
92a: 16 82 std Z+6, r1 ; 0x06
epp = (ep_desc *)((uint16_t)(epp)+sizeof(ep_desc));
92c: 37 96 adiw r30, 0x07 ; 7
92e: 43 94 inc r4
930: 2d 5f subi r18, 0xFD ; 253
932: 3f 4f sbci r19, 0xFF ; 255
ifp->bInterfaceSubClass = 0x00;
ifp->bInterfaceProtocol = 0xFF;
ifp->iInterface = 0;
epp = (ep_desc *)((uint16_t)(ifp)+sizeof(if_desc));
if (n) { // endpoints
for (i=0; i<MAX_ENDPOINT; i++) {
934: b5 e0 ldi r27, 0x05 ; 5
936: 4b 12 cpse r4, r27
938: d2 cf rjmp .-92 ; 0x8de <__vector_12+0x226>
93a: a9 85 ldd r26, Y+9 ; 0x09
93c: ba 85 ldd r27, Y+10 ; 0x0a
93e: 11 96 adiw r26, 0x01 ; 1
940: ba 87 std Y+10, r27 ; 0x0a
942: a9 87 std Y+9, r26 ; 0x09
cfg->bmAttributes = POWERING;
cfg->bMaxPower = MAXPOWER>>1;
// initialize interface descriptor
ifp = (if_desc *)((uint16_t)(cfg)+sizeof(cfg_desc));
#if (NUMINTERFACES>1)
for (j=0; j<NUMINTERFACES; j++) {
944: 12 97 sbiw r26, 0x02 ; 2
946: 71 f0 breq .+28 ; 0x964 <__vector_12+0x2ac>
948: 49 84 ldd r4, Y+9 ; 0x09
n = 0;
for (i=0; i<MAX_ENDPOINT; i++) n+=(EP_CONFIG[j][i].ep_type!=EP_TYPE_DISABLED); // number of endpoints for one interface
94a: 34 2d mov r19, r4
94c: 3a 84 ldd r3, Y+10 ; 0x0a
//-----------------------------------------------------------------------------
// Endpoint Interrupts
//-----------------------------------------------------------------------------
// Interrupts, triggered by incoming data in an endpoint, are handled here.
ISR(USB_COM_vect)
94e: 84 2d mov r24, r4
950: 93 2d mov r25, r3
952: 6c e0 ldi r22, 0x0C ; 12
954: 70 e0 ldi r23, 0x00 ; 0
956: 0e 94 0a 06 call 0xc14 ; 0xc14 <__mulhi3>
95a: 8b 5d subi r24, 0xDB ; 219
95c: 9e 4f sbci r25, 0xFE ; 254
95e: 54 2f mov r21, r20
960: 6a 2d mov r22, r10
962: 9c cf rjmp .-200 ; 0x89c <__vector_12+0x1e4>
#if (NUMINTERFACES>1)
ifp = (if_desc *)epp;
}
#endif
// finally
usb_desc_out(true,(uint8_t *)cfg,s,ucr.wLength);
964: 2f 81 ldd r18, Y+7 ; 0x07
966: 38 85 ldd r19, Y+8 ; 0x08
968: 4e 2d mov r20, r14
96a: b8 01 movw r22, r16
96c: 81 e0 ldi r24, 0x01 ; 1
96e: 0e 94 62 02 call 0x4c4 ; 0x4c4 <usb_desc_out>
free(cfg);
972: c8 01 movw r24, r16
974: 0e 94 b7 06 call 0xd6e ; 0xd6e <free>
break;
978: 25 c1 rjmp .+586 ; 0xbc4 <__vector_12+0x50c>
case 0x0300: // String 0
usb_desc_out(false,(uint8_t *)&string0.bLength,pgm_read_byte(&string0.bLength),ucr.wLength);
97a: e6 e8 ldi r30, 0x86 ; 134
97c: f0 e0 ldi r31, 0x00 ; 0
97e: 44 91 lpm r20, Z
980: 2f 81 ldd r18, Y+7 ; 0x07
982: 38 85 ldd r19, Y+8 ; 0x08
984: bf 01 movw r22, r30
986: 80 e0 ldi r24, 0x00 ; 0
988: 0e 94 62 02 call 0x4c4 ; 0x4c4 <usb_desc_out>
break;
98c: 1b c1 rjmp .+566 ; 0xbc4 <__vector_12+0x50c>
case 0x0301: // String 1
usb_desc_out(false,(uint8_t *)&string1.bLength,pgm_read_byte(&string1.bLength),ucr.wLength);
98e: ea e8 ldi r30, 0x8A ; 138
990: f0 e0 ldi r31, 0x00 ; 0
992: 44 91 lpm r20, Z
994: 2f 81 ldd r18, Y+7 ; 0x07
996: 38 85 ldd r19, Y+8 ; 0x08
998: bf 01 movw r22, r30
99a: 80 e0 ldi r24, 0x00 ; 0
99c: 0e 94 62 02 call 0x4c4 ; 0x4c4 <usb_desc_out>
break;
9a0: 11 c1 rjmp .+546 ; 0xbc4 <__vector_12+0x50c>
case 0x0302: // String 2
usb_desc_out(false,(uint8_t *)&string2.bLength,pgm_read_byte(&string2.bLength),ucr.wLength);
9a2: e0 ea ldi r30, 0xA0 ; 160
9a4: f0 e0 ldi r31, 0x00 ; 0
9a6: 44 91 lpm r20, Z
9a8: 2f 81 ldd r18, Y+7 ; 0x07
9aa: 38 85 ldd r19, Y+8 ; 0x08
9ac: bf 01 movw r22, r30
9ae: 80 e0 ldi r24, 0x00 ; 0
9b0: 0e 94 62 02 call 0x4c4 ; 0x4c4 <usb_desc_out>
break;
9b4: 07 c1 rjmp .+526 ; 0xbc4 <__vector_12+0x50c>
usb_desc_out(true,(uint8_t *)&buf,buf.bLength,ucr.wLength);
#endif
break;
#endif
default:
STALL; // stall
9b6: 81 e2 ldi r24, 0x21 ; 33
9b8: 80 93 eb 00 sts 0x00EB, r24
9bc: 03 c1 rjmp .+518 ; 0xbc4 <__vector_12+0x50c>
}
return;
}
if (ucr.bRequest == SET_ADDRESS) {
9be: 85 30 cpi r24, 0x05 ; 5
9c0: 71 f4 brne .+28 ; 0x9de <__vector_12+0x326>
USB_SEND_IN;
9c2: 8e ef ldi r24, 0xFE ; 254
9c4: 80 93 e8 00 sts 0x00E8, r24
#define STALL UECONX = _BV(STALLRQ) | _BV(EPEN)
static inline void usb_wait_in_ready(void)
{
while (!(UEINTX & _BV(TXINI)));
9c8: e8 ee ldi r30, 0xE8 ; 232
9ca: f0 e0 ldi r31, 0x00 ; 0
9cc: 80 81 ld r24, Z
9ce: 80 ff sbrs r24, 0
9d0: fd cf rjmp .-6 ; 0x9cc <__vector_12+0x314>
return;
}
if (ucr.bRequest == SET_ADDRESS) {
USB_SEND_IN;
usb_wait_in_ready();
UDADDR = ucr.wValue | _BV(ADDEN);
9d2: 8b 81 ldd r24, Y+3 ; 0x03
9d4: 9c 81 ldd r25, Y+4 ; 0x04
9d6: 80 68 ori r24, 0x80 ; 128
9d8: 80 93 e3 00 sts 0x00E3, r24
9dc: f3 c0 rjmp .+486 ; 0xbc4 <__vector_12+0x50c>
return;
}
if (ucr.bRequest == SET_CONFIGURATION && ucr.bmRequestType == 0) { // another configuration will be chosen
9de: 89 30 cpi r24, 0x09 ; 9
9e0: c1 f4 brne .+48 ; 0xa12 <__vector_12+0x35a>
9e2: 99 81 ldd r25, Y+1 ; 0x01
9e4: 91 11 cpse r25, r1
9e6: 60 c0 rjmp .+192 ; 0xaa8 <__vector_12+0x3f0>
if (ucr.wValue==1) { // configuration 1 will be chosen
9e8: 8b 81 ldd r24, Y+3 ; 0x03
9ea: 9c 81 ldd r25, Y+4 ; 0x04
9ec: 01 97 sbiw r24, 0x01 ; 1
9ee: 69 f4 brne .+26 ; 0xa0a <__vector_12+0x352>
usb_conf = ucr.wValue;
9f0: 81 e0 ldi r24, 0x01 ; 1
9f2: 80 93 3e 01 sts 0x013E, r24
USB_SEND_IN;
9f6: 8e ef ldi r24, 0xFE ; 254
9f8: 80 93 e8 00 sts 0x00E8, r24
#if (NUMINTERFACES==1)
usb_endpoints(); // initialize endpoints
#else
usb_if = 0; // select interface 0
9fc: 10 92 0e 01 sts 0x010E, r1
usb_endpoints(usb_if); // initialize endpoints
a00: 80 91 0e 01 lds r24, 0x010E
a04: 0e 94 d4 01 call 0x3a8 ; 0x3a8 <usb_endpoints>
a08: dd c0 rjmp .+442 ; 0xbc4 <__vector_12+0x50c>
#endif
} else { // other configurations are not supported in this version
STALL; // stall
a0a: 81 e2 ldi r24, 0x21 ; 33
a0c: 80 93 eb 00 sts 0x00EB, r24
a10: d9 c0 rjmp .+434 ; 0xbc4 <__vector_12+0x50c>
}
return;
}
if (ucr.bRequest == GET_CONFIGURATION && ucr.bmRequestType == 0x80) {
a12: 88 30 cpi r24, 0x08 ; 8
a14: 89 f4 brne .+34 ; 0xa38 <__vector_12+0x380>
a16: 99 81 ldd r25, Y+1 ; 0x01
a18: 90 38 cpi r25, 0x80 ; 128
a1a: 09 f0 breq .+2 ; 0xa1e <__vector_12+0x366>
a1c: 57 c0 rjmp .+174 ; 0xacc <__vector_12+0x414>
#define STALL UECONX = _BV(STALLRQ) | _BV(EPEN)
static inline void usb_wait_in_ready(void)
{
while (!(UEINTX & _BV(TXINI)));
a1e: e8 ee ldi r30, 0xE8 ; 232
a20: f0 e0 ldi r31, 0x00 ; 0
a22: 80 81 ld r24, Z
a24: 80 ff sbrs r24, 0
a26: fd cf rjmp .-6 ; 0xa22 <__vector_12+0x36a>
}
return;
}
if (ucr.bRequest == GET_CONFIGURATION && ucr.bmRequestType == 0x80) {
usb_wait_in_ready();
UEDATX = usb_conf;
a28: 80 91 3e 01 lds r24, 0x013E
a2c: 80 93 f1 00 sts 0x00F1, r24
USB_SEND_IN;
a30: 8e ef ldi r24, 0xFE ; 254
a32: 80 93 e8 00 sts 0x00E8, r24
a36: c6 c0 rjmp .+396 ; 0xbc4 <__vector_12+0x50c>
return;
}
if (ucr.bRequest == GET_STATUS) {
a38: 81 11 cpse r24, r1
a3a: 1c c0 rjmp .+56 ; 0xa74 <__vector_12+0x3bc>
#define STALL UECONX = _BV(STALLRQ) | _BV(EPEN)
static inline void usb_wait_in_ready(void)
{
while (!(UEINTX & _BV(TXINI)));
a3c: e8 ee ldi r30, 0xE8 ; 232
a3e: f0 e0 ldi r31, 0x00 ; 0
a40: 80 81 ld r24, Z
a42: 80 ff sbrs r24, 0
a44: fd cf rjmp .-6 ; 0xa40 <__vector_12+0x388>
}
if (ucr.bRequest == GET_STATUS) {
usb_wait_in_ready();
i = 0;
#ifdef SUPPORT_ENDPOINT_HALT
if (ucr.bmRequestType == 0x82) {
a46: 89 81 ldd r24, Y+1 ; 0x01
a48: 82 38 cpi r24, 0x82 ; 130
a4a: 59 f4 brne .+22 ; 0xa62 <__vector_12+0x3aa>
UENUM = ucr.wIndex;
a4c: 8d 81 ldd r24, Y+5 ; 0x05
a4e: e9 ee ldi r30, 0xE9 ; 233
a50: f0 e0 ldi r31, 0x00 ; 0
a52: 80 83 st Z, r24
if (UECONX & _BV(STALLRQ)) i = 1;
a54: 80 91 eb 00 lds r24, 0x00EB
a58: 85 fb bst r24, 5
a5a: 88 27 eor r24, r24
a5c: 80 f9 bld r24, 0
UENUM = 0;
a5e: 10 82 st Z, r1
a60: 01 c0 rjmp .+2 ; 0xa64 <__vector_12+0x3ac>
USB_SEND_IN;
return;
}
if (ucr.bRequest == GET_STATUS) {
usb_wait_in_ready();
i = 0;
a62: 80 e0 ldi r24, 0x00 ; 0
UENUM = ucr.wIndex;
if (UECONX & _BV(STALLRQ)) i = 1;
UENUM = 0;
}
#endif
UEDATX = i;
a64: e1 ef ldi r30, 0xF1 ; 241
a66: f0 e0 ldi r31, 0x00 ; 0
a68: 80 83 st Z, r24
UEDATX = 0;
a6a: 10 82 st Z, r1
USB_SEND_IN;
a6c: 8e ef ldi r24, 0xFE ; 254
a6e: 80 93 e8 00 sts 0x00E8, r24
a72: a8 c0 rjmp .+336 ; 0xbc4 <__vector_12+0x50c>
return;
}
#if (NUMINTERFACES>1)
if (ucr.bRequest == SET_INTERFACE && (ucr.bmRequestType == 0x20 || ucr.bmRequestType == 0)) { // another interface will be chosen
a74: 8b 30 cpi r24, 0x0B ; 11
a76: c1 f4 brne .+48 ; 0xaa8 <__vector_12+0x3f0>
a78: 89 81 ldd r24, Y+1 ; 0x01
a7a: 80 32 cpi r24, 0x20 ; 32
a7c: 11 f0 breq .+4 ; 0xa82 <__vector_12+0x3ca>
a7e: 81 11 cpse r24, r1
a80: 55 c0 rjmp .+170 ; 0xb2c <__vector_12+0x474>
if (ucr.wIndex<NUMINTERFACES) { // defined interface will be chosen
a82: 8d 81 ldd r24, Y+5 ; 0x05
a84: 9e 81 ldd r25, Y+6 ; 0x06
a86: 82 30 cpi r24, 0x02 ; 2
a88: 91 05 cpc r25, r1
a8a: 50 f4 brcc .+20 ; 0xaa0 <__vector_12+0x3e8>
usb_if = ucr.wIndex;
a8c: 80 93 0e 01 sts 0x010E, r24
USB_SEND_IN;
a90: 8e ef ldi r24, 0xFE ; 254
a92: 80 93 e8 00 sts 0x00E8, r24
usb_endpoints(usb_if); // initialize endpoints
a96: 80 91 0e 01 lds r24, 0x010E
a9a: 0e 94 d4 01 call 0x3a8 ; 0x3a8 <usb_endpoints>
a9e: 92 c0 rjmp .+292 ; 0xbc4 <__vector_12+0x50c>
} else { // other configurations are not supported in this version
STALL; // stall
aa0: 81 e2 ldi r24, 0x21 ; 33
aa2: 80 93 eb 00 sts 0x00EB, r24
aa6: 8e c0 rjmp .+284 ; 0xbc4 <__vector_12+0x50c>
}
return;
}
if (ucr.bRequest == GET_INTERFACE && ucr.bmRequestType == 0x80) {
aa8: 8a 30 cpi r24, 0x0A ; 10
aaa: 81 f4 brne .+32 ; 0xacc <__vector_12+0x414>
aac: 89 81 ldd r24, Y+1 ; 0x01
aae: 80 38 cpi r24, 0x80 ; 128
ab0: e9 f5 brne .+122 ; 0xb2c <__vector_12+0x474>
#define STALL UECONX = _BV(STALLRQ) | _BV(EPEN)
static inline void usb_wait_in_ready(void)
{
while (!(UEINTX & _BV(TXINI)));
ab2: e8 ee ldi r30, 0xE8 ; 232
ab4: f0 e0 ldi r31, 0x00 ; 0
ab6: 80 81 ld r24, Z
ab8: 80 ff sbrs r24, 0
aba: fd cf rjmp .-6 ; 0xab6 <__vector_12+0x3fe>
}
return;
}
if (ucr.bRequest == GET_INTERFACE && ucr.bmRequestType == 0x80) {
usb_wait_in_ready();
UEDATX = usb_if;
abc: 80 91 0e 01 lds r24, 0x010E
ac0: 80 93 f1 00 sts 0x00F1, r24
USB_SEND_IN;
ac4: 8e ef ldi r24, 0xFE ; 254
ac6: 80 93 e8 00 sts 0x00E8, r24
aca: 7c c0 rjmp .+248 ; 0xbc4 <__vector_12+0x50c>
return;
}
#endif
#ifdef SUPPORT_ENDPOINT_HALT
if ((ucr.bRequest == CLEAR_FEATURE || ucr.bRequest == SET_FEATURE)
acc: 81 30 cpi r24, 0x01 ; 1
ace: 11 f0 breq .+4 ; 0xad4 <__vector_12+0x41c>
ad0: 83 30 cpi r24, 0x03 ; 3
ad2: 61 f5 brne .+88 ; 0xb2c <__vector_12+0x474>
&& ucr.bmRequestType == 0x02 && ucr.wValue == 0) {
ad4: 89 81 ldd r24, Y+1 ; 0x01
ad6: 82 30 cpi r24, 0x02 ; 2
ad8: 49 f5 brne .+82 ; 0xb2c <__vector_12+0x474>
ada: 8b 81 ldd r24, Y+3 ; 0x03
adc: 9c 81 ldd r25, Y+4 ; 0x04
ade: 89 2b or r24, r25
ae0: 29 f5 brne .+74 ; 0xb2c <__vector_12+0x474>
i = ucr.wIndex & 0x7F;
ae2: 8d 81 ldd r24, Y+5 ; 0x05
ae4: 9e 81 ldd r25, Y+6 ; 0x06
ae6: 8f 77 andi r24, 0x7F ; 127
ae8: 99 27 eor r25, r25
if (i >= 1 && i <= MAX_ENDPOINT) {
aea: 38 2f mov r19, r24
aec: 31 50 subi r19, 0x01 ; 1
aee: 34 30 cpi r19, 0x04 ; 4
af0: e8 f4 brcc .+58 ; 0xb2c <__vector_12+0x474>
USB_SEND_IN;
af2: 3e ef ldi r19, 0xFE ; 254
af4: 30 93 e8 00 sts 0x00E8, r19
UENUM = i;
af8: 80 93 e9 00 sts 0x00E9, r24
if (ucr.bRequest == SET_FEATURE) {
afc: 2a 81 ldd r18, Y+2 ; 0x02
afe: 23 30 cpi r18, 0x03 ; 3
b00: 21 f4 brne .+8 ; 0xb0a <__vector_12+0x452>
UECONX = _BV(STALLRQ)|_BV(EPEN);
b02: 81 e2 ldi r24, 0x21 ; 33
b04: 80 93 eb 00 sts 0x00EB, r24
b08: 5d c0 rjmp .+186 ; 0xbc4 <__vector_12+0x50c>
} else {
UECONX = _BV(STALLRQC)|_BV(RSTDT)|_BV(EPEN);
b0a: 99 e1 ldi r25, 0x19 ; 25
b0c: 90 93 eb 00 sts 0x00EB, r25
UERST = _BV(i);
b10: 21 e0 ldi r18, 0x01 ; 1
b12: 30 e0 ldi r19, 0x00 ; 0
b14: f9 01 movw r30, r18
b16: 02 c0 rjmp .+4 ; 0xb1c <__vector_12+0x464>
b18: ee 0f add r30, r30
b1a: ff 1f adc r31, r31
b1c: 8a 95 dec r24
b1e: e2 f7 brpl .-8 ; 0xb18 <__vector_12+0x460>
b20: cf 01 movw r24, r30
b22: ea ee ldi r30, 0xEA ; 234
b24: f0 e0 ldi r31, 0x00 ; 0
b26: 80 83 st Z, r24
UERST = 0;
b28: 10 82 st Z, r1
b2a: 4c c0 rjmp .+152 ; 0xbc4 <__vector_12+0x50c>
}
}
#endif
#ifdef USERDEFCONTROLS
// handle user defined control requests
if (!usb_controlrequest(&ucr))
b2c: ce 01 movw r24, r28
b2e: 01 96 adiw r24, 0x01 ; 1
b30: 0e 94 60 01 call 0x2c0 ; 0x2c0 <usb_controlrequest>
b34: 81 11 cpse r24, r1
b36: 46 c0 rjmp .+140 ; 0xbc4 <__vector_12+0x50c>
UECONX = _BV(STALLRQ) | _BV(EPEN); // stall
b38: 81 e2 ldi r24, 0x21 ; 33
b3a: 80 93 eb 00 sts 0x00EB, r24
b3e: 42 c0 rjmp .+132 ; 0xbc4 <__vector_12+0x50c>
return;
#endif
}
UECONX = _BV(STALLRQ) | _BV(EPEN); // stall
b40: 81 e2 ldi r24, 0x21 ; 33
b42: 80 93 eb 00 sts 0x00EB, r24
b46: 2f c0 rjmp .+94 ; 0xba6 <__vector_12+0x4ee>
b48: f2 2e mov r15, r18
}
// handle interrupts for further endpoints
for (i=1; i<=MAX_ENDPOINT; i++) {
if (UEINT & _BV(i)) {
b4a: 40 81 ld r20, Z
b4c: 50 e0 ldi r21, 0x00 ; 0
b4e: 02 2e mov r0, r18
b50: 02 c0 rjmp .+4 ; 0xb56 <__vector_12+0x49e>
b52: 55 95 asr r21
b54: 47 95 ror r20
b56: 0a 94 dec r0
b58: e2 f7 brpl .-8 ; 0xb52 <__vector_12+0x49a>
b5a: 40 ff sbrs r20, 0
b5c: 1b c0 rjmp .+54 ; 0xb94 <__vector_12+0x4dc>
UENUM=i; // select endpoint
b5e: db 01 movw r26, r22
b60: 2c 93 st X, r18
intbits = UEINTX; // save interrupt bits of the endpoint
b62: d6 01 movw r26, r12
b64: 8c 91 ld r24, X
if (intbits & _BV(RXOUTI)) { // interrupt occured by incoming data
b66: 82 ff sbrs r24, 2
b68: 13 c0 rjmp .+38 ; 0xb90 <__vector_12+0x4d8>
#ifdef MEGA4_6
if (((uint16_t)(UEBCHX)<<8)+UEBCLX) { // data available in input endpoint
usb_ep(i,((uint16_t)(UEBCHX)<<8)+UEBCLX);
#else
if (UEBCLX) { // data available in input endpoint
b6a: 80 91 f2 00 lds r24, 0x00F2
b6e: 88 23 and r24, r24
b70: 41 f0 breq .+16 ; 0xb82 <__vector_12+0x4ca>
usb_ep(i,UEBCLX);
b72: 60 91 f2 00 lds r22, 0x00F2
b76: 70 e0 ldi r23, 0x00 ; 0
b78: 82 2f mov r24, r18
b7a: 0e 94 91 01 call 0x322 ; 0x322 <usb_ep>
#endif
UENUM=i; // reselect endpoint (if changed by handling routine)
b7e: f0 92 e9 00 sts 0x00E9, r15
}
UEINTX = ~(_BV(RXOUTI)|_BV(STALLEDI)); // clear interrupt flags
b82: e8 ee ldi r30, 0xE8 ; 232
b84: f0 e0 ldi r31, 0x00 ; 0
b86: 89 ef ldi r24, 0xF9 ; 249
b88: 80 83 st Z, r24
UEINTX = 0x7F; // free bank (FIFOCON), has to be executed after RXOUTI!
b8a: 8f e7 ldi r24, 0x7F ; 127
b8c: 80 83 st Z, r24
b8e: 1a c0 rjmp .+52 ; 0xbc4 <__vector_12+0x50c>
return;
}
STALL; // stall
b90: d8 01 movw r26, r16
b92: 9c 93 st X, r25
b94: 2f 5f subi r18, 0xFF ; 255
b96: 3f 4f sbci r19, 0xFF ; 255
}
UECONX = _BV(STALLRQ) | _BV(EPEN); // stall
}
// handle interrupts for further endpoints
for (i=1; i<=MAX_ENDPOINT; i++) {
b98: 25 30 cpi r18, 0x05 ; 5
b9a: 31 05 cpc r19, r1
b9c: a9 f6 brne .-86 ; 0xb48 <__vector_12+0x490>
return;
}
STALL; // stall
}
}
STALL; // stall
b9e: 81 e2 ldi r24, 0x21 ; 33
ba0: 80 93 eb 00 sts 0x00EB, r24
ba4: 0f c0 rjmp .+30 ; 0xbc4 <__vector_12+0x50c>
USB_SEND_IN;
return;
}
if (ucr.bRequest == GET_STATUS) {
usb_wait_in_ready();
i = 0;
ba6: 21 e0 ldi r18, 0x01 ; 1
ba8: 30 e0 ldi r19, 0x00 ; 0
UECONX = _BV(STALLRQ) | _BV(EPEN); // stall
}
// handle interrupts for further endpoints
for (i=1; i<=MAX_ENDPOINT; i++) {
if (UEINT & _BV(i)) {
baa: e4 ef ldi r30, 0xF4 ; 244
bac: f0 e0 ldi r31, 0x00 ; 0
UENUM=i; // select endpoint
bae: 69 ee ldi r22, 0xE9 ; 233
bb0: 70 e0 ldi r23, 0x00 ; 0
intbits = UEINTX; // save interrupt bits of the endpoint
bb2: 0f 2e mov r0, r31
bb4: f8 ee ldi r31, 0xE8 ; 232
bb6: cf 2e mov r12, r31
bb8: d1 2c mov r13, r1
bba: f0 2d mov r31, r0
}
UEINTX = ~(_BV(RXOUTI)|_BV(STALLEDI)); // clear interrupt flags
UEINTX = 0x7F; // free bank (FIFOCON), has to be executed after RXOUTI!
return;
}
STALL; // stall
bbc: 0b ee ldi r16, 0xEB ; 235
bbe: 10 e0 ldi r17, 0x00 ; 0
bc0: 91 e2 ldi r25, 0x21 ; 33
bc2: c2 cf rjmp .-124 ; 0xb48 <__vector_12+0x490>
}
}
STALL; // stall
}
bc4: 2a 96 adiw r28, 0x0a ; 10
bc6: 0f b6 in r0, 0x3f ; 63
bc8: f8 94 cli
bca: de bf out 0x3e, r29 ; 62
bcc: 0f be out 0x3f, r0 ; 63
bce: cd bf out 0x3d, r28 ; 61
bd0: df 91 pop r29
bd2: cf 91 pop r28
bd4: ff 91 pop r31
bd6: ef 91 pop r30
bd8: bf 91 pop r27
bda: af 91 pop r26
bdc: 9f 91 pop r25
bde: 8f 91 pop r24
be0: 7f 91 pop r23
be2: 6f 91 pop r22
be4: 5f 91 pop r21
be6: 4f 91 pop r20
be8: 3f 91 pop r19
bea: 2f 91 pop r18
bec: 1f 91 pop r17
bee: 0f 91 pop r16
bf0: ff 90 pop r15
bf2: ef 90 pop r14
bf4: df 90 pop r13
bf6: cf 90 pop r12
bf8: bf 90 pop r11
bfa: af 90 pop r10
bfc: 9f 90 pop r9
bfe: 8f 90 pop r8
c00: 7f 90 pop r7
c02: 6f 90 pop r6
c04: 5f 90 pop r5
c06: 4f 90 pop r4
c08: 3f 90 pop r3
c0a: 0f 90 pop r0
c0c: 0f be out 0x3f, r0 ; 63
c0e: 0f 90 pop r0
c10: 1f 90 pop r1
c12: 18 95 reti
00000c14 <__mulhi3>:
c14: 55 27 eor r21, r21
c16: 00 24 eor r0, r0
00000c18 <__mulhi3_loop>:
c18: 80 ff sbrs r24, 0
c1a: 02 c0 rjmp .+4 ; 0xc20 <__mulhi3_skip1>
c1c: 06 0e add r0, r22
c1e: 57 1f adc r21, r23
00000c20 <__mulhi3_skip1>:
c20: 66 0f add r22, r22
c22: 77 1f adc r23, r23
c24: 61 15 cp r22, r1
c26: 71 05 cpc r23, r1
c28: 21 f0 breq .+8 ; 0xc32 <__mulhi3_exit>
c2a: 96 95 lsr r25
c2c: 87 95 ror r24
c2e: 00 97 sbiw r24, 0x00 ; 0
c30: 99 f7 brne .-26 ; 0xc18 <__mulhi3_loop>
00000c32 <__mulhi3_exit>:
c32: 95 2f mov r25, r21
c34: 80 2d mov r24, r0
c36: 08 95 ret
00000c38 <malloc>:
c38: 0f 93 push r16
c3a: 1f 93 push r17
c3c: cf 93 push r28
c3e: df 93 push r29
c40: 82 30 cpi r24, 0x02 ; 2
c42: 91 05 cpc r25, r1
c44: 10 f4 brcc .+4 ; 0xc4a <malloc+0x12>
c46: 82 e0 ldi r24, 0x02 ; 2
c48: 90 e0 ldi r25, 0x00 ; 0
c4a: e0 91 42 01 lds r30, 0x0142
c4e: f0 91 43 01 lds r31, 0x0143
c52: 20 e0 ldi r18, 0x00 ; 0
c54: 30 e0 ldi r19, 0x00 ; 0
c56: c0 e0 ldi r28, 0x00 ; 0
c58: d0 e0 ldi r29, 0x00 ; 0
c5a: 23 c0 rjmp .+70 ; 0xca2 <malloc+0x6a>
c5c: 40 81 ld r20, Z
c5e: 51 81 ldd r21, Z+1 ; 0x01
c60: 48 17 cp r20, r24
c62: 59 07 cpc r21, r25
c64: a8 f0 brcs .+42 ; 0xc90 <malloc+0x58>
c66: 48 17 cp r20, r24
c68: 59 07 cpc r21, r25
c6a: 61 f4 brne .+24 ; 0xc84 <malloc+0x4c>
c6c: 82 81 ldd r24, Z+2 ; 0x02
c6e: 93 81 ldd r25, Z+3 ; 0x03
c70: 20 97 sbiw r28, 0x00 ; 0
c72: 19 f0 breq .+6 ; 0xc7a <malloc+0x42>
c74: 9b 83 std Y+3, r25 ; 0x03
c76: 8a 83 std Y+2, r24 ; 0x02
c78: 2e c0 rjmp .+92 ; 0xcd6 <malloc+0x9e>
c7a: 90 93 43 01 sts 0x0143, r25
c7e: 80 93 42 01 sts 0x0142, r24
c82: 29 c0 rjmp .+82 ; 0xcd6 <malloc+0x9e>
c84: 21 15 cp r18, r1
c86: 31 05 cpc r19, r1
c88: 29 f0 breq .+10 ; 0xc94 <malloc+0x5c>
c8a: 42 17 cp r20, r18
c8c: 53 07 cpc r21, r19
c8e: 10 f0 brcs .+4 ; 0xc94 <malloc+0x5c>
c90: a9 01 movw r20, r18
c92: 02 c0 rjmp .+4 ; 0xc98 <malloc+0x60>
c94: be 01 movw r22, r28
c96: df 01 movw r26, r30
c98: 02 81 ldd r16, Z+2 ; 0x02
c9a: 13 81 ldd r17, Z+3 ; 0x03
c9c: ef 01 movw r28, r30
c9e: 9a 01 movw r18, r20
ca0: f8 01 movw r30, r16
ca2: 30 97 sbiw r30, 0x00 ; 0
ca4: d9 f6 brne .-74 ; 0xc5c <malloc+0x24>
ca6: 21 15 cp r18, r1
ca8: 31 05 cpc r19, r1
caa: 09 f1 breq .+66 ; 0xcee <malloc+0xb6>
cac: 28 1b sub r18, r24
cae: 39 0b sbc r19, r25
cb0: 24 30 cpi r18, 0x04 ; 4
cb2: 31 05 cpc r19, r1
cb4: 90 f4 brcc .+36 ; 0xcda <malloc+0xa2>
cb6: 12 96 adiw r26, 0x02 ; 2
cb8: 8d 91 ld r24, X+
cba: 9c 91 ld r25, X
cbc: 13 97 sbiw r26, 0x03 ; 3
cbe: 61 15 cp r22, r1
cc0: 71 05 cpc r23, r1
cc2: 21 f0 breq .+8 ; 0xccc <malloc+0x94>
cc4: fb 01 movw r30, r22
cc6: 93 83 std Z+3, r25 ; 0x03
cc8: 82 83 std Z+2, r24 ; 0x02
cca: 04 c0 rjmp .+8 ; 0xcd4 <malloc+0x9c>
ccc: 90 93 43 01 sts 0x0143, r25
cd0: 80 93 42 01 sts 0x0142, r24
cd4: fd 01 movw r30, r26
cd6: 32 96 adiw r30, 0x02 ; 2
cd8: 44 c0 rjmp .+136 ; 0xd62 <malloc+0x12a>
cda: fd 01 movw r30, r26
cdc: e2 0f add r30, r18
cde: f3 1f adc r31, r19
ce0: 81 93 st Z+, r24
ce2: 91 93 st Z+, r25
ce4: 22 50 subi r18, 0x02 ; 2
ce6: 31 09 sbc r19, r1
ce8: 2d 93 st X+, r18
cea: 3c 93 st X, r19
cec: 3a c0 rjmp .+116 ; 0xd62 <malloc+0x12a>
cee: 20 91 40 01 lds r18, 0x0140
cf2: 30 91 41 01 lds r19, 0x0141
cf6: 23 2b or r18, r19
cf8: 41 f4 brne .+16 ; 0xd0a <malloc+0xd2>
cfa: 20 91 11 01 lds r18, 0x0111
cfe: 30 91 12 01 lds r19, 0x0112
d02: 30 93 41 01 sts 0x0141, r19
d06: 20 93 40 01 sts 0x0140, r18
d0a: 20 91 0f 01 lds r18, 0x010F
d0e: 30 91 10 01 lds r19, 0x0110
d12: 21 15 cp r18, r1
d14: 31 05 cpc r19, r1
d16: 41 f4 brne .+16 ; 0xd28 <malloc+0xf0>
d18: 2d b7 in r18, 0x3d ; 61
d1a: 3e b7 in r19, 0x3e ; 62
d1c: 40 91 13 01 lds r20, 0x0113
d20: 50 91 14 01 lds r21, 0x0114
d24: 24 1b sub r18, r20
d26: 35 0b sbc r19, r21
d28: e0 91 40 01 lds r30, 0x0140
d2c: f0 91 41 01 lds r31, 0x0141
d30: e2 17 cp r30, r18
d32: f3 07 cpc r31, r19
d34: a0 f4 brcc .+40 ; 0xd5e <malloc+0x126>
d36: 2e 1b sub r18, r30
d38: 3f 0b sbc r19, r31
d3a: 28 17 cp r18, r24
d3c: 39 07 cpc r19, r25
d3e: 78 f0 brcs .+30 ; 0xd5e <malloc+0x126>
d40: ac 01 movw r20, r24
d42: 4e 5f subi r20, 0xFE ; 254
d44: 5f 4f sbci r21, 0xFF ; 255
d46: 24 17 cp r18, r20
d48: 35 07 cpc r19, r21
d4a: 48 f0 brcs .+18 ; 0xd5e <malloc+0x126>
d4c: 4e 0f add r20, r30
d4e: 5f 1f adc r21, r31
d50: 50 93 41 01 sts 0x0141, r21
d54: 40 93 40 01 sts 0x0140, r20
d58: 81 93 st Z+, r24
d5a: 91 93 st Z+, r25
d5c: 02 c0 rjmp .+4 ; 0xd62 <malloc+0x12a>
d5e: e0 e0 ldi r30, 0x00 ; 0
d60: f0 e0 ldi r31, 0x00 ; 0
d62: cf 01 movw r24, r30
d64: df 91 pop r29
d66: cf 91 pop r28
d68: 1f 91 pop r17
d6a: 0f 91 pop r16
d6c: 08 95 ret
00000d6e <free>:
d6e: ef 92 push r14
d70: ff 92 push r15
d72: 0f 93 push r16
d74: 1f 93 push r17
d76: cf 93 push r28
d78: df 93 push r29
d7a: 00 97 sbiw r24, 0x00 ; 0
d7c: 09 f4 brne .+2 ; 0xd80 <free+0x12>
d7e: 8f c0 rjmp .+286 ; 0xe9e <free+0x130>
d80: dc 01 movw r26, r24
d82: 12 97 sbiw r26, 0x02 ; 2
d84: 13 96 adiw r26, 0x03 ; 3
d86: 1c 92 st X, r1
d88: 1e 92 st -X, r1
d8a: 12 97 sbiw r26, 0x02 ; 2
d8c: e0 90 42 01 lds r14, 0x0142
d90: f0 90 43 01 lds r15, 0x0143
d94: e1 14 cp r14, r1
d96: f1 04 cpc r15, r1
d98: 89 f4 brne .+34 ; 0xdbc <free+0x4e>
d9a: 2d 91 ld r18, X+
d9c: 3c 91 ld r19, X
d9e: 11 97 sbiw r26, 0x01 ; 1
da0: 28 0f add r18, r24
da2: 39 1f adc r19, r25
da4: 80 91 40 01 lds r24, 0x0140
da8: 90 91 41 01 lds r25, 0x0141
dac: 82 17 cp r24, r18
dae: 93 07 cpc r25, r19
db0: 89 f5 brne .+98 ; 0xe14 <free+0xa6>
db2: b0 93 41 01 sts 0x0141, r27
db6: a0 93 40 01 sts 0x0140, r26
dba: 71 c0 rjmp .+226 ; 0xe9e <free+0x130>
dbc: e7 01 movw r28, r14
dbe: 20 e0 ldi r18, 0x00 ; 0
dc0: 30 e0 ldi r19, 0x00 ; 0
dc2: 01 c0 rjmp .+2 ; 0xdc6 <free+0x58>
dc4: ea 01 movw r28, r20
dc6: ca 17 cp r28, r26
dc8: db 07 cpc r29, r27
dca: 38 f4 brcc .+14 ; 0xdda <free+0x6c>
dcc: 4a 81 ldd r20, Y+2 ; 0x02
dce: 5b 81 ldd r21, Y+3 ; 0x03
dd0: 9e 01 movw r18, r28
dd2: 41 15 cp r20, r1
dd4: 51 05 cpc r21, r1
dd6: b1 f7 brne .-20 ; 0xdc4 <free+0x56>
dd8: 22 c0 rjmp .+68 ; 0xe1e <free+0xb0>
dda: bc 01 movw r22, r24
ddc: 62 50 subi r22, 0x02 ; 2
dde: 71 09 sbc r23, r1
de0: fb 01 movw r30, r22
de2: d3 83 std Z+3, r29 ; 0x03
de4: c2 83 std Z+2, r28 ; 0x02
de6: 00 81 ld r16, Z
de8: 11 81 ldd r17, Z+1 ; 0x01
dea: ac 01 movw r20, r24
dec: 40 0f add r20, r16
dee: 51 1f adc r21, r17
df0: 4c 17 cp r20, r28
df2: 5d 07 cpc r21, r29
df4: 61 f4 brne .+24 ; 0xe0e <free+0xa0>
df6: 48 81 ld r20, Y
df8: 59 81 ldd r21, Y+1 ; 0x01
dfa: 40 0f add r20, r16
dfc: 51 1f adc r21, r17
dfe: 4e 5f subi r20, 0xFE ; 254
e00: 5f 4f sbci r21, 0xFF ; 255
e02: 51 83 std Z+1, r21 ; 0x01
e04: 40 83 st Z, r20
e06: 4a 81 ldd r20, Y+2 ; 0x02
e08: 5b 81 ldd r21, Y+3 ; 0x03
e0a: 53 83 std Z+3, r21 ; 0x03
e0c: 42 83 std Z+2, r20 ; 0x02
e0e: 21 15 cp r18, r1
e10: 31 05 cpc r19, r1
e12: 29 f4 brne .+10 ; 0xe1e <free+0xb0>
e14: b0 93 43 01 sts 0x0143, r27
e18: a0 93 42 01 sts 0x0142, r26
e1c: 40 c0 rjmp .+128 ; 0xe9e <free+0x130>
e1e: f9 01 movw r30, r18
e20: b3 83 std Z+3, r27 ; 0x03
e22: a2 83 std Z+2, r26 ; 0x02
e24: e9 01 movw r28, r18
e26: 69 91 ld r22, Y+
e28: 79 91 ld r23, Y+
e2a: c6 0f add r28, r22
e2c: d7 1f adc r29, r23
e2e: ac 17 cp r26, r28
e30: bd 07 cpc r27, r29
e32: 79 f4 brne .+30 ; 0xe52 <free+0xe4>
e34: dc 01 movw r26, r24
e36: 5e 91 ld r21, -X
e38: 4e 91 ld r20, -X
e3a: 46 0f add r20, r22
e3c: 57 1f adc r21, r23
e3e: 4e 5f subi r20, 0xFE ; 254
e40: 5f 4f sbci r21, 0xFF ; 255
e42: 51 83 std Z+1, r21 ; 0x01
e44: 40 83 st Z, r20
e46: 12 96 adiw r26, 0x02 ; 2
e48: 8d 91 ld r24, X+
e4a: 9c 91 ld r25, X
e4c: 13 97 sbiw r26, 0x03 ; 3
e4e: 93 83 std Z+3, r25 ; 0x03
e50: 82 83 std Z+2, r24 ; 0x02
e52: a0 e0 ldi r26, 0x00 ; 0
e54: b0 e0 ldi r27, 0x00 ; 0
e56: 02 c0 rjmp .+4 ; 0xe5c <free+0xee>
e58: d7 01 movw r26, r14
e5a: 7c 01 movw r14, r24
e5c: f7 01 movw r30, r14
e5e: 82 81 ldd r24, Z+2 ; 0x02
e60: 93 81 ldd r25, Z+3 ; 0x03
e62: 00 97 sbiw r24, 0x00 ; 0
e64: c9 f7 brne .-14 ; 0xe58 <free+0xea>
e66: c7 01 movw r24, r14
e68: 02 96 adiw r24, 0x02 ; 2
e6a: 20 81 ld r18, Z
e6c: 31 81 ldd r19, Z+1 ; 0x01
e6e: 82 0f add r24, r18
e70: 93 1f adc r25, r19
e72: 20 91 40 01 lds r18, 0x0140
e76: 30 91 41 01 lds r19, 0x0141
e7a: 28 17 cp r18, r24
e7c: 39 07 cpc r19, r25
e7e: 79 f4 brne .+30 ; 0xe9e <free+0x130>
e80: 10 97 sbiw r26, 0x00 ; 0
e82: 29 f4 brne .+10 ; 0xe8e <free+0x120>
e84: 10 92 43 01 sts 0x0143, r1
e88: 10 92 42 01 sts 0x0142, r1
e8c: 04 c0 rjmp .+8 ; 0xe96 <free+0x128>
e8e: 13 96 adiw r26, 0x03 ; 3
e90: 1c 92 st X, r1
e92: 1e 92 st -X, r1
e94: 12 97 sbiw r26, 0x02 ; 2
e96: f0 92 41 01 sts 0x0141, r15
e9a: e0 92 40 01 sts 0x0140, r14
e9e: cd b7 in r28, 0x3d ; 61
ea0: de b7 in r29, 0x3e ; 62
ea2: e6 e0 ldi r30, 0x06 ; 6
ea4: 0c 94 6a 07 jmp 0xed4 ; 0xed4 <__epilogue_restores__+0x18>
00000ea8 <strupr>:
ea8: dc 01 movw r26, r24
eaa: 6c 91 ld r22, X
eac: 61 56 subi r22, 0x61 ; 97
eae: 6a 31 cpi r22, 0x1A ; 26
eb0: 08 f0 brcs .+2 ; 0xeb4 <strupr+0xc>
eb2: 60 5e subi r22, 0xE0 ; 224
eb4: 6f 5b subi r22, 0xBF ; 191
eb6: 6d 93 st X+, r22
eb8: c1 f7 brne .-16 ; 0xeaa <strupr+0x2>
eba: 08 95 ret
00000ebc <__epilogue_restores__>:
ebc: 2a 88 ldd r2, Y+18 ; 0x12
ebe: 39 88 ldd r3, Y+17 ; 0x11
ec0: 48 88 ldd r4, Y+16 ; 0x10
ec2: 5f 84 ldd r5, Y+15 ; 0x0f
ec4: 6e 84 ldd r6, Y+14 ; 0x0e
ec6: 7d 84 ldd r7, Y+13 ; 0x0d
ec8: 8c 84 ldd r8, Y+12 ; 0x0c
eca: 9b 84 ldd r9, Y+11 ; 0x0b
ecc: aa 84 ldd r10, Y+10 ; 0x0a
ece: b9 84 ldd r11, Y+9 ; 0x09
ed0: c8 84 ldd r12, Y+8 ; 0x08
ed2: df 80 ldd r13, Y+7 ; 0x07
ed4: ee 80 ldd r14, Y+6 ; 0x06
ed6: fd 80 ldd r15, Y+5 ; 0x05
ed8: 0c 81 ldd r16, Y+4 ; 0x04
eda: 1b 81 ldd r17, Y+3 ; 0x03
edc: aa 81 ldd r26, Y+2 ; 0x02
ede: b9 81 ldd r27, Y+1 ; 0x01
ee0: ce 0f add r28, r30
ee2: d1 1d adc r29, r1
ee4: 0f b6 in r0, 0x3f ; 63
ee6: f8 94 cli
ee8: de bf out 0x3e, r29 ; 62
eea: 0f be out 0x3f, r0 ; 63
eec: cd bf out 0x3d, r28 ; 61
eee: ed 01 movw r28, r26
ef0: 08 95 ret
00000ef2 <_exit>:
ef2: f8 94 cli
00000ef4 <__stop_program>:
ef4: ff cf rjmp .-2 ; 0xef4 <__stop_program>