20121009-183413

This commit is contained in:
BlubbFish 2012-10-09 16:32:06 +00:00
parent b2313b891b
commit d75f9f0cda
7 changed files with 169 additions and 71 deletions

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@ -1 +1 @@
<AVRStudio><MANAGEMENT><ProjectName>Netzteil</ProjectName><Created>08-Oct-2012 17:21:17</Created><LastEdit>08-Oct-2012 17:21:20</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>08-Oct-2012 17:21:17</Created><Version>4</Version><Build>4, 19, 0, 730</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile></ObjectFile><EntryFile></EntryFile><SaveFolder>D:\Doc's\Basteleien\Netzteilswitcher\Netzteil\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>JTAGICE mkII</CURRENT_TARGET><CURRENT_PART>ATtiny24.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>Netzteil.c</SOURCEFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>attiny24</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>Netzteil.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS/><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -Os -std=gnu99 -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>E:\Programme\AVR Toolchain\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>E:\Programme\AVR Toolchain\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>Netzteil.c</FileName><Status>1</Status></File00000></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>
<AVRStudio><MANAGEMENT><ProjectName>Netzteil</ProjectName><Created>08-Oct-2012 17:21:17</Created><LastEdit>09-Oct-2012 00:09:24</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>08-Oct-2012 17:21:17</Created><Version>4</Version><Build>4, 19, 0, 730</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\Netzteil.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>D:\Doc's\Basteleien\Netzteilswitcher\Netzteil\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>JTAGICE mkII</CURRENT_TARGET><CURRENT_PART>ATtiny24.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>Netzteil.c</SOURCEFILE><OTHERFILE>default\Netzteil.lss</OTHERFILE><OTHERFILE>default\Netzteil.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>attiny24</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>Netzteil.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>0</ISDIRTY><OPTIONS/><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>E:\Programme\AVR Toolchain\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>E:\Programme\AVR Toolchain\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><IOView><usergroups/><sort sorted="0" column="0" ordername="0" orderaddress="0" ordergroup="0"/></IOView><Files><File00000><FileId>00000</FileId><FileName>Netzteil.c</FileName><Status>1</Status></File00000></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>

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@ -1,12 +1,48 @@
#include <avr/io.h>
#include <util/delay.h>
#define STP PB0
#define NET PB1
#define TWV PB2
int main(void) {
DDRA |= (1<<PA7);
DDRA |= (1<<PA7) | (1<<PA3) | (1<<PA4);
DDRB |= (1<<STP) | (1<<NET) | (1<<TWV);
PORTB |= (1<<NET); //Netzteil Off!
_delay_ms(500);
PORTA |= (1<<PA3);
_delay_ms(2000);
PORTB |= (1<<TWV); //12V Schiene On
PORTB |= (1<<STP); //Stepup On
PORTA &= ~(1<<PA3);
_delay_ms(2000);
PORTB &= ~(1<<NET); //Netzteil An!
PORTA |= (1<<PA3);
_delay_ms(5000);
//PORTB &= ~(1<<PB1);
PORTB &= ~(1<<STP); //Stepup Off!
PORTA &= ~(1<<PA3);
while(1) {
PORTA |= (1<<PA7);
/*PORTA |= (1<<PA7);
_delay_ms(500);
PORTA &= ~(1<<PA7);
PORTA &= ~((1<<PA7));
PORTA |= (1<<PA3);
_delay_ms(500);
PORTA &= ~((1<<PA3));
PORTA |= (1<<PA4);
_delay_ms(500);
PORTA &= ~((1<<PA4));*/
/*PORTA &= ~((1<<PA7));
if (PINB & (1<<PB1)) {
PORTA |= (1<<PA7);
}*/
_delay_ms(50);
}
}

Binary file not shown.

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@ -1,7 +1,12 @@
:1000000010C015C014C013C012C011C010C00FC062
:100010000EC00DC00CC00BC00AC009C008C007C08C
:1000200006C011241FBECFEDCDBF02D017C0E8CF50
:10003000D79ADF9A8FEF94E3ACE081509040A040D4
:10004000E1F700C00000DF988FEF94E3ACE081504F
:100050009040A040E1F700C00000EBCFF894FFCF44
:1000200006C011241FBECFEDCDBF02D03EC0E8CF29
:100030008AB388698ABB87B3876087BBC19A8FEF11
:1000400094E3ACE081509040A040E1F700C0000094
:10005000DB9A8FEF93EDA0E381509040A040E1F751
:1000600000C00000C29AC09ADB988FEF93EDA0E326
:1000700081509040A040E1F700C00000C198DB9A99
:100080008FEF91E1AAE781509040A040E1F700C0D6
:100090000000C098DB988FE798E3A1E08150904082
:0E00A000A040E1F700C00000F6CFF894FFCFBB
:00000001FF

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@ -3,27 +3,27 @@ Netzteil.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000060 00000000 00000000 00000054 2**1
0 .text 000000ae 00000000 00000000 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .stab 000006b4 00000000 00000000 000000b4 2**2
1 .stab 000006b4 00000000 00000000 00000104 2**2
CONTENTS, READONLY, DEBUGGING
2 .stabstr 00000085 00000000 00000000 00000768 2**0
2 .stabstr 00000085 00000000 00000000 000007b8 2**0
CONTENTS, READONLY, DEBUGGING
3 .debug_aranges 00000020 00000000 00000000 000007ed 2**0
3 .debug_aranges 00000020 00000000 00000000 0000083d 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_pubnames 0000001b 00000000 00000000 0000080d 2**0
4 .debug_pubnames 0000001b 00000000 00000000 0000085d 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_info 00000196 00000000 00000000 00000828 2**0
5 .debug_info 00000256 00000000 00000000 00000878 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_abbrev 00000106 00000000 00000000 000009be 2**0
6 .debug_abbrev 00000106 00000000 00000000 00000ace 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_line 0000014f 00000000 00000000 00000ac4 2**0
7 .debug_line 000001bc 00000000 00000000 00000bd4 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_frame 00000020 00000000 00000000 00000c14 2**2
8 .debug_frame 00000020 00000000 00000000 00000d90 2**2
CONTENTS, READONLY, DEBUGGING
9 .debug_str 000000f6 00000000 00000000 00000c34 2**0
9 .debug_str 000000f6 00000000 00000000 00000db0 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_pubtypes 00000038 00000000 00000000 00000d2a 2**0
10 .debug_pubtypes 00000038 00000000 00000000 00000ea6 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
@ -53,52 +53,108 @@ Disassembly of section .text:
26: cf ed ldi r28, 0xDF ; 223
28: cd bf out 0x3d, r28 ; 61
2a: 02 d0 rcall .+4 ; 0x30 <main>
2c: 17 c0 rjmp .+46 ; 0x5c <_exit>
2c: 3e c0 rjmp .+124 ; 0xaa <_exit>
0000002e <__bad_interrupt>:
2e: e8 cf rjmp .-48 ; 0x0 <__vectors>
00000030 <main>:
#include <avr/io.h>
#include <util/delay.h>
#define STP PB0
#define NET PB1
#define TWV PB2
int main(void) {
DDRA |= (1<<PA7);
30: d7 9a sbi 0x1a, 7 ; 26
while(1) {
PORTA |= (1<<PA7);
32: df 9a sbi 0x1b, 7 ; 27
DDRA |= (1<<PA7) | (1<<PA3) | (1<<PA4);
30: 8a b3 in r24, 0x1a ; 26
32: 88 69 ori r24, 0x98 ; 152
34: 8a bb out 0x1a, r24 ; 26
DDRB |= (1<<STP) | (1<<NET) | (1<<TWV);
36: 87 b3 in r24, 0x17 ; 23
38: 87 60 ori r24, 0x07 ; 7
3a: 87 bb out 0x17, r24 ; 23
PORTB |= (1<<NET); //Netzteil Off!
3c: c1 9a sbi 0x18, 1 ; 24
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
34: 8f ef ldi r24, 0xFF ; 255
36: 94 e3 ldi r25, 0x34 ; 52
38: ac e0 ldi r26, 0x0C ; 12
3a: 81 50 subi r24, 0x01 ; 1
3c: 90 40 sbci r25, 0x00 ; 0
3e: a0 40 sbci r26, 0x00 ; 0
40: e1 f7 brne .-8 ; 0x3a <__CCP__+0x6>
42: 00 c0 rjmp .+0 ; 0x44 <__SREG__+0x5>
44: 00 00 nop
_delay_ms(500);
PORTA &= ~(1<<PA7);
46: df 98 cbi 0x1b, 7 ; 27
48: 8f ef ldi r24, 0xFF ; 255
4a: 94 e3 ldi r25, 0x34 ; 52
4c: ac e0 ldi r26, 0x0C ; 12
4e: 81 50 subi r24, 0x01 ; 1
50: 90 40 sbci r25, 0x00 ; 0
52: a0 40 sbci r26, 0x00 ; 0
54: e1 f7 brne .-8 ; 0x4e <__SREG__+0xf>
56: 00 c0 rjmp .+0 ; 0x58 <__SREG__+0x19>
58: 00 00 nop
5a: eb cf rjmp .-42 ; 0x32 <main+0x2>
3e: 8f ef ldi r24, 0xFF ; 255
40: 94 e3 ldi r25, 0x34 ; 52
42: ac e0 ldi r26, 0x0C ; 12
44: 81 50 subi r24, 0x01 ; 1
46: 90 40 sbci r25, 0x00 ; 0
48: a0 40 sbci r26, 0x00 ; 0
4a: e1 f7 brne .-8 ; 0x44 <__SREG__+0x5>
4c: 00 c0 rjmp .+0 ; 0x4e <__SREG__+0xf>
4e: 00 00 nop
_delay_ms(500);
PORTA |= (1<<PA3);
50: db 9a sbi 0x1b, 3 ; 27
52: 8f ef ldi r24, 0xFF ; 255
54: 93 ed ldi r25, 0xD3 ; 211
56: a0 e3 ldi r26, 0x30 ; 48
58: 81 50 subi r24, 0x01 ; 1
5a: 90 40 sbci r25, 0x00 ; 0
5c: a0 40 sbci r26, 0x00 ; 0
5e: e1 f7 brne .-8 ; 0x58 <__SREG__+0x19>
60: 00 c0 rjmp .+0 ; 0x62 <__SREG__+0x23>
62: 00 00 nop
_delay_ms(2000);
PORTB |= (1<<TWV); //12V Schiene On
64: c2 9a sbi 0x18, 2 ; 24
PORTB |= (1<<STP); //Stepup On
66: c0 9a sbi 0x18, 0 ; 24
PORTA &= ~(1<<PA3);
68: db 98 cbi 0x1b, 3 ; 27
6a: 8f ef ldi r24, 0xFF ; 255
6c: 93 ed ldi r25, 0xD3 ; 211
6e: a0 e3 ldi r26, 0x30 ; 48
70: 81 50 subi r24, 0x01 ; 1
72: 90 40 sbci r25, 0x00 ; 0
74: a0 40 sbci r26, 0x00 ; 0
76: e1 f7 brne .-8 ; 0x70 <__SREG__+0x31>
78: 00 c0 rjmp .+0 ; 0x7a <__SREG__+0x3b>
7a: 00 00 nop
_delay_ms(2000);
PORTB &= ~(1<<NET); //Netzteil An!
7c: c1 98 cbi 0x18, 1 ; 24
PORTA |= (1<<PA3);
7e: db 9a sbi 0x1b, 3 ; 27
80: 8f ef ldi r24, 0xFF ; 255
82: 91 e1 ldi r25, 0x11 ; 17
84: aa e7 ldi r26, 0x7A ; 122
86: 81 50 subi r24, 0x01 ; 1
88: 90 40 sbci r25, 0x00 ; 0
8a: a0 40 sbci r26, 0x00 ; 0
8c: e1 f7 brne .-8 ; 0x86 <__SREG__+0x47>
8e: 00 c0 rjmp .+0 ; 0x90 <__SREG__+0x51>
90: 00 00 nop
_delay_ms(5000);
//PORTB &= ~(1<<PB1);
PORTB &= ~(1<<PB0); //Stepup Off!
92: c0 98 cbi 0x18, 0 ; 24
PORTA &= ~(1<<PA3);
94: db 98 cbi 0x1b, 3 ; 27
96: 8f e7 ldi r24, 0x7F ; 127
98: 98 e3 ldi r25, 0x38 ; 56
9a: a1 e0 ldi r26, 0x01 ; 1
9c: 81 50 subi r24, 0x01 ; 1
9e: 90 40 sbci r25, 0x00 ; 0
a0: a0 40 sbci r26, 0x00 ; 0
a2: e1 f7 brne .-8 ; 0x9c <__SREG__+0x5d>
a4: 00 c0 rjmp .+0 ; 0xa6 <__SREG__+0x67>
a6: 00 00 nop
a8: f6 cf rjmp .-20 ; 0x96 <__SREG__+0x57>
0000005c <_exit>:
5c: f8 94 cli
000000aa <_exit>:
aa: f8 94 cli
0000005e <__stop_program>:
5e: ff cf rjmp .-2 ; 0x5e <__stop_program>
000000ac <__stop_program>:
ac: ff cf rjmp .-2 ; 0xac <__stop_program>

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@ -112,7 +112,7 @@ LOAD e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a
.rela.plt
*(.rela.plt)
.text 0x00000000 0x60
.text 0x00000000 0xae
*(.vectors)
.vectors 0x00000000 0x22 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/../../../../avr/lib/avr25/crttn24.o
0x00000000 __vector_default
@ -181,17 +181,17 @@ LOAD e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a
0x0000002e __vector_14
0x0000002e __vector_10
0x0000002e __vector_16
.text 0x00000030 0x2c Netzteil.o
.text 0x00000030 0x7a Netzteil.o
0x00000030 main
.text 0x0000005c 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
0x0000005c . = ALIGN (0x2)
.text 0x000000aa 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
0x000000aa . = ALIGN (0x2)
*(.text.*)
.text.libgcc 0x0000005c 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
0x0000005c . = ALIGN (0x2)
.text.libgcc 0x000000aa 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
0x000000aa . = ALIGN (0x2)
*(.fini9)
.fini9 0x0000005c 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
0x0000005c _exit
0x0000005c exit
.fini9 0x000000aa 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
0x000000aa _exit
0x000000aa exit
*(.fini9)
*(.fini8)
*(.fini8)
@ -210,11 +210,11 @@ LOAD e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a
*(.fini1)
*(.fini1)
*(.fini0)
.fini0 0x0000005c 0x4 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
.fini0 0x000000aa 0x4 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a(_exit.o)
*(.fini0)
0x00000060 _etext = .
0x000000ae _etext = .
.data 0x00800060 0x0 load address 0x00000060
.data 0x00800060 0x0 load address 0x000000ae
0x00800060 PROVIDE (__data_start, .)
*(.data)
.data 0x00800060 0x0 e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/../../../../avr/lib/avr25/crttn24.o
@ -237,8 +237,8 @@ LOAD e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a
*(.bss*)
*(COMMON)
0x00800060 PROVIDE (__bss_end, .)
0x00000060 __data_load_start = LOADADDR (.data)
0x00000060 __data_load_end = (__data_load_start + SIZEOF (.data))
0x000000ae __data_load_start = LOADADDR (.data)
0x000000ae __data_load_end = (__data_load_start + SIZEOF (.data))
.noinit 0x00800060 0x0
0x00800060 PROVIDE (__noinit_start, .)
@ -309,18 +309,18 @@ LOAD e:/programme/avr toolchain/bin/../lib/gcc/avr/4.5.1/avr25\libgcc.a
.debug_pubnames
0x00000000 0x1b Netzteil.o
.debug_info 0x00000000 0x196
.debug_info 0x00000000 0x256
*(.debug_info)
.debug_info 0x00000000 0x196 Netzteil.o
.debug_info 0x00000000 0x256 Netzteil.o
*(.gnu.linkonce.wi.*)
.debug_abbrev 0x00000000 0x106
*(.debug_abbrev)
.debug_abbrev 0x00000000 0x106 Netzteil.o
.debug_line 0x00000000 0x14f
.debug_line 0x00000000 0x1bc
*(.debug_line)
.debug_line 0x00000000 0x14f Netzteil.o
.debug_line 0x00000000 0x1bc Netzteil.o
.debug_frame 0x00000000 0x20
*(.debug_frame)

1
Netzteil/netzteil.aws Normal file
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@ -0,0 +1 @@
<AVRWorkspace><IOSettings><CurrentRegisters><CPU><register register="CLKPR" group="CPU" display="1" locked="0"/></CPU><CPU><register register="GPIOR0" group="CPU" display="1" locked="0"/></CPU><CPU><register register="GPIOR1" group="CPU" display="1" locked="0"/></CPU><CPU><register register="GPIOR2" group="CPU" display="1" locked="0"/></CPU><CPU><register register="MCUCR" group="CPU" display="1" locked="0"/></CPU><CPU><register register="MCUSR" group="CPU" display="1" locked="0"/></CPU><CPU><register register="OSCCAL" group="CPU" display="1" locked="0"/></CPU><CPU><register register="PRR" group="CPU" display="1" locked="0"/></CPU><CPU><register register="SPL" group="CPU" display="1" locked="0"/></CPU><CPU><register register="SREG" group="CPU" display="1" locked="0"/></CPU></CurrentRegisters></IOSettings><part name="ATTINY24"/><Files><File00000 Name="D:\Doc's\Basteleien\Netzteilswitcher\Netzteil\Netzteil.c" Position="189 67 676 412" LineCol="27 18" State="Maximized"/></Files></AVRWorkspace>