2014-09-05 01:39:40 +02:00
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Door.elf: file format elf32-avr
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Sections:
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Idx Name Size VMA LMA File off Algn
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2015-02-07 18:10:00 +01:00
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0 .data 00000076 00800100 000003f4 00000488 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, ALLOC, LOAD, DATA
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2015-02-07 18:10:00 +01:00
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1 .text 000003f4 00000000 00000000 00000094 2**1
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2014-11-16 18:10:00 +01:00
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2015-02-07 18:10:00 +01:00
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2 .bss 00000195 00800176 00800176 000004fe 2**0
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2014-11-19 23:57:35 +01:00
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ALLOC
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2015-02-07 18:10:00 +01:00
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3 .stab 000006cc 00000000 00000000 00000500 2**2
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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4 .stabstr 00000082 00000000 00000000 00000bcc 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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5 .comment 0000002f 00000000 00000000 00000c4e 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY
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2015-02-07 18:10:00 +01:00
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6 .debug_aranges 00000050 00000000 00000000 00000c7d 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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7 .debug_info 0000289d 00000000 00000000 00000ccd 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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8 .debug_abbrev 00000474 00000000 00000000 0000356a 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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9 .debug_line 000005af 00000000 00000000 000039de 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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10 .debug_frame 000000dc 00000000 00000000 00003f90 2**2
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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11 .debug_str 00000c59 00000000 00000000 0000406c 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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12 .debug_loc 00000af1 00000000 00000000 00004cc5 2**0
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2014-11-19 23:57:35 +01:00
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CONTENTS, READONLY, DEBUGGING
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2015-02-07 18:10:00 +01:00
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13 .debug_ranges 00000478 00000000 00000000 000057b6 2**0
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2014-09-05 01:39:40 +02:00
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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00000000 <__vectors>:
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2014-11-19 23:57:35 +01:00
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0: 0c 94 35 00 jmp 0x6a ; 0x6a <__ctors_end>
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4: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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8: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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c: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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10: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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14: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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18: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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1c: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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20: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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24: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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28: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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2c: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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30: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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34: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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38: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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3c: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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40: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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44: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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48: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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4c: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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50: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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54: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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58: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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5c: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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60: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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64: 0c 94 5d 00 jmp 0xba ; 0xba <__bad_interrupt>
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00000068 <__ctors_start>:
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2015-02-07 18:10:00 +01:00
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68: b9 01 movw r22, r18
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2014-11-19 23:57:35 +01:00
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0000006a <__ctors_end>:
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6a: 11 24 eor r1, r1
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6c: 1f be out 0x3f, r1 ; 63
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6e: cf ef ldi r28, 0xFF ; 255
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70: d4 e0 ldi r29, 0x04 ; 4
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72: de bf out 0x3e, r29 ; 62
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74: cd bf out 0x3d, r28 ; 61
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00000076 <__do_copy_data>:
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76: 11 e0 ldi r17, 0x01 ; 1
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78: a0 e0 ldi r26, 0x00 ; 0
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7a: b1 e0 ldi r27, 0x01 ; 1
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2015-02-07 18:10:00 +01:00
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7c: e4 ef ldi r30, 0xF4 ; 244
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7e: f3 e0 ldi r31, 0x03 ; 3
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2014-11-19 23:57:35 +01:00
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80: 02 c0 rjmp .+4 ; 0x86 <__do_copy_data+0x10>
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82: 05 90 lpm r0, Z+
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84: 0d 92 st X+, r0
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2015-02-07 18:10:00 +01:00
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86: a6 37 cpi r26, 0x76 ; 118
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2014-11-19 23:57:35 +01:00
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88: b1 07 cpc r27, r17
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8a: d9 f7 brne .-10 ; 0x82 <__do_copy_data+0xc>
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0000008c <__do_clear_bss>:
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8c: 23 e0 ldi r18, 0x03 ; 3
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2015-02-07 18:10:00 +01:00
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8e: a6 e7 ldi r26, 0x76 ; 118
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2014-11-19 23:57:35 +01:00
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90: b1 e0 ldi r27, 0x01 ; 1
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92: 01 c0 rjmp .+2 ; 0x96 <.do_clear_bss_start>
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00000094 <.do_clear_bss_loop>:
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94: 1d 92 st X+, r1
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00000096 <.do_clear_bss_start>:
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2015-02-07 18:10:00 +01:00
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96: ab 30 cpi r26, 0x0B ; 11
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2014-11-19 23:57:35 +01:00
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98: b2 07 cpc r27, r18
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9a: e1 f7 brne .-8 ; 0x94 <.do_clear_bss_loop>
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0000009c <__do_global_ctors>:
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9c: 10 e0 ldi r17, 0x00 ; 0
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9e: ca e6 ldi r28, 0x6A ; 106
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a0: d0 e0 ldi r29, 0x00 ; 0
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a2: 04 c0 rjmp .+8 ; 0xac <__do_global_ctors+0x10>
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a4: 22 97 sbiw r28, 0x02 ; 2
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a6: fe 01 movw r30, r28
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2015-02-07 18:10:00 +01:00
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a8: 0e 94 f4 01 call 0x3e8 ; 0x3e8 <__tablejump__>
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2014-11-19 23:57:35 +01:00
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ac: c8 36 cpi r28, 0x68 ; 104
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ae: d1 07 cpc r29, r17
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b0: c9 f7 brne .-14 ; 0xa4 <__do_global_ctors+0x8>
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2015-02-07 18:10:00 +01:00
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b2: 0e 94 b4 00 call 0x168 ; 0x168 <main>
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b6: 0c 94 f8 01 jmp 0x3f0 ; 0x3f0 <_exit>
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2014-11-19 23:57:35 +01:00
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000000ba <__bad_interrupt>:
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ba: 0c 94 00 00 jmp 0 ; 0x0 <__vectors>
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000000be <_Z8read8bitv>:
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uart_putchar(*text);
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text++;
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}
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}
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void printDec(uint16_t wert) {
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print((wert/10000)+'0');
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be: 20 e0 ldi r18, 0x00 ; 0
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c0: 30 e0 ldi r19, 0x00 ; 0
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c2: 80 e0 ldi r24, 0x00 ; 0
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c4: 61 e0 ldi r22, 0x01 ; 1
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c6: 70 e0 ldi r23, 0x00 ; 0
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2015-02-07 18:10:00 +01:00
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c8: 4a 9b sbis 0x09, 2 ; 9
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2014-11-19 23:57:35 +01:00
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ca: fe cf rjmp .-4 ; 0xc8 <_Z8read8bitv+0xa>
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2015-02-07 18:10:00 +01:00
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cc: ef e9 ldi r30, 0x9F ; 159
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ce: ff e0 ldi r31, 0x0F ; 15
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d0: 31 97 sbiw r30, 0x01 ; 1
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d2: f1 f7 brne .-4 ; 0xd0 <_Z8read8bitv+0x12>
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d4: 00 c0 rjmp .+0 ; 0xd6 <_Z8read8bitv+0x18>
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d6: 00 00 nop
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d8: 4a 9b sbis 0x09, 2 ; 9
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2014-11-19 23:57:35 +01:00
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UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
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UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
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UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
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}
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uint8_t uart_putchar(uint8_t c) {
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loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
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2015-02-07 18:10:00 +01:00
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da: 08 c0 rjmp .+16 ; 0xec <_Z8read8bitv+0x2e>
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dc: ab 01 movw r20, r22
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de: 02 2e mov r0, r18
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2014-11-19 23:57:35 +01:00
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UDR0 = c;
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2015-02-07 18:10:00 +01:00
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e0: 02 c0 rjmp .+4 ; 0xe6 <_Z8read8bitv+0x28>
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2014-11-19 23:57:35 +01:00
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text++;
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}
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}
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void printDec(uint16_t wert) {
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print((wert/10000)+'0');
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print(((wert/1000)%10)+'0');
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2015-02-07 18:10:00 +01:00
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e2: 44 0f add r20, r20
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e4: 55 1f adc r21, r21
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e6: 0a 94 dec r0
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e8: e2 f7 brpl .-8 ; 0xe2 <_Z8read8bitv+0x24>
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ea: 84 2b or r24, r20
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ec: 4a 99 sbic 0x09, 2 ; 9
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ee: fe cf rjmp .-4 ; 0xec <_Z8read8bitv+0x2e>
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f0: 2f 5f subi r18, 0xFF ; 255
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f2: 3f 4f sbci r19, 0xFF ; 255
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f4: 28 30 cpi r18, 0x08 ; 8
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f6: 31 05 cpc r19, r1
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f8: 39 f7 brne .-50 ; 0xc8 <_Z8read8bitv+0xa>
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fa: 08 95 ret
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2014-11-19 23:57:35 +01:00
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2015-02-07 18:10:00 +01:00
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000000fc <_Z7recievev>:
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fc: cf 93 push r28
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fe: 4a 99 sbic 0x09, 2 ; 9
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100: 24 c0 rjmp .+72 ; 0x14a <_Z7recievev+0x4e>
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102: 8f e1 ldi r24, 0x1F ; 31
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104: 9e e4 ldi r25, 0x4E ; 78
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106: 01 97 sbiw r24, 0x01 ; 1
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108: f1 f7 brne .-4 ; 0x106 <_Z7recievev+0xa>
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10a: 00 c0 rjmp .+0 ; 0x10c <_Z7recievev+0x10>
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10c: 00 00 nop
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2014-11-19 23:57:35 +01:00
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10e: 4a 99 sbic 0x09, 2 ; 9
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2015-02-07 18:10:00 +01:00
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110: 1f c0 rjmp .+62 ; 0x150 <_Z7recievev+0x54>
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112: 4a 9b sbis 0x09, 2 ; 9
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114: fe cf rjmp .-4 ; 0x112 <_Z7recievev+0x16>
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116: 4a 99 sbic 0x09, 2 ; 9
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118: fe cf rjmp .-4 ; 0x116 <_Z7recievev+0x1a>
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11a: 0e 94 5f 00 call 0xbe ; 0xbe <_Z8read8bitv>
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11e: 81 11 cpse r24, r1
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120: 1a c0 rjmp .+52 ; 0x156 <_Z7recievev+0x5a>
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122: 0e 94 5f 00 call 0xbe ; 0xbe <_Z8read8bitv>
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126: 8f 3e cpi r24, 0xEF ; 239
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128: c9 f4 brne .+50 ; 0x15c <_Z7recievev+0x60>
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12a: 0e 94 5f 00 call 0xbe ; 0xbe <_Z8read8bitv>
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12e: c8 2f mov r28, r24
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2014-11-19 23:57:35 +01:00
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130: 0e 94 5f 00 call 0xbe ; 0xbe <_Z8read8bitv>
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2015-02-07 18:10:00 +01:00
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134: 2c 2f mov r18, r28
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136: 30 e0 ldi r19, 0x00 ; 0
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138: a9 01 movw r20, r18
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13a: 48 0f add r20, r24
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13c: 51 1d adc r21, r1
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13e: 4f 3f cpi r20, 0xFF ; 255
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2014-11-19 23:57:35 +01:00
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UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
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UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
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UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
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}
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uint8_t uart_putchar(uint8_t c) {
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loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
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2015-02-07 18:10:00 +01:00
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140: 51 05 cpc r21, r1
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142: 71 f0 breq .+28 ; 0x160 <_Z7recievev+0x64>
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144: 2f ef ldi r18, 0xFF ; 255
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2014-11-19 23:57:35 +01:00
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UDR0 = c;
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2015-02-07 18:10:00 +01:00
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146: 30 e0 ldi r19, 0x00 ; 0
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2014-11-19 23:57:35 +01:00
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}
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}
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void printDec(uint16_t wert) {
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print((wert/10000)+'0');
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print(((wert/1000)%10)+'0');
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print(((wert/100)%10)+'0');
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2015-02-07 18:10:00 +01:00
|
|
|
148: 0b c0 rjmp .+22 ; 0x160 <_Z7recievev+0x64>
|
|
|
|
|
14a: 2f ef ldi r18, 0xFF ; 255
|
|
|
|
|
14c: 30 e0 ldi r19, 0x00 ; 0
|
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|
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|
14e: 08 c0 rjmp .+16 ; 0x160 <_Z7recievev+0x64>
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|
150: 2f ef ldi r18, 0xFF ; 255
|
|
|
|
|
152: 30 e0 ldi r19, 0x00 ; 0
|
|
|
|
|
154: 05 c0 rjmp .+10 ; 0x160 <_Z7recievev+0x64>
|
|
|
|
|
156: 2f ef ldi r18, 0xFF ; 255
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|
|
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|
158: 30 e0 ldi r19, 0x00 ; 0
|
|
|
|
|
15a: 02 c0 rjmp .+4 ; 0x160 <_Z7recievev+0x64>
|
|
|
|
|
15c: 2f ef ldi r18, 0xFF ; 255
|
|
|
|
|
15e: 30 e0 ldi r19, 0x00 ; 0
|
|
|
|
|
160: 82 2f mov r24, r18
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|
|
|
|
162: 93 2f mov r25, r19
|
|
|
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|
164: cf 91 pop r28
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|
166: 08 95 ret
|
|
|
|
|
|
|
|
|
|
00000168 <main>:
|
|
|
|
|
168: 78 94 sei
|
|
|
|
|
16a: 82 e3 ldi r24, 0x32 ; 50
|
|
|
|
|
16c: 90 e0 ldi r25, 0x00 ; 0
|
|
|
|
|
16e: 27 e5 ldi r18, 0x57 ; 87
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|
|
|
|
170: 31 e0 ldi r19, 0x01 ; 1
|
|
|
|
|
172: e0 ec ldi r30, 0xC0 ; 192
|
|
|
|
|
174: f0 e0 ldi r31, 0x00 ; 0
|
|
|
|
|
176: a6 ec ldi r26, 0xC6 ; 198
|
|
|
|
|
178: b0 e0 ldi r27, 0x00 ; 0
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|
|
|
|
17a: 7d e0 ldi r23, 0x0D ; 13
|
|
|
|
|
17c: 6a e0 ldi r22, 0x0A ; 10
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|
17e: 11 c0 rjmp .+34 ; 0x1a2 <main+0x3a>
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|
180: 40 81 ld r20, Z
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|
182: 45 ff sbrs r20, 5
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|
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|
184: fd cf rjmp .-6 ; 0x180 <main+0x18>
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|
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|
|
186: 5c 93 st X, r21
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|
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|
188: 59 91 ld r21, Y+
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|
|
18a: 51 11 cpse r21, r1
|
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|
|
|
18c: f9 cf rjmp .-14 ; 0x180 <main+0x18>
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|
|
18e: 40 81 ld r20, Z
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|
190: 45 ff sbrs r20, 5
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|
|
|
192: fd cf rjmp .-6 ; 0x18e <main+0x26>
|
|
|
|
|
194: 7c 93 st X, r23
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
196: 40 81 ld r20, Z
|
|
|
|
|
198: 45 ff sbrs r20, 5
|
|
|
|
|
19a: fd cf rjmp .-6 ; 0x196 <main+0x2e>
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
19c: 6c 93 st X, r22
|
2014-11-19 23:57:35 +01:00
|
|
|
}
|
|
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
|
|
|
|
print(((wert/1000)%10)+'0');
|
|
|
|
|
print(((wert/100)%10)+'0');
|
|
|
|
|
print(((wert/10)%10)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
19e: 01 97 sbiw r24, 0x01 ; 1
|
|
|
|
|
1a0: 19 f0 breq .+6 ; 0x1a8 <main+0x40>
|
|
|
|
|
1a2: e9 01 movw r28, r18
|
|
|
|
|
1a4: 57 e4 ldi r21, 0x47 ; 71
|
|
|
|
|
1a6: ec cf rjmp .-40 ; 0x180 <main+0x18>
|
|
|
|
|
1a8: 29 9a sbi 0x05, 1 ; 5
|
|
|
|
|
1aa: c0 ec ldi r28, 0xC0 ; 192
|
|
|
|
|
1ac: d0 e0 ldi r29, 0x00 ; 0
|
|
|
|
|
1ae: 06 ec ldi r16, 0xC6 ; 198
|
|
|
|
|
1b0: 10 e0 ldi r17, 0x00 ; 0
|
|
|
|
|
1b2: 0f 2e mov r0, r31
|
|
|
|
|
1b4: f0 e6 ldi r31, 0x60 ; 96
|
|
|
|
|
1b6: ef 2e mov r14, r31
|
|
|
|
|
1b8: f1 e0 ldi r31, 0x01 ; 1
|
|
|
|
|
1ba: ff 2e mov r15, r31
|
|
|
|
|
1bc: f0 2d mov r31, r0
|
|
|
|
|
1be: 0f 2e mov r0, r31
|
|
|
|
|
1c0: fd e0 ldi r31, 0x0D ; 13
|
|
|
|
|
1c2: cf 2e mov r12, r31
|
|
|
|
|
1c4: f0 2d mov r31, r0
|
|
|
|
|
1c6: 0f 2e mov r0, r31
|
|
|
|
|
1c8: fa e0 ldi r31, 0x0A ; 10
|
|
|
|
|
1ca: df 2e mov r13, r31
|
|
|
|
|
1cc: f0 2d mov r31, r0
|
|
|
|
|
1ce: 4a 99 sbic 0x09, 2 ; 9
|
|
|
|
|
1d0: fe cf rjmp .-4 ; 0x1ce <main+0x66>
|
|
|
|
|
1d2: 28 9a sbi 0x05, 0 ; 5
|
|
|
|
|
1d4: 0e 94 7e 00 call 0xfc ; 0xfc <_Z7recievev>
|
|
|
|
|
1d8: b8 2e mov r11, r24
|
|
|
|
|
1da: ac 01 movw r20, r24
|
|
|
|
|
1dc: 55 27 eor r21, r21
|
|
|
|
|
1de: 88 81 ld r24, Y
|
|
|
|
|
1e0: 85 ff sbrs r24, 5
|
|
|
|
|
1e2: fd cf rjmp .-6 ; 0x1de <main+0x76>
|
|
|
|
|
1e4: 80 e3 ldi r24, 0x30 ; 48
|
|
|
|
|
1e6: d8 01 movw r26, r16
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
1e8: 8c 93 st X, r24
|
|
|
|
|
1ea: 60 e0 ldi r22, 0x00 ; 0
|
|
|
|
|
1ec: 70 e0 ldi r23, 0x00 ; 0
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
1ee: cb 01 movw r24, r22
|
2014-11-19 23:57:35 +01:00
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
|
|
|
|
print(((wert/1000)%10)+'0');
|
|
|
|
|
print(((wert/100)%10)+'0');
|
|
|
|
|
print(((wert/10)%10)+'0');
|
|
|
|
|
print((wert%10)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
1f0: 96 95 lsr r25
|
|
|
|
|
1f2: 87 95 ror r24
|
|
|
|
|
1f4: 96 95 lsr r25
|
|
|
|
|
1f6: 87 95 ror r24
|
|
|
|
|
1f8: 96 95 lsr r25
|
|
|
|
|
1fa: 87 95 ror r24
|
|
|
|
|
1fc: 9c 01 movw r18, r24
|
|
|
|
|
1fe: 22 0f add r18, r18
|
|
|
|
|
200: 33 1f adc r19, r19
|
|
|
|
|
202: 88 0f add r24, r24
|
|
|
|
|
204: 99 1f adc r25, r25
|
|
|
|
|
206: 88 0f add r24, r24
|
|
|
|
|
208: 99 1f adc r25, r25
|
|
|
|
|
20a: 88 0f add r24, r24
|
|
|
|
|
20c: 99 1f adc r25, r25
|
|
|
|
|
20e: 82 0f add r24, r18
|
|
|
|
|
210: 93 1f adc r25, r19
|
|
|
|
|
212: 68 1b sub r22, r24
|
|
|
|
|
214: 79 0b sbc r23, r25
|
|
|
|
|
216: 60 5d subi r22, 0xD0 ; 208
|
|
|
|
|
218: 88 81 ld r24, Y
|
|
|
|
|
21a: 85 ff sbrs r24, 5
|
|
|
|
|
21c: fd cf rjmp .-6 ; 0x218 <main+0xb0>
|
|
|
|
|
21e: f8 01 movw r30, r16
|
|
|
|
|
220: 60 83 st Z, r22
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
222: 9a 01 movw r18, r20
|
|
|
|
|
224: 36 95 lsr r19
|
|
|
|
|
226: 27 95 ror r18
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
228: 36 95 lsr r19
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
22a: 27 95 ror r18
|
|
|
|
|
22c: ab e7 ldi r26, 0x7B ; 123
|
|
|
|
|
22e: b4 e1 ldi r27, 0x14 ; 20
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
230: 0e 94 e6 01 call 0x3cc ; 0x3cc <__umulhisi3>
|
2014-11-19 23:57:35 +01:00
|
|
|
void printpulses(void) {
|
|
|
|
|
Serial.println("\n\r\n\rReceived: \n\rOFF \tON");
|
|
|
|
|
for (uint8_t i = 0; i < currentpulse; i++) {
|
|
|
|
|
Serial.printDec(pulses[i][0] * RESOLUTION);
|
|
|
|
|
Serial.print(" ");
|
|
|
|
|
Serial.printDec(pulses[i][1] * RESOLUTION);
|
2015-02-07 18:10:00 +01:00
|
|
|
234: 96 95 lsr r25
|
|
|
|
|
236: 87 95 ror r24
|
|
|
|
|
238: 80 5d subi r24, 0xD0 ; 208
|
|
|
|
|
23a: 98 81 ld r25, Y
|
|
|
|
|
23c: 95 ff sbrs r25, 5
|
|
|
|
|
23e: fd cf rjmp .-6 ; 0x23a <main+0xd2>
|
|
|
|
|
240: d8 01 movw r26, r16
|
|
|
|
|
242: 8c 93 st X, r24
|
|
|
|
|
244: 9a 01 movw r18, r20
|
|
|
|
|
246: ad ec ldi r26, 0xCD ; 205
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
248: bc ec ldi r27, 0xCC ; 204
|
|
|
|
|
24a: 0e 94 e6 01 call 0x3cc ; 0x3cc <__umulhisi3>
|
|
|
|
|
24e: fc 01 movw r30, r24
|
|
|
|
|
250: f6 95 lsr r31
|
|
|
|
|
252: e7 95 ror r30
|
|
|
|
|
254: f6 95 lsr r31
|
|
|
|
|
256: e7 95 ror r30
|
2014-11-19 23:57:35 +01:00
|
|
|
uart_putchar(*text);
|
|
|
|
|
text++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
258: f6 95 lsr r31
|
|
|
|
|
25a: e7 95 ror r30
|
|
|
|
|
25c: 9f 01 movw r18, r30
|
|
|
|
|
25e: 0e 94 e6 01 call 0x3cc ; 0x3cc <__umulhisi3>
|
|
|
|
|
262: 96 95 lsr r25
|
|
|
|
|
264: 87 95 ror r24
|
|
|
|
|
266: 96 95 lsr r25
|
|
|
|
|
268: 87 95 ror r24
|
|
|
|
|
26a: 96 95 lsr r25
|
|
|
|
|
26c: 87 95 ror r24
|
|
|
|
|
26e: 9c 01 movw r18, r24
|
|
|
|
|
270: 22 0f add r18, r18
|
|
|
|
|
272: 33 1f adc r19, r19
|
|
|
|
|
274: 88 0f add r24, r24
|
|
|
|
|
276: 99 1f adc r25, r25
|
|
|
|
|
278: 88 0f add r24, r24
|
|
|
|
|
27a: 99 1f adc r25, r25
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
|
|
|
|
UDR0 = c;
|
|
|
|
|
27c: 88 0f add r24, r24
|
|
|
|
|
text++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
2014-11-19 23:57:35 +01:00
|
|
|
print(((wert/1000)%10)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
27e: 99 1f adc r25, r25
|
|
|
|
|
280: 82 0f add r24, r18
|
|
|
|
|
282: 93 1f adc r25, r19
|
|
|
|
|
284: e8 1b sub r30, r24
|
|
|
|
|
286: f9 0b sbc r31, r25
|
|
|
|
|
288: e0 5d subi r30, 0xD0 ; 208
|
|
|
|
|
28a: 88 81 ld r24, Y
|
|
|
|
|
28c: 85 ff sbrs r24, 5
|
|
|
|
|
28e: fd cf rjmp .-6 ; 0x28a <main+0x122>
|
|
|
|
|
290: d8 01 movw r26, r16
|
|
|
|
|
292: ec 93 st X, r30
|
|
|
|
|
294: 9a 01 movw r18, r20
|
|
|
|
|
296: ad ec ldi r26, 0xCD ; 205
|
|
|
|
|
298: bc ec ldi r27, 0xCC ; 204
|
|
|
|
|
29a: 0e 94 e6 01 call 0x3cc ; 0x3cc <__umulhisi3>
|
|
|
|
|
29e: 96 95 lsr r25
|
|
|
|
|
2a0: 87 95 ror r24
|
|
|
|
|
2a2: 96 95 lsr r25
|
|
|
|
|
2a4: 87 95 ror r24
|
|
|
|
|
2a6: 96 95 lsr r25
|
|
|
|
|
2a8: 87 95 ror r24
|
|
|
|
|
2aa: 9c 01 movw r18, r24
|
|
|
|
|
2ac: 22 0f add r18, r18
|
|
|
|
|
2ae: 33 1f adc r19, r19
|
|
|
|
|
2b0: 88 0f add r24, r24
|
|
|
|
|
2b2: 99 1f adc r25, r25
|
|
|
|
|
2b4: 88 0f add r24, r24
|
|
|
|
|
2b6: 99 1f adc r25, r25
|
|
|
|
|
2b8: 88 0f add r24, r24
|
|
|
|
|
2ba: 99 1f adc r25, r25
|
|
|
|
|
2bc: 82 0f add r24, r18
|
|
|
|
|
2be: 93 1f adc r25, r19
|
|
|
|
|
2c0: 48 1b sub r20, r24
|
|
|
|
|
2c2: 59 0b sbc r21, r25
|
|
|
|
|
2c4: 40 5d subi r20, 0xD0 ; 208
|
|
|
|
|
2c6: 88 81 ld r24, Y
|
|
|
|
|
2c8: 85 ff sbrs r24, 5
|
|
|
|
|
2ca: fd cf rjmp .-6 ; 0x2c6 <main+0x15e>
|
|
|
|
|
2cc: f8 01 movw r30, r16
|
|
|
|
|
2ce: 40 83 st Z, r20
|
|
|
|
|
2d0: f7 01 movw r30, r14
|
|
|
|
|
2d2: 90 e2 ldi r25, 0x20 ; 32
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
2d4: 88 81 ld r24, Y
|
2014-11-19 23:57:35 +01:00
|
|
|
2d6: 85 ff sbrs r24, 5
|
2015-02-07 18:10:00 +01:00
|
|
|
2d8: fd cf rjmp .-6 ; 0x2d4 <main+0x16c>
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
2da: d8 01 movw r26, r16
|
2014-11-19 23:57:35 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
|
|
|
|
print(((wert/1000)%10)+'0');
|
|
|
|
|
print(((wert/100)%10)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
2dc: 9c 93 st X, r25
|
|
|
|
|
2de: 91 91 ld r25, Z+
|
|
|
|
|
2e0: 91 11 cpse r25, r1
|
|
|
|
|
2e2: f8 cf rjmp .-16 ; 0x2d4 <main+0x16c>
|
|
|
|
|
2e4: 88 81 ld r24, Y
|
|
|
|
|
2e6: 85 ff sbrs r24, 5
|
|
|
|
|
2e8: fd cf rjmp .-6 ; 0x2e4 <main+0x17c>
|
|
|
|
|
2ea: f8 01 movw r30, r16
|
|
|
|
|
2ec: c0 82 st Z, r12
|
|
|
|
|
2ee: 88 81 ld r24, Y
|
|
|
|
|
2f0: 85 ff sbrs r24, 5
|
|
|
|
|
2f2: fd cf rjmp .-6 ; 0x2ee <main+0x186>
|
|
|
|
|
2f4: d8 01 movw r26, r16
|
|
|
|
|
2f6: dc 92 st X, r13
|
|
|
|
|
2f8: bf ef ldi r27, 0xFF ; 255
|
|
|
|
|
2fa: bb 12 cpse r11, r27
|
|
|
|
|
2fc: 09 c0 rjmp .+18 ; 0x310 <main+0x1a8>
|
|
|
|
|
2fe: ef e7 ldi r30, 0x7F ; 127
|
|
|
|
|
300: f4 e8 ldi r31, 0x84 ; 132
|
|
|
|
|
302: 2e e1 ldi r18, 0x1E ; 30
|
|
|
|
|
304: e1 50 subi r30, 0x01 ; 1
|
|
|
|
|
306: f0 40 sbci r31, 0x00 ; 0
|
|
|
|
|
308: 20 40 sbci r18, 0x00 ; 0
|
|
|
|
|
30a: e1 f7 brne .-8 ; 0x304 <main+0x19c>
|
|
|
|
|
30c: 00 c0 rjmp .+0 ; 0x30e <main+0x1a6>
|
|
|
|
|
30e: 00 00 nop
|
|
|
|
|
310: 28 98 cbi 0x05, 0 ; 5
|
|
|
|
|
312: 5d cf rjmp .-326 ; 0x1ce <main+0x66>
|
|
|
|
|
|
|
|
|
|
00000314 <_ZN4UartILm9600EEC1Ev>:
|
|
|
|
|
314: cf 93 push r28
|
|
|
|
|
316: df 93 push r29
|
|
|
|
|
318: 78 94 sei
|
|
|
|
|
31a: 81 e8 ldi r24, 0x81 ; 129
|
|
|
|
|
31c: 80 93 c4 00 sts 0x00C4, r24
|
|
|
|
|
320: 10 92 c0 00 sts 0x00C0, r1
|
|
|
|
|
324: 88 e0 ldi r24, 0x08 ; 8
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
326: 80 93 c1 00 sts 0x00C1, r24
|
|
|
|
|
32a: 86 e0 ldi r24, 0x06 ; 6
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
32c: 80 93 c2 00 sts 0x00C2, r24
|
2014-11-19 23:57:35 +01:00
|
|
|
}
|
|
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
|
|
|
|
print(((wert/1000)%10)+'0');
|
|
|
|
|
print(((wert/100)%10)+'0');
|
|
|
|
|
print(((wert/10)%10)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
330: ac e6 ldi r26, 0x6C ; 108
|
|
|
|
|
332: b1 e0 ldi r27, 0x01 ; 1
|
|
|
|
|
334: 95 e5 ldi r25, 0x55 ; 85
|
|
|
|
|
336: e0 ec ldi r30, 0xC0 ; 192
|
|
|
|
|
338: f0 e0 ldi r31, 0x00 ; 0
|
|
|
|
|
33a: c6 ec ldi r28, 0xC6 ; 198
|
|
|
|
|
33c: d0 e0 ldi r29, 0x00 ; 0
|
|
|
|
|
33e: 80 81 ld r24, Z
|
|
|
|
|
340: 85 ff sbrs r24, 5
|
|
|
|
|
342: fd cf rjmp .-6 ; 0x33e <_ZN4UartILm9600EEC1Ev+0x2a>
|
|
|
|
|
344: 98 83 st Y, r25
|
|
|
|
|
346: 9d 91 ld r25, X+
|
|
|
|
|
348: 91 11 cpse r25, r1
|
|
|
|
|
34a: f9 cf rjmp .-14 ; 0x33e <_ZN4UartILm9600EEC1Ev+0x2a>
|
|
|
|
|
34c: e0 ec ldi r30, 0xC0 ; 192
|
|
|
|
|
34e: f0 e0 ldi r31, 0x00 ; 0
|
|
|
|
|
350: 80 81 ld r24, Z
|
|
|
|
|
352: 85 ff sbrs r24, 5
|
|
|
|
|
354: fd cf rjmp .-6 ; 0x350 <_ZN4UartILm9600EEC1Ev+0x3c>
|
|
|
|
|
356: 8d e0 ldi r24, 0x0D ; 13
|
|
|
|
|
358: 80 93 c6 00 sts 0x00C6, r24
|
|
|
|
|
35c: e0 ec ldi r30, 0xC0 ; 192
|
|
|
|
|
35e: f0 e0 ldi r31, 0x00 ; 0
|
|
|
|
|
360: 80 81 ld r24, Z
|
|
|
|
|
362: 85 ff sbrs r24, 5
|
|
|
|
|
364: fd cf rjmp .-6 ; 0x360 <_ZN4UartILm9600EEC1Ev+0x4c>
|
|
|
|
|
366: 8a e0 ldi r24, 0x0A ; 10
|
|
|
|
|
368: 80 93 c6 00 sts 0x00C6, r24
|
|
|
|
|
36c: df 91 pop r29
|
|
|
|
|
36e: cf 91 pop r28
|
|
|
|
|
370: 08 95 ret
|
|
|
|
|
|
|
|
|
|
00000372 <_GLOBAL__sub_I_Serial>:
|
|
|
|
|
372: 8a e0 ldi r24, 0x0A ; 10
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
374: 93 e0 ldi r25, 0x03 ; 3
|
|
|
|
|
376: 0e 94 8a 01 call 0x314 ; 0x314 <_ZN4UartILm9600EEC1Ev>
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
37a: 55 9a sbi 0x0a, 5 ; 10
|
2014-11-19 23:57:35 +01:00
|
|
|
void printDec(uint16_t wert) {
|
|
|
|
|
print((wert/10000)+'0');
|
|
|
|
|
print(((wert/1000)%10)+'0');
|
|
|
|
|
print(((wert/100)%10)+'0');
|
|
|
|
|
print(((wert/10)%10)+'0');
|
|
|
|
|
print((wert%10)+'0');
|
2015-02-07 18:10:00 +01:00
|
|
|
37c: 53 9a sbi 0x0a, 3 ; 10
|
|
|
|
|
37e: 23 9a sbi 0x04, 3 ; 4
|
|
|
|
|
380: 81 e2 ldi r24, 0x21 ; 33
|
|
|
|
|
382: 84 bd out 0x24, r24 ; 36
|
|
|
|
|
384: 81 e0 ldi r24, 0x01 ; 1
|
|
|
|
|
386: 85 bd out 0x25, r24 ; 37
|
|
|
|
|
388: 16 bc out 0x26, r1 ; 38
|
|
|
|
|
38a: 10 92 b6 00 sts 0x00B6, r1
|
|
|
|
|
38e: 91 ea ldi r25, 0xA1 ; 161
|
|
|
|
|
390: 90 93 b0 00 sts 0x00B0, r25
|
|
|
|
|
394: 80 93 b1 00 sts 0x00B1, r24
|
|
|
|
|
398: 10 92 b2 00 sts 0x00B2, r1
|
|
|
|
|
39c: 10 92 6e 00 sts 0x006E, r1
|
|
|
|
|
3a0: 10 92 70 00 sts 0x0070, r1
|
|
|
|
|
3a4: 18 bc out 0x28, r1 ; 40
|
|
|
|
|
3a6: 10 92 b4 00 sts 0x00B4, r1
|
|
|
|
|
3aa: 10 92 b3 00 sts 0x00B3, r1
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
3ae: 20 9a sbi 0x04, 0 ; 4
|
|
|
|
|
3b0: 21 9a sbi 0x04, 1 ; 4
|
|
|
|
|
3b2: 28 98 cbi 0x05, 0 ; 5
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
3b4: 29 98 cbi 0x05, 1 ; 5
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
3b6: 56 98 cbi 0x0a, 6 ; 10
|
|
|
|
|
3b8: 5e 98 cbi 0x0b, 6 ; 11
|
|
|
|
|
3ba: 57 98 cbi 0x0a, 7 ; 10
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
3bc: 5f 98 cbi 0x0b, 7 ; 11
|
2014-11-19 23:57:35 +01:00
|
|
|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
|
|
|
|
UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
|
|
|
|
|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
|
|
|
|
|
}
|
|
|
|
|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
3be: 10 be out 0x30, r1 ; 48
|
|
|
|
|
3c0: 10 92 7b 00 sts 0x007B, r1
|
2014-11-19 23:57:35 +01:00
|
|
|
UDR0 = c;
|
2015-02-07 18:10:00 +01:00
|
|
|
3c4: 83 e0 ldi r24, 0x03 ; 3
|
2014-11-19 23:57:35 +01:00
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UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
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UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
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UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
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}
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uint8_t uart_putchar(uint8_t c) {
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loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
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2015-02-07 18:10:00 +01:00
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3c6: 80 93 7f 00 sts 0x007F, r24
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3ca: 08 95 ret
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000003cc <__umulhisi3>:
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2014-11-19 23:57:35 +01:00
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UDR0 = c;
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2015-02-07 18:10:00 +01:00
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3cc: a2 9f mul r26, r18
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2014-11-19 23:57:35 +01:00
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uint16_t volatile pulses[100][2]; // pair is high and low pulse
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uint8_t volatile currentpulse = 0;
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void printpulses(void) {
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Serial.println("\n\r\n\rReceived: \n\rOFF \tON");
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for (uint8_t i = 0; i < currentpulse; i++) {
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2015-02-07 18:10:00 +01:00
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3ce: b0 01 movw r22, r0
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3d0: b3 9f mul r27, r19
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3d2: c0 01 movw r24, r0
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3d4: a3 9f mul r26, r19
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3d6: 01 d0 rcall .+2 ; 0x3da <__umulhisi3+0xe>
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3d8: b2 9f mul r27, r18
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3da: 70 0d add r23, r0
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2014-11-19 23:57:35 +01:00
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UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
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UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
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UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
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}
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uint8_t uart_putchar(uint8_t c) {
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loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
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2015-02-07 18:10:00 +01:00
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3dc: 81 1d adc r24, r1
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3de: 11 24 eor r1, r1
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3e0: 91 1d adc r25, r1
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2014-11-19 23:57:35 +01:00
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UDR0 = c;
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2015-02-07 18:10:00 +01:00
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3e2: 08 95 ret
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2014-11-19 23:57:35 +01:00
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2015-02-07 18:10:00 +01:00
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000003e4 <__tablejump2__>:
|
2014-11-19 23:57:35 +01:00
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sei();
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init();
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println("Uart done!");
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}
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void print(const char *text) {
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while (*text)
|
2015-02-07 18:10:00 +01:00
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3e4: ee 0f add r30, r30
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3e6: ff 1f adc r31, r31
|
2014-11-19 23:57:35 +01:00
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|
2015-02-07 18:10:00 +01:00
|
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|
000003e8 <__tablejump__>:
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|
3e8: 05 90 lpm r0, Z+
|
2014-11-19 23:57:35 +01:00
|
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|
UCSR0A= (0<<RXC0) | (0<<TXC0) | (0<<UDRE0) | (0<<FE0) | (0<<DOR0) | (0<<UPE0) | (0<<U2X0) | (0<<MPCM0);
|
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UCSR0B= (0<<RXCIE0) | (0<<TXCIE0) | (0<<UDRIE0) | (0<<RXEN0) | (1<<TXEN0) | (0<<UCSZ02) | (0<<RXB80) | (0<<TXB80); //Enable TXEN im Register UCR TX-Data Enable
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|
UCSR0C= (0<<UMSEL01) | (0<<UMSEL00) | (0<<UPM01) | (0<<UPM00) | (0<<USBS0) | (1<<UCSZ01) | (1<<UCSZ00) | (0<<UCPOL0); //8N1
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|
}
|
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|
uint8_t uart_putchar(uint8_t c) {
|
|
|
|
|
loop_until_bit_is_set(UCSR0A, UDRE0); //Ausgabe des Zeichens
|
2015-02-07 18:10:00 +01:00
|
|
|
3ea: f4 91 lpm r31, Z
|
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|
3ec: e0 2d mov r30, r0
|
|
|
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|
3ee: 09 94 ijmp
|
2014-11-19 23:57:35 +01:00
|
|
|
|
2015-02-07 18:10:00 +01:00
|
|
|
000003f0 <_exit>:
|
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|
|
|
3f0: f8 94 cli
|
2014-11-19 23:57:35 +01:00
|
|
|
|
2015-02-07 18:10:00 +01:00
|
|
|
000003f2 <__stop_program>:
|
|
|
|
|
3f2: ff cf rjmp .-2 ; 0x3f2 <__stop_program>
|
