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20131211-181002

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This commit is contained in:
BlubbFish 2013-12-11 17:09:50 +00:00
parent 64b1bd8c1b
commit 11933f0506
16 changed files with 711 additions and 441 deletions
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BIN
Mainboard/Mainboard/Debug/Mainboard.elf
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Binary file not shown.

28
Mainboard/Mainboard/Debug/Mainboard.hex
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@ -5,8 +5,8 @@
:100040000C9453000C9453000C9453000C945300E4
:100050000C945300F80011241FBECFE5D4E0DEBF9E
:10006000CDBF10E0A0E6B0E0EAEDF7E002C00590F9
:100070000D92AE37B107D9F720E0AEE7B0E001C08E
:100080001D92A238B207E1F710E0C6E5D0E004C047
:100070000D92A038B107D9F720E0A0E8B0E001C0A8
:100080001D92A438B207E1F710E0C6E5D0E004C045
:100090002297FE010E940401C435D107C9F70E94CE
:1000A00065000C94EB030C940000FC0103C05D9B05
:1000B000FECF8CB981918111FACF089585E083BF7D
@ -15,21 +15,21 @@
:1000E000215030408040E1F700C00000F3CF1F9264
:1000F0000F920FB60F9211240F931F932F933F93DC
:100100004F935F936F937F938F939F93AF93BF931F
:10011000EF93FF93CF93DF93CDB7DEB72C97DEBF7E
:10012000CDBF80918100813220F48F5F8093810068
:1001300044C01092810080917E001F928F93809125
:100140007F001F928F93809160001F928F9381E6B2
:1001500090E09F938F931F928CE08F938E010F5F9F
:10011000EF93FF93CF93DF93CDB7DEB72F97DEBF7B
:10012000CDBF80918300813220F48F5F8093830064
:1001300044C010928300809180001F928F93809121
:1001400081001F928F93809160001F928F9381E6B0
:1001500090E09F938F931F928FE08F938E010F5F9C
:100160001F4F1F930F930E940801C8010E94550062
:1001700080917E008F5F0FB6F894DEBF0FBECDBFBB
:100180008C3318F480937E0007C010927E0080911B
:100190007F008F5F80937F0080917F008C3338F0E9
:1001A00010927F00809160008F5F8093600080914B
:1001B0006000883110F0109260002C960FB6F89411
:10017000809180008F5F0FB6F894DEBF0FBECDBFB9
:100180008C3318F48093800007C010928000809117
:1001900081008F5F80938100809181008C3338F0E3
:1001A00010928100809160008F5F80936000809149
:1001B0006000883110F0109260002F960FB6F8940E
:1001C000DEBF0FBECDBFDF91CF91FF91EF91BF9109
:1001D000AF919F918F917F916F915F914F913F91DF
:1001E0002F911F910F910F900FBE0F901F90189598
:1001F00086E080BD539A10BC83E389B982E790E022
:1001F00086E080BD539A10BC83E389B983E790E021
:100200000C945500EE0FFF1F0590F491E02D09941A
:10021000AEE0B0E0EEE0F1E00C94C2030D891E897F
:100220008F89988D26E02C831A83098397FF02C05B
@ -125,5 +125,5 @@
:1007C000AA81B981CE0FD11D0FB6F894DEBF0FBE3E
:0A07D000CDBFED010895F894FFCFAE
:1007DA000C74253032643A253032643A253032645A
:0E07EA000A005561727420646F6E65210A006A
:1007EA000D0A005561727420646F6E65210A00005B
:00000001FF

72
Mainboard/Mainboard/Debug/Mainboard.lss
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@ -5,31 +5,31 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000007da 00000000 00000000 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 0000001e 00800060 000007da 0000086e 2**0
1 .data 00000020 00800060 000007da 0000086e 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 00000004 0080007e 0080007e 0000088c 2**0
2 .bss 00000004 00800080 00800080 0000088e 2**0
ALLOC
3 .stab 00000c84 00000000 00000000 0000088c 2**2
3 .stab 00000c84 00000000 00000000 00000890 2**2
CONTENTS, READONLY, DEBUGGING
4 .stabstr 000001aa 00000000 00000000 00001510 2**0
4 .stabstr 000001aa 00000000 00000000 00001514 2**0
CONTENTS, READONLY, DEBUGGING
5 .comment 0000002f 00000000 00000000 000016ba 2**0
5 .comment 0000002f 00000000 00000000 000016be 2**0
CONTENTS, READONLY
6 .debug_aranges 000000a0 00000000 00000000 000016e9 2**0
6 .debug_aranges 000000a0 00000000 00000000 000016ed 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_info 00000f20 00000000 00000000 00001789 2**0
7 .debug_info 00000f20 00000000 00000000 0000178d 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_abbrev 0000078d 00000000 00000000 000026a9 2**0
8 .debug_abbrev 0000078d 00000000 00000000 000026ad 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_line 000007f9 00000000 00000000 00002e36 2**0
9 .debug_line 000007f9 00000000 00000000 00002e3a 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_frame 00000178 00000000 00000000 00003630 2**2
10 .debug_frame 00000178 00000000 00000000 00003634 2**2
CONTENTS, READONLY, DEBUGGING
11 .debug_str 00000510 00000000 00000000 000037a8 2**0
11 .debug_str 00000510 00000000 00000000 000037ac 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 000007d2 00000000 00000000 00003cb8 2**0
12 .debug_loc 000007d2 00000000 00000000 00003cbc 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000060 00000000 00000000 0000448a 2**0
13 .debug_ranges 00000060 00000000 00000000 0000448e 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
@ -77,13 +77,13 @@ Disassembly of section .text:
6c: 02 c0 rjmp .+4 ; 0x72 <__do_copy_data+0x10>
6e: 05 90 lpm r0, Z+
70: 0d 92 st X+, r0
72: ae 37 cpi r26, 0x7E ; 126
72: a0 38 cpi r26, 0x80 ; 128
74: b1 07 cpc r27, r17
76: d9 f7 brne .-10 ; 0x6e <__do_copy_data+0xc>
00000078 <__do_clear_bss>:
78: 20 e0 ldi r18, 0x00 ; 0
7a: ae e7 ldi r26, 0x7E ; 126
7a: a0 e8 ldi r26, 0x80 ; 128
7c: b0 e0 ldi r27, 0x00 ; 0
7e: 01 c0 rjmp .+2 ; 0x82 <.do_clear_bss_start>
@ -91,7 +91,7 @@ Disassembly of section .text:
80: 1d 92 st X+, r1
00000082 <.do_clear_bss_start>:
82: a2 38 cpi r26, 0x82 ; 130
82: a4 38 cpi r26, 0x84 ; 132
84: b2 07 cpc r27, r18
86: e1 f7 brne .-8 ; 0x80 <.do_clear_bss_loop>
@ -247,24 +247,24 @@ ISR(TIMER0_OVF_vect) {
116: df 93 push r29
118: cd b7 in r28, 0x3d ; 61
11a: de b7 in r29, 0x3e ; 62
11c: 2c 97 sbiw r28, 0x0c ; 12
11c: 2f 97 sbiw r28, 0x0f ; 15
11e: de bf out 0x3e, r29 ; 62
120: cd bf out 0x3d, r28 ; 61
if(timer++ > 32) {
122: 80 91 81 00 lds r24, 0x0081
122: 80 91 83 00 lds r24, 0x0083
126: 81 32 cpi r24, 0x21 ; 33
128: 20 f4 brcc .+8 ; 0x132 <__vector_9+0x44>
12a: 8f 5f subi r24, 0xFF ; 255
12c: 80 93 81 00 sts 0x0081, r24
12c: 80 93 83 00 sts 0x0083, r24
130: 44 c0 rjmp .+136 ; 0x1ba <__vector_9+0xcc>
timer = 0;
132: 10 92 81 00 sts 0x0081, r1
char t[12];
snprintf(t, sizeof(t), "t%02d:%02d:%02d\n", h, m, s);
136: 80 91 7e 00 lds r24, 0x007E
132: 10 92 83 00 sts 0x0083, r1
char t[15];
snprintf(t, sizeof(t), "t%02d:%02d:%02d\r\n", h, m, s);
136: 80 91 80 00 lds r24, 0x0080
13a: 1f 92 push r1
13c: 8f 93 push r24
13e: 80 91 7f 00 lds r24, 0x007F
13e: 80 91 81 00 lds r24, 0x0081
142: 1f 92 push r1
144: 8f 93 push r24
146: 80 91 60 00 lds r24, 0x0060
@ -275,7 +275,7 @@ ISR(TIMER0_OVF_vect) {
152: 9f 93 push r25
154: 8f 93 push r24
156: 1f 92 push r1
158: 8c e0 ldi r24, 0x0C ; 12
158: 8f e0 ldi r24, 0x0F ; 15
15a: 8f 93 push r24
15c: 8e 01 movw r16, r28
15e: 0f 5f subi r16, 0xFF ; 255
@ -287,7 +287,7 @@ ISR(TIMER0_OVF_vect) {
16a: c8 01 movw r24, r16
16c: 0e 94 55 00 call 0xaa ; 0xaa <_ZN4UartILm9600EE4sendEPKc.isra.2>
s++;
170: 80 91 7e 00 lds r24, 0x007E
170: 80 91 80 00 lds r24, 0x0080
174: 8f 5f subi r24, 0xFF ; 255
if(s >= 60) {
176: 0f b6 in r0, 0x3f ; 63
@ -299,26 +299,26 @@ ISR(TIMER0_OVF_vect) {
182: 18 f4 brcc .+6 ; 0x18a <__vector_9+0x9c>
if(timer++ > 32) {
timer = 0;
char t[12];
snprintf(t, sizeof(t), "t%02d:%02d:%02d\n", h, m, s);
char t[15];
snprintf(t, sizeof(t), "t%02d:%02d:%02d\r\n", h, m, s);
u.send(t);
s++;
184: 80 93 7e 00 sts 0x007E, r24
184: 80 93 80 00 sts 0x0080, r24
188: 07 c0 rjmp .+14 ; 0x198 <__vector_9+0xaa>
if(s >= 60) {
s = 0;
18a: 10 92 7e 00 sts 0x007E, r1
18a: 10 92 80 00 sts 0x0080, r1
m++;
18e: 80 91 7f 00 lds r24, 0x007F
18e: 80 91 81 00 lds r24, 0x0081
192: 8f 5f subi r24, 0xFF ; 255
194: 80 93 7f 00 sts 0x007F, r24
194: 80 93 81 00 sts 0x0081, r24
}
if(m >= 60) {
198: 80 91 7f 00 lds r24, 0x007F
198: 80 91 81 00 lds r24, 0x0081
19c: 8c 33 cpi r24, 0x3C ; 60
19e: 38 f0 brcs .+14 ; 0x1ae <__vector_9+0xc0>
m = 0;
1a0: 10 92 7f 00 sts 0x007F, r1
1a0: 10 92 81 00 sts 0x0081, r1
h++;
1a4: 80 91 60 00 lds r24, 0x0060
1a8: 8f 5f subi r24, 0xFF ; 255
@ -332,7 +332,7 @@ ISR(TIMER0_OVF_vect) {
1b6: 10 92 60 00 sts 0x0060, r1
}
}
1ba: 2c 96 adiw r28, 0x0c ; 12
1ba: 2f 96 adiw r28, 0x0f ; 15
1bc: 0f b6 in r0, 0x3f ; 63
1be: f8 94 cli
1c0: de bf out 0x3e, r29 ; 62
@ -379,7 +379,7 @@ class Uart {
Uart() {
init();
send("Uart done!\n");
1fc: 82 e7 ldi r24, 0x72 ; 114
1fc: 83 e7 ldi r24, 0x73 ; 115
1fe: 90 e0 ldi r25, 0x00 ; 0
200: 0c 94 55 00 jmp 0xaa ; 0xaa <_ZN4UartILm9600EE4sendEPKc.isra.2>

39
Mainboard/Mainboard/Debug/Mainboard.map
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@ -393,7 +393,7 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
*(.fini0)
0x000007da _etext = .
.data 0x00800060 0x1e load address 0x000007da
.data 0x00800060 0x20 load address 0x000007da
0x00800060 PROVIDE (__data_start, .)
*(.data)
.data 0x00800060 0x0 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/../../../../avr/lib/avr5/crtm16a.o
@ -416,32 +416,33 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
*(.rodata)
*(.rodata*)
.rodata.str1.1
0x00800061 0x1d Mainboard.o
0x00800061 0x1e Mainboard.o
*(.gnu.linkonce.d*)
0x0080007e . = ALIGN (0x2)
0x0080007e _edata = .
0x0080007e PROVIDE (__data_end, .)
0x00800080 . = ALIGN (0x2)
*fill* 0x0080007f 0x1
0x00800080 _edata = .
0x00800080 PROVIDE (__data_end, .)
.bss 0x0080007e 0x4
0x0080007e PROVIDE (__bss_start, .)
.bss 0x00800080 0x4
0x00800080 PROVIDE (__bss_start, .)
*(.bss)
.bss 0x0080007e 0x4 Mainboard.o
0x0080007e s
0x0080007f m
0x00800080 u
0x00800081 timer
.bss 0x00800080 0x4 Mainboard.o
0x00800080 s
0x00800081 m
0x00800082 u
0x00800083 timer
*(.bss*)
*(COMMON)
0x00800082 PROVIDE (__bss_end, .)
0x00800084 PROVIDE (__bss_end, .)
0x000007da __data_load_start = LOADADDR (.data)
0x000007f8 __data_load_end = (__data_load_start + SIZEOF (.data))
0x000007fa __data_load_end = (__data_load_start + SIZEOF (.data))
.noinit 0x00800082 0x0
0x00800082 PROVIDE (__noinit_start, .)
.noinit 0x00800084 0x0
0x00800084 PROVIDE (__noinit_start, .)
*(.noinit*)
0x00800082 PROVIDE (__noinit_end, .)
0x00800082 _end = .
0x00800082 PROVIDE (__heap_start, .)
0x00800084 PROVIDE (__noinit_end, .)
0x00800084 _end = .
0x00800084 PROVIDE (__heap_start, .)
.eeprom 0x00810000 0x0
*(.eeprom*)

28
Mainboard/Mainboard/Debug/Mainboard.srec
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@ -6,8 +6,8 @@ S11300300C9453000C9453000C9453000C945300F0
S11300400C9453000C9453000C9453000C945300E0
S11300500C945300F80011241FBECFE5D4E0DEBF9A
S1130060CDBF10E0A0E6B0E0EAEDF7E002C00590F5
S11300700D92AE37B107D9F720E0AEE7B0E001C08A
S11300801D92A238B207E1F710E0C6E5D0E004C043
S11300700D92A038B107D9F720E0A0E8B0E001C0A4
S11300801D92A438B207E1F710E0C6E5D0E004C041
S11300902297FE010E940401C435D107C9F70E94CA
S11300A065000C94EB030C940000FC0103C05D9B01
S11300B0FECF8CB981918111FACF089585E083BF79
@ -16,21 +16,21 @@ S11300D0A09A91E085B3892785BB2FEF31EE84E0A8
S11300E0215030408040E1F700C00000F3CF1F9260
S11300F00F920FB60F9211240F931F932F933F93D8
S11301004F935F936F937F938F939F93AF93BF931B
S1130110EF93FF93CF93DF93CDB7DEB72C97DEBF7A
S1130120CDBF80918100813220F48F5F8093810064
S113013044C01092810080917E001F928F93809121
S11301407F001F928F93809160001F928F9381E6AE
S113015090E09F938F931F928CE08F938E010F5F9B
S1130110EF93FF93CF93DF93CDB7DEB72F97DEBF77
S1130120CDBF80918300813220F48F5F8093830060
S113013044C010928300809180001F928F9380911D
S113014081001F928F93809160001F928F9381E6AC
S113015090E09F938F931F928FE08F938E010F5F98
S11301601F4F1F930F930E940801C8010E9455005E
S113017080917E008F5F0FB6F894DEBF0FBECDBFB7
S11301808C3318F480937E0007C010927E00809117
S11301907F008F5F80937F0080917F008C3338F0E5
S11301A010927F00809160008F5F80936000809147
S11301B06000883110F0109260002C960FB6F8940D
S1130170809180008F5F0FB6F894DEBF0FBECDBFB5
S11301808C3318F48093800007C010928000809113
S113019081008F5F80938100809181008C3338F0DF
S11301A010928100809160008F5F80936000809145
S11301B06000883110F0109260002F960FB6F8940A
S11301C0DEBF0FBECDBFDF91CF91FF91EF91BF9105
S11301D0AF919F918F917F916F915F914F913F91DB
S11301E02F911F910F910F900FBE0F901F90189594
S11301F086E080BD539A10BC83E389B982E790E01E
S11301F086E080BD539A10BC83E389B983E790E01D
S11302000C945500EE0FFF1F0590F491E02D099416
S1130210AEE0B0E0EEE0F1E00C94C2030D891E897B
S11302208F89988D26E02C831A83098397FF02C057
@ -126,5 +126,5 @@ S11307B0AA84B984C884DF80EE80FD800C811B810B
S11307C0AA81B981CE0FD11D0FB6F894DEBF0FBE3A
S10D07D0CDBFED010895F894FFCFAA
S11307DA0C74253032643A253032643A2530326456
S11107EA0A005561727420646F6E65210A0066
S11307EA0D0A005561727420646F6E65210A000057
S9030000FC

4
Mainboard/Mainboard/Mainboard.cpp
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@ -53,8 +53,8 @@ uint8_t s = 0;
ISR(TIMER0_OVF_vect) {
if(timer++ > 32) {
timer = 0;
char t[12];
snprintf(t, sizeof(t), "t%02d:%02d:%02d\n", h, m, s);
char t[15];
snprintf(t, sizeof(t), "t%02d:%02d:%02d\r\n", h, m, s);
u.send(t);
s++;
if(s >= 60) {

BIN
Zahl/Zahl.atsuo
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Binary file not shown.

2
Zahl/Zahl/Debug/Makefile
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@ -78,7 +78,7 @@ LIB_DEP+=
./%.o: .././%.cpp
@echo Building file: $<
@echo Invoking: AVR8/GNU C++ Compiler :
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.876\avr8-gnu-toolchain\bin\avr-g++.exe$(QUOTE) -funsigned-char -funsigned-bitfields -DDEBUG -Os -ffunction-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=attiny2313 -c -std=c++11 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o"$@" "$<"
$(QUOTE)C:\Program Files (x86)\Atmel\Atmel Toolchain\AVR8 GCC\Native\3.4.2.876\avr8-gnu-toolchain\bin\avr-g++.exe$(QUOTE) -funsigned-char -funsigned-bitfields -DDEBUG -O3 -ffunction-sections -fpack-struct -fshort-enums -g2 -Wall -mmcu=attiny2313 -c -std=c++11 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o"$@" "$<"
@echo Finished building: $<

BIN
Zahl/Zahl/Debug/Zahl.elf
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Binary file not shown.

73
Zahl/Zahl/Debug/Zahl.hex
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@ -1,31 +1,46 @@
:1000000013C035C034C033C032C031C054C02FC05B
:1000000013C035C034C033C032C031C041C086C017
:100010002EC02DC02CC02BC02AC029C028C027C08C
:1000200026C025C024C09D0011241FBECFEDCDBF2A
:1000300010E0A0E6B0E0E4EAF1E002C005900D9225
:10004000A438B107D9F720E0A4E8B0E001C01D92C0
:10005000A43AB207E1F710E0C8E2D0E003C022976B
:10006000FE019AD0C632D107D1F702D099C0C8CFCD
:100070007894109284008CEA8093850090E002C00E
:1000800080E0982FE0E7F0E003C05D9BFECF8CB9E5
:1000900081918111FACF892F8F5F909384002FE790
:1000A00034E89EE1215030409040E1F700C000006C
:1000B000803130F7E6CF1F920F920FB60F921124C6
:1000C0002F933F934F935F936F938F939F93EF93F0
:1000D000FF9380E00CC0E0918400F0E0EC57FF4F0C
:1000E000928198BB96E09A95F1F700C08F5F90914E
:1000F0008500891780F360E04FEF50E006C018BA22
:10010000E6E0EA95F1F700C06F5F262F30E08091BE
:100110008500FA01E81BF1092E173F0784F3FF91D0
:10012000EF919F918F916F915F914F913F912F919F
:100130000F900FBE0F901F9018951092960010927E
:100140009700789486E083B988E08AB912B881E88C
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:1000800095008FE493EC0197F1F700C00000F1CFE9
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:1000C000928198BB96E09A95F1F700C08F5F90916E
:1000D0009500891780F39F3F99F060E04FEF50E063
:1000E00018BAE6E0EA95F1F700C06F5F262F30E01E
:1000F00080919500FA01E81BF1092E173F0784F360
:10010000FF91EF919F918F916F915F914F913F91EF
:100110002F910F900FBE0F901F9018951F920F9266
:100120000FB60F9211242F933F934F938F939F936A
:10013000EF93FF938CB18A3039F08D3029F0909194
:10014000A8009F3008F43FC08091A900843709F4CB
:1001500060C08091A900843609F441C0EAE7F0E06C
:1001600087E55D9BFECF8CB981918111FACF80919B
:10017000A600805D5D9BFECF8CB9E1E7F0E080E2F8
:100180005D9BFECF8CB981918111FACF8091A70040
:10019000805D5D9BFECF8CB9E2E9F0E08DE05D9B78
:1001A000FECF8CB981918111FACF1092A800FF91F6
:1001B000EF919F918F914F913F912F910F900FBE93
:1001C0000F901F901895E091A800F0E0EA55FF4FBE
:1001D00083838091A8008F5F8093A800E8CF30913F
:1001E000AA004091AB008091AC00805D232F220FCC
:1001F000230F922F9295990F907E920F930F890F54
:10020000942F990F990F940F990F890F8093A7003E
:10021000A5CF8091AB0080538093A6009ACF109217
:10022000A6001092A7001092A800789486E083B9E7
:1002300088E98AB912B881E889B9E8E8F0E085E58B
:100240005D9BFECF8CB981918111FACF1092940001
:100250001092950080E1E0E6F0E0A6E9B0E00190C0
:100260000D928A95E1F78FE787BB10BE83E083BFCD
:1002700012BE16BE1CBE82E089BF0895EE0FFF1F9E
:0C0280000590F491E02D0994F894FFCF54
:10028C007B036E4F175D7D0B7F5F3F7578677C3C02
:10029C00204C696768743A200057657274653A207F
:1002AC0054696D653A20005561727420646F6E65F7
:0402BC00210D0A0006
:00000001FF

661
Zahl/Zahl/Debug/Zahl.lss
View File

@ -3,33 +3,33 @@ Zahl.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000001a4 00000000 00000000 00000094 2**1
0 .text 0000028c 00000000 00000000 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000024 00800060 000001a4 00000238 2**0
1 .data 00000034 00800060 0000028c 00000320 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 00000020 00800084 00800084 0000025c 2**0
2 .bss 00000024 00800094 00800094 00000354 2**0
ALLOC
3 .stab 000006b4 00000000 00000000 0000025c 2**2
3 .stab 000006b4 00000000 00000000 00000354 2**2
CONTENTS, READONLY, DEBUGGING
4 .stabstr 00000082 00000000 00000000 00000910 2**0
4 .stabstr 00000082 00000000 00000000 00000a08 2**0
CONTENTS, READONLY, DEBUGGING
5 .comment 0000002f 00000000 00000000 00000992 2**0
5 .comment 0000002f 00000000 00000000 00000a8a 2**0
CONTENTS, READONLY
6 .debug_aranges 00000030 00000000 00000000 000009c1 2**0
6 .debug_aranges 00000038 00000000 00000000 00000ab9 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_info 00000961 00000000 00000000 000009f1 2**0
7 .debug_info 00000bac 00000000 00000000 00000af1 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_abbrev 00000333 00000000 00000000 00001352 2**0
8 .debug_abbrev 00000369 00000000 00000000 0000169d 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_line 00000230 00000000 00000000 00001685 2**0
9 .debug_line 00000285 00000000 00000000 00001a06 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_frame 0000007c 00000000 00000000 000018b8 2**2
10 .debug_frame 000000bc 00000000 00000000 00001c8c 2**2
CONTENTS, READONLY, DEBUGGING
11 .debug_str 00000441 00000000 00000000 00001934 2**0
11 .debug_str 00000498 00000000 00000000 00001d48 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 00000299 00000000 00000000 00001d75 2**0
12 .debug_loc 000002b1 00000000 00000000 000021e0 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000020 00000000 00000000 0000200e 2**0
13 .debug_ranges 00000098 00000000 00000000 00002491 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
@ -41,8 +41,8 @@ Disassembly of section .text:
6: 33 c0 rjmp .+102 ; 0x6e <__bad_interrupt>
8: 32 c0 rjmp .+100 ; 0x6e <__bad_interrupt>
a: 31 c0 rjmp .+98 ; 0x6e <__bad_interrupt>
c: 54 c0 rjmp .+168 ; 0xb6 <__vector_6>
e: 2f c0 rjmp .+94 ; 0x6e <__bad_interrupt>
c: 41 c0 rjmp .+130 ; 0x90 <__vector_6>
e: 86 c0 rjmp .+268 ; 0x11c <__vector_7>
10: 2e c0 rjmp .+92 ; 0x6e <__bad_interrupt>
12: 2d c0 rjmp .+90 ; 0x6e <__bad_interrupt>
14: 2c c0 rjmp .+88 ; 0x6e <__bad_interrupt>
@ -56,7 +56,7 @@ Disassembly of section .text:
24: 24 c0 rjmp .+72 ; 0x6e <__bad_interrupt>
00000026 <__ctors_start>:
26: 9d 00 .word 0x009d ; ????
26: 0f 01 movw r0, r30
00000028 <__ctors_end>:
28: 11 24 eor r1, r1
@ -68,18 +68,18 @@ Disassembly of section .text:
30: 10 e0 ldi r17, 0x00 ; 0
32: a0 e6 ldi r26, 0x60 ; 96
34: b0 e0 ldi r27, 0x00 ; 0
36: e4 ea ldi r30, 0xA4 ; 164
38: f1 e0 ldi r31, 0x01 ; 1
36: ec e8 ldi r30, 0x8C ; 140
38: f2 e0 ldi r31, 0x02 ; 2
3a: 02 c0 rjmp .+4 ; 0x40 <__SREG__+0x1>
3c: 05 90 lpm r0, Z+
3e: 0d 92 st X+, r0
40: a4 38 cpi r26, 0x84 ; 132
40: a4 39 cpi r26, 0x94 ; 148
42: b1 07 cpc r27, r17
44: d9 f7 brne .-10 ; 0x3c <__do_copy_data+0xc>
00000046 <__do_clear_bss>:
46: 20 e0 ldi r18, 0x00 ; 0
48: a4 e8 ldi r26, 0x84 ; 132
48: a4 e9 ldi r26, 0x94 ; 148
4a: b0 e0 ldi r27, 0x00 ; 0
4c: 01 c0 rjmp .+2 ; 0x50 <.do_clear_bss_start>
@ -87,7 +87,7 @@ Disassembly of section .text:
4e: 1d 92 st X+, r1
00000050 <.do_clear_bss_start>:
50: a4 3a cpi r26, 0xA4 ; 164
50: a8 3b cpi r26, 0xB8 ; 184
52: b2 07 cpc r27, r18
54: e1 f7 brne .-8 ; 0x4e <.do_clear_bss_loop>
@ -98,12 +98,12 @@ Disassembly of section .text:
5c: 03 c0 rjmp .+6 ; 0x64 <__do_global_ctors+0xe>
5e: 22 97 sbiw r28, 0x02 ; 2
60: fe 01 movw r30, r28
62: 9a d0 rcall .+308 ; 0x198 <__tablejump__>
62: 0e d1 rcall .+540 ; 0x280 <__tablejump__>
64: c6 32 cpi r28, 0x26 ; 38
66: d1 07 cpc r29, r17
68: d1 f7 brne .-12 ; 0x5e <__do_global_ctors+0x8>
6a: 02 d0 rcall .+4 ; 0x70 <main>
6c: 99 c0 rjmp .+306 ; 0x1a0 <_exit>
6c: 0d c1 rjmp .+538 ; 0x288 <_exit>
0000006e <__bad_interrupt>:
6e: c8 cf rjmp .-112 ; 0x0 <__vectors>
@ -116,297 +116,514 @@ int main(void)
{
sei();
70: 78 94 sei
}
uint8_t getDig() {
return number;
}
uint8_t getDim() {
return dimmer;
72: 80 91 a7 00 lds r24, 0x00A7
public:
Led() {
init();
}
void setNum(uint8_t number) {
this->diget = number;
72: 10 92 84 00 sts 0x0084, r1
76: 90 91 a6 00 lds r25, 0x00A6
7a: 90 93 94 00 sts 0x0094, r25
}
void setDim(uint8_t dimmer) {
this->dim = dimmer;
76: 8c ea ldi r24, 0xAC ; 172
78: 80 93 85 00 sts 0x0085, r24
l.setNum(0);
l.setDim(0xAC);
uint8_t i = 0;
7c: 90 e0 ldi r25, 0x00 ; 0
7e: 02 c0 rjmp .+4 ; 0x84 <main+0x14>
{
u.send("bla..\n");
l.setNum(i++);
_delay_ms(500);
if(i > 15) {
i = 0;
80: 80 e0 ldi r24, 0x00 ; 0
82: 98 2f mov r25, r24
84: e0 e7 ldi r30, 0x70 ; 112
86: f0 e0 ldi r31, 0x00 ; 0
88: 03 c0 rjmp .+6 ; 0x90 <main+0x20>
UCSRB = /*(1<<RXEN1) | / (1<<RXCIE) | */ (1<<TXEN); //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1; //Teiler wird gesetzt
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); //Ausgabe des Zeichens
8a: 5d 9b sbis 0x0b, 5 ; 11
8c: fe cf rjmp .-4 ; 0x8a <main+0x1a>
UDR = c;
8e: 8c b9 out 0x0c, r24 ; 12
sei();
init();
send("Uart done!\n");
}
void send(const char *text) {
while (*text)
90: 81 91 ld r24, Z+
92: 81 11 cpse r24, r1
94: fa cf rjmp .-12 ; 0x8a <main+0x1a>
l.setDim(0xAC);
uint8_t i = 0;
while(1)
{
u.send("bla..\n");
l.setNum(i++);
96: 89 2f mov r24, r25
98: 8f 5f subi r24, 0xFF ; 255
public:
Led() {
init();
}
void setNum(uint8_t number) {
this->diget = number;
9a: 90 93 84 00 sts 0x0084, r25
7e: 80 93 95 00 sts 0x0095, r24
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
9e: 2f e7 ldi r18, 0x7F ; 127
a0: 34 e8 ldi r19, 0x84 ; 132
a2: 9e e1 ldi r25, 0x1E ; 30
a4: 21 50 subi r18, 0x01 ; 1
a6: 30 40 sbci r19, 0x00 ; 0
a8: 90 40 sbci r25, 0x00 ; 0
aa: e1 f7 brne .-8 ; 0xa4 <main+0x34>
ac: 00 c0 rjmp .+0 ; 0xae <main+0x3e>
ae: 00 00 nop
_delay_ms(500);
if(i > 15) {
b0: 80 31 cpi r24, 0x10 ; 16
b2: 30 f7 brcc .-52 ; 0x80 <main+0x10>
b4: e6 cf rjmp .-52 ; 0x82 <main+0x12>
82: 8f e4 ldi r24, 0x4F ; 79
84: 93 ec ldi r25, 0xC3 ; 195
86: 01 97 sbiw r24, 0x01 ; 1
88: f1 f7 brne .-4 ; 0x86 <main+0x16>
8a: 00 c0 rjmp .+0 ; 0x8c <main+0x1c>
8c: 00 00 nop
8e: f1 cf rjmp .-30 ; 0x72 <main+0x2>
000000b6 <__vector_6>:
00000090 <__vector_6>:
i = 0;
}
}*/
}
}
ISR(TIMER0_OVF_vect) {
b6: 1f 92 push r1
b8: 0f 92 push r0
ba: 0f b6 in r0, 0x3f ; 63
bc: 0f 92 push r0
be: 11 24 eor r1, r1
c0: 2f 93 push r18
c2: 3f 93 push r19
c4: 4f 93 push r20
c6: 5f 93 push r21
c8: 6f 93 push r22
ca: 8f 93 push r24
cc: 9f 93 push r25
ce: ef 93 push r30
d0: ff 93 push r31
90: 1f 92 push r1
92: 0f 92 push r0
94: 0f b6 in r0, 0x3f ; 63
96: 0f 92 push r0
98: 11 24 eor r1, r1
9a: 2f 93 push r18
9c: 3f 93 push r19
9e: 4f 93 push r20
a0: 5f 93 push r21
a2: 6f 93 push r22
a4: 8f 93 push r24
a6: 9f 93 push r25
a8: ef 93 push r30
aa: ff 93 push r31
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=(0<<TOIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<ICIE1) | (0<<OCIE0B) | (1<<TOIE0) | (0<<OCIE0A);
}
/* TIMER0_OVF_vect */
void timer() {
for(uint8_t k=0;k<this->dim;k++) {
d2: 80 e0 ldi r24, 0x00 ; 0
d4: 0c c0 rjmp .+24 ; 0xee <__stack+0xf>
ac: 80 91 95 00 lds r24, 0x0095
b0: 88 23 and r24, r24
b2: 99 f0 breq .+38 ; 0xda <__vector_6+0x4a>
b4: 80 e0 ldi r24, 0x00 ; 0
Port::port(segs[this->diget]);
d6: e0 91 84 00 lds r30, 0x0084
da: f0 e0 ldi r31, 0x00 ; 0
dc: ec 57 subi r30, 0x7C ; 124
de: ff 4f sbci r31, 0xFF ; 255
e0: 92 81 ldd r25, Z+2 ; 0x02
b6: e0 91 94 00 lds r30, 0x0094
ba: f0 e0 ldi r31, 0x00 ; 0
bc: ec 56 subi r30, 0x6C ; 108
be: ff 4f sbci r31, 0xFF ; 255
c0: 92 81 ldd r25, Z+2 ; 0x02
namespace avrlib {
struct portb
{
static uint8_t port() { return PORTB; }
static void port(uint8_t v) { PORTB = v; }
e2: 98 bb out 0x18, r25 ; 24
c2: 98 bb out 0x18, r25 ; 24
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
e4: 96 e0 ldi r25, 0x06 ; 6
e6: 9a 95 dec r25
e8: f1 f7 brne .-4 ; 0xe6 <__stack+0x7>
ea: 00 c0 rjmp .+0 ; 0xec <__stack+0xd>
c4: 96 e0 ldi r25, 0x06 ; 6
c6: 9a 95 dec r25
c8: f1 f7 brne .-4 ; 0xc6 <__vector_6+0x36>
ca: 00 c0 rjmp .+0 ; 0xcc <__vector_6+0x3c>
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=(0<<TOIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<ICIE1) | (0<<OCIE0B) | (1<<TOIE0) | (0<<OCIE0A);
}
/* TIMER0_OVF_vect */
void timer() {
for(uint8_t k=0;k<this->dim;k++) {
ec: 8f 5f subi r24, 0xFF ; 255
ee: 90 91 85 00 lds r25, 0x0085
f2: 89 17 cp r24, r25
f4: 80 f3 brcs .-32 ; 0xd6 <__vector_6+0x20>
f6: 60 e0 ldi r22, 0x00 ; 0
cc: 8f 5f subi r24, 0xFF ; 255
ce: 90 91 95 00 lds r25, 0x0095
d2: 89 17 cp r24, r25
d4: 80 f3 brcs .-32 ; 0xb6 <__vector_6+0x26>
Port::port(segs[this->diget]);
_delay_us(1);
}
for(uint8_t k=0;k<255-this->dim;k++) {
f8: 4f ef ldi r20, 0xFF ; 255
fa: 50 e0 ldi r21, 0x00 ; 0
fc: 06 c0 rjmp .+12 ; 0x10a <__stack+0x2b>
fe: 18 ba out 0x18, r1 ; 24
100: e6 e0 ldi r30, 0x06 ; 6
102: ea 95 dec r30
104: f1 f7 brne .-4 ; 0x102 <__stack+0x23>
106: 00 c0 rjmp .+0 ; 0x108 <__stack+0x29>
108: 6f 5f subi r22, 0xFF ; 255
10a: 26 2f mov r18, r22
10c: 30 e0 ldi r19, 0x00 ; 0
10e: 80 91 85 00 lds r24, 0x0085
112: fa 01 movw r30, r20
114: e8 1b sub r30, r24
116: f1 09 sbc r31, r1
118: 2e 17 cp r18, r30
11a: 3f 07 cpc r19, r31
11c: 84 f3 brlt .-32 ; 0xfe <__stack+0x1f>
d6: 9f 3f cpi r25, 0xFF ; 255
d8: 99 f0 breq .+38 ; 0x100 <__stack+0x21>
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=(0<<TOIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<ICIE1) | (0<<OCIE0B) | (1<<TOIE0) | (0<<OCIE0A);
}
/* TIMER0_OVF_vect */
void timer() {
for(uint8_t k=0;k<this->dim;k++) {
da: 60 e0 ldi r22, 0x00 ; 0
Port::port(segs[this->diget]);
_delay_us(1);
}
for(uint8_t k=0;k<255-this->dim;k++) {
dc: 4f ef ldi r20, 0xFF ; 255
de: 50 e0 ldi r21, 0x00 ; 0
e0: 18 ba out 0x18, r1 ; 24
e2: e6 e0 ldi r30, 0x06 ; 6
e4: ea 95 dec r30
e6: f1 f7 brne .-4 ; 0xe4 <__stack+0x5>
e8: 00 c0 rjmp .+0 ; 0xea <__stack+0xb>
ea: 6f 5f subi r22, 0xFF ; 255
ec: 26 2f mov r18, r22
ee: 30 e0 ldi r19, 0x00 ; 0
f0: 80 91 95 00 lds r24, 0x0095
f4: fa 01 movw r30, r20
f6: e8 1b sub r30, r24
f8: f1 09 sbc r31, r1
fa: 2e 17 cp r18, r30
fc: 3f 07 cpc r19, r31
fe: 84 f3 brlt .-32 ; 0xe0 <__stack+0x1>
l.timer();
}
11e: ff 91 pop r31
120: ef 91 pop r30
122: 9f 91 pop r25
124: 8f 91 pop r24
126: 6f 91 pop r22
128: 5f 91 pop r21
12a: 4f 91 pop r20
12c: 3f 91 pop r19
12e: 2f 91 pop r18
130: 0f 90 pop r0
132: 0f be out 0x3f, r0 ; 63
134: 0f 90 pop r0
136: 1f 90 pop r1
138: 18 95 reti
100: ff 91 pop r31
102: ef 91 pop r30
104: 9f 91 pop r25
106: 8f 91 pop r24
108: 6f 91 pop r22
10a: 5f 91 pop r21
10c: 4f 91 pop r20
10e: 3f 91 pop r19
110: 2f 91 pop r18
112: 0f 90 pop r0
114: 0f be out 0x3f, r0 ; 63
116: 0f 90 pop r0
118: 1f 90 pop r1
11a: 18 95 reti
0000013a <_GLOBAL__sub_I_u>:
0000011c <__vector_7>:
ISR(USART_RX_vect) {
11c: 1f 92 push r1
11e: 0f 92 push r0
120: 0f b6 in r0, 0x3f ; 63
122: 0f 92 push r0
124: 11 24 eor r1, r1
126: 2f 93 push r18
128: 3f 93 push r19
12a: 4f 93 push r20
12c: 8f 93 push r24
12e: 9f 93 push r25
130: ef 93 push r30
132: ff 93 push r31
uart_putchar(text);
}
/* USART_RX_vect */
void interrupt() {
char nextChar;
nextChar = UDR;
134: 8c b1 in r24, 0x0c ; 12
if( nextChar != '\n' && nextChar != '\r' && uart_str_count < UART_MAXSTRLEN) {
136: 8a 30 cpi r24, 0x0A ; 10
138: 39 f0 breq .+14 ; 0x148 <__vector_7+0x2c>
13a: 8d 30 cpi r24, 0x0D ; 13
13c: 29 f0 breq .+10 ; 0x148 <__vector_7+0x2c>
13e: 90 91 a8 00 lds r25, 0x00A8
142: 9f 30 cpi r25, 0x0F ; 15
144: 08 f4 brcc .+2 ; 0x148 <__vector_7+0x2c>
146: 3f c0 rjmp .+126 ; 0x1c6 <__vector_7+0xaa>
uart_string[uart_str_count] = nextChar;
uart_str_count++;
//send(nextChar);
} else {
//send("\r\n");
if(uart_string[0] == 't') {
148: 80 91 a9 00 lds r24, 0x00A9
14c: 84 37 cpi r24, 0x74 ; 116
14e: 09 f4 brne .+2 ; 0x152 <__vector_7+0x36>
150: 60 c0 rjmp .+192 ; 0x212 <__vector_7+0xf6>
number = uart_string[diget]-0x30;
}
if(uart_string[0] == 'd') {
152: 80 91 a9 00 lds r24, 0x00A9
156: 84 36 cpi r24, 0x64 ; 100
158: 09 f4 brne .+2 ; 0x15c <__vector_7+0x40>
15a: 41 c0 rjmp .+130 ; 0x1de <__vector_7+0xc2>
15c: ea e7 ldi r30, 0x7A ; 122
15e: f0 e0 ldi r31, 0x00 ; 0
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
160: 87 e5 ldi r24, 0x57 ; 87
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
162: 5d 9b sbis 0x0b, 5 ; 11
164: fe cf rjmp .-4 ; 0x162 <__vector_7+0x46>
UDR = c;
166: 8c b9 out 0x0c, r24 ; 12
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
168: 81 91 ld r24, Z+
16a: 81 11 cpse r24, r1
16c: fa cf rjmp .-12 ; 0x162 <__vector_7+0x46>
}
if(uart_string[0] == 'd') {
dimmer = (uart_string[1]-0x30)*100 + (uart_string[2]-0x30)*10 + (uart_string[3]-0x30)*1;
}
send("Werte: Time: ");
send(number+0x30);
16e: 80 91 a6 00 lds r24, 0x00A6
172: 80 5d subi r24, 0xD0 ; 208
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
174: 5d 9b sbis 0x0b, 5 ; 11
176: fe cf rjmp .-4 ; 0x174 <__vector_7+0x58>
UDR = c;
178: 8c b9 out 0x0c, r24 ; 12
17a: e1 e7 ldi r30, 0x71 ; 113
17c: f0 e0 ldi r31, 0x00 ; 0
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
17e: 80 e2 ldi r24, 0x20 ; 32
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
180: 5d 9b sbis 0x0b, 5 ; 11
182: fe cf rjmp .-4 ; 0x180 <__vector_7+0x64>
UDR = c;
184: 8c b9 out 0x0c, r24 ; 12
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
186: 81 91 ld r24, Z+
188: 81 11 cpse r24, r1
18a: fa cf rjmp .-12 ; 0x180 <__vector_7+0x64>
dimmer = (uart_string[1]-0x30)*100 + (uart_string[2]-0x30)*10 + (uart_string[3]-0x30)*1;
}
send("Werte: Time: ");
send(number+0x30);
send(" Light: ");
send(dimmer+0x30);
18c: 80 91 a7 00 lds r24, 0x00A7
190: 80 5d subi r24, 0xD0 ; 208
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
192: 5d 9b sbis 0x0b, 5 ; 11
194: fe cf rjmp .-4 ; 0x192 <__vector_7+0x76>
UDR = c;
196: 8c b9 out 0x0c, r24 ; 12
198: e2 e9 ldi r30, 0x92 ; 146
19a: f0 e0 ldi r31, 0x00 ; 0
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
19c: 8d e0 ldi r24, 0x0D ; 13
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
19e: 5d 9b sbis 0x0b, 5 ; 11
1a0: fe cf rjmp .-4 ; 0x19e <__vector_7+0x82>
UDR = c;
1a2: 8c b9 out 0x0c, r24 ; 12
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
1a4: 81 91 ld r24, Z+
1a6: 81 11 cpse r24, r1
1a8: fa cf rjmp .-12 ; 0x19e <__vector_7+0x82>
send("Werte: Time: ");
send(number+0x30);
send(" Light: ");
send(dimmer+0x30);
send("\r\n");
uart_str_count = 0;
1aa: 10 92 a8 00 sts 0x00A8, r1
u.interrupt();
1ae: ff 91 pop r31
1b0: ef 91 pop r30
1b2: 9f 91 pop r25
1b4: 8f 91 pop r24
1b6: 4f 91 pop r20
1b8: 3f 91 pop r19
1ba: 2f 91 pop r18
1bc: 0f 90 pop r0
1be: 0f be out 0x3f, r0 ; 63
1c0: 0f 90 pop r0
1c2: 1f 90 pop r1
1c4: 18 95 reti
void interrupt() {
char nextChar;
nextChar = UDR;
if( nextChar != '\n' && nextChar != '\r' && uart_str_count < UART_MAXSTRLEN) {
uart_string[uart_str_count] = nextChar;
1c6: e0 91 a8 00 lds r30, 0x00A8
1ca: f0 e0 ldi r31, 0x00 ; 0
1cc: ea 55 subi r30, 0x5A ; 90
1ce: ff 4f sbci r31, 0xFF ; 255
1d0: 83 83 std Z+3, r24 ; 0x03
uart_str_count++;
1d2: 80 91 a8 00 lds r24, 0x00A8
1d6: 8f 5f subi r24, 0xFF ; 255
1d8: 80 93 a8 00 sts 0x00A8, r24
1dc: e8 cf rjmp .-48 ; 0x1ae <__vector_7+0x92>
//send("\r\n");
if(uart_string[0] == 't') {
number = uart_string[diget]-0x30;
}
if(uart_string[0] == 'd') {
dimmer = (uart_string[1]-0x30)*100 + (uart_string[2]-0x30)*10 + (uart_string[3]-0x30)*1;
1de: 30 91 aa 00 lds r19, 0x00AA
1e2: 40 91 ab 00 lds r20, 0x00AB
1e6: 80 91 ac 00 lds r24, 0x00AC
1ea: 80 5d subi r24, 0xD0 ; 208
1ec: 23 2f mov r18, r19
1ee: 22 0f add r18, r18
1f0: 23 0f add r18, r19
1f2: 92 2f mov r25, r18
1f4: 92 95 swap r25
1f6: 99 0f add r25, r25
1f8: 90 7e andi r25, 0xE0 ; 224
1fa: 92 0f add r25, r18
1fc: 93 0f add r25, r19
1fe: 89 0f add r24, r25
200: 94 2f mov r25, r20
202: 99 0f add r25, r25
204: 99 0f add r25, r25
206: 94 0f add r25, r20
208: 99 0f add r25, r25
20a: 89 0f add r24, r25
20c: 80 93 a7 00 sts 0x00A7, r24
210: a5 cf rjmp .-182 ; 0x15c <__vector_7+0x40>
uart_str_count++;
//send(nextChar);
} else {
//send("\r\n");
if(uart_string[0] == 't') {
number = uart_string[diget]-0x30;
212: 80 91 ab 00 lds r24, 0x00AB
216: 80 53 subi r24, 0x30 ; 48
218: 80 93 a6 00 sts 0x00A6, r24
21c: 9a cf rjmp .-204 ; 0x152 <__vector_7+0x36>
0000021e <_GLOBAL__sub_I_u>:
#include <avr/interrupt.h>
template <uint32_t baudrate, uint8_t diget>
class Uart {
public:
Uart() {
13a: 10 92 96 00 sts 0x0096, r1
13e: 10 92 97 00 sts 0x0097, r1
21e: 10 92 a6 00 sts 0x00A6, r1
222: 10 92 a7 00 sts 0x00A7, r1
226: 10 92 a8 00 sts 0x00A8, r1
sei();
142: 78 94 sei
uint8_t number = 0;
static const uint8_t UART_MAXSTRLEN = 12;
uint8_t uart_str_count = 0;
uint8_t uart_string[UART_MAXSTRLEN];
22a: 78 94 sei
uint8_t dimmer = 0;
static const uint8_t UART_MAXSTRLEN = 15;
volatile uint8_t uart_str_count = 0;
volatile char uart_string[UART_MAXSTRLEN];
void init() {
UCSRC = (1 << UCSZ1) | (1 << UCSZ0); //8N1
144: 86 e0 ldi r24, 0x06 ; 6
146: 83 b9 out 0x03, r24 ; 3
UCSRB = /*(1<<RXEN1) | / (1<<RXCIE) | */ (1<<TXEN); //Enable TXEN im Register UCR TX-Data Enable
148: 88 e0 ldi r24, 0x08 ; 8
14a: 8a b9 out 0x0a, r24 ; 10
UCSRC = (1<<UCSZ1) | (1<<UCSZ0) /* 8-Bit */ | (0<<UPM1) | (0<<UPM0) /* No Parity */ | (0<<UMSEL) /* Asyncron */;
22c: 86 e0 ldi r24, 0x06 ; 6
22e: 83 b9 out 0x03, r24 ; 3
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
230: 88 e9 ldi r24, 0x98 ; 152
232: 8a b9 out 0x0a, r24 ; 10
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
14c: 12 b8 out 0x02, r1 ; 2
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1; //Teiler wird gesetzt
14e: 81 e8 ldi r24, 0x81 ; 129
150: 89 b9 out 0x09, r24 ; 9
152: e7 e7 ldi r30, 0x77 ; 119
154: f0 e0 ldi r31, 0x00 ; 0
156: 03 c0 rjmp .+6 ; 0x15e <_GLOBAL__sub_I_u+0x24>
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); //Ausgabe des Zeichens
158: 5d 9b sbis 0x0b, 5 ; 11
15a: fe cf rjmp .-4 ; 0x158 <_GLOBAL__sub_I_u+0x1e>
UDR = c;
15c: 8c b9 out 0x0c, r24 ; 12
234: 12 b8 out 0x02, r1 ; 2
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
236: 81 e8 ldi r24, 0x81 ; 129
238: 89 b9 out 0x09, r24 ; 9
23a: e8 e8 ldi r30, 0x88 ; 136
23c: f0 e0 ldi r31, 0x00 ; 0
sei();
init();
send("Uart done!\n");
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
15e: 81 91 ld r24, Z+
160: 81 11 cpse r24, r1
162: fa cf rjmp .-12 ; 0x158 <_GLOBAL__sub_I_u+0x1e>
23e: 85 e5 ldi r24, 0x55 ; 85
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
240: 5d 9b sbis 0x0b, 5 ; 11
242: fe cf rjmp .-4 ; 0x240 <_GLOBAL__sub_I_u+0x22>
UDR = c;
244: 8c b9 out 0x0c, r24 ; 12
sei();
init();
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
246: 81 91 ld r24, Z+
248: 81 11 cpse r24, r1
24a: fa cf rjmp .-12 ; 0x240 <_GLOBAL__sub_I_u+0x22>
#include <util/delay.h>
template <typename Port>
class Led {
public:
Led() {
164: 10 92 84 00 sts 0x0084, r1
168: 10 92 85 00 sts 0x0085, r1
16c: 80 e1 ldi r24, 0x10 ; 16
16e: e0 e6 ldi r30, 0x60 ; 96
170: f0 e0 ldi r31, 0x00 ; 0
172: a6 e8 ldi r26, 0x86 ; 134
174: b0 e0 ldi r27, 0x00 ; 0
176: 01 90 ld r0, Z+
178: 0d 92 st X+, r0
17a: 8a 95 dec r24
17c: e1 f7 brne .-8 ; 0x176 <_GLOBAL__sub_I_u+0x3c>
24c: 10 92 94 00 sts 0x0094, r1
250: 10 92 95 00 sts 0x0095, r1
254: 80 e1 ldi r24, 0x10 ; 16
256: e0 e6 ldi r30, 0x60 ; 96
258: f0 e0 ldi r31, 0x00 ; 0
25a: a6 e9 ldi r26, 0x96 ; 150
25c: b0 e0 ldi r27, 0x00 ; 0
25e: 01 90 ld r0, Z+
260: 0d 92 st X+, r0
262: 8a 95 dec r24
264: e1 f7 brne .-8 ; 0x25e <_GLOBAL__sub_I_u+0x40>
static uint8_t pin() { return PINB; }
static void pin(uint8_t v) { PINB = v; }
static uint8_t dir() { return DDRB; }
static void dir(uint8_t v) { DDRB = v; }
17e: 8f e7 ldi r24, 0x7F ; 127
180: 87 bb out 0x17, r24 ; 23
266: 8f e7 ldi r24, 0x7F ; 127
268: 87 bb out 0x17, r24 ; 23
// Clock value: 312,500 kHz
// Mode: Normal top=0xFF
// OC0A output: Disconnected
// OC0B output: Disconnected
// Timer Period: 0,8192 ms
TCCR0A=(0<<COM0A1) | (0<<COM0A0) | (0<<COM0B1) | (0<<COM0B0) | (0<<WGM01) | (0<<WGM00);
182: 10 be out 0x30, r1 ; 48
26a: 10 be out 0x30, r1 ; 48
TCCR0B=(0<<WGM02) | (0<<CS02) | (1<<CS01) | (1<<CS00);
184: 83 e0 ldi r24, 0x03 ; 3
186: 83 bf out 0x33, r24 ; 51
26c: 83 e0 ldi r24, 0x03 ; 3
26e: 83 bf out 0x33, r24 ; 51
TCNT0=0x00;
188: 12 be out 0x32, r1 ; 50
270: 12 be out 0x32, r1 ; 50
OCR0A=0x00;
18a: 16 be out 0x36, r1 ; 54
272: 16 be out 0x36, r1 ; 54
OCR0B=0x00;
18c: 1c be out 0x3c, r1 ; 60
274: 1c be out 0x3c, r1 ; 60
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=(0<<TOIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<ICIE1) | (0<<OCIE0B) | (1<<TOIE0) | (0<<OCIE0A);
18e: 82 e0 ldi r24, 0x02 ; 2
190: 89 bf out 0x39, r24 ; 57
192: 08 95 ret
276: 82 e0 ldi r24, 0x02 ; 2
278: 89 bf out 0x39, r24 ; 57
27a: 08 95 ret
00000194 <__tablejump2__>:
194: ee 0f add r30, r30
196: ff 1f adc r31, r31
0000027c <__tablejump2__>:
27c: ee 0f add r30, r30
27e: ff 1f adc r31, r31
00000198 <__tablejump__>:
198: 05 90 lpm r0, Z+
19a: f4 91 lpm r31, Z
19c: e0 2d mov r30, r0
19e: 09 94 ijmp
00000280 <__tablejump__>:
280: 05 90 lpm r0, Z+
282: f4 91 lpm r31, Z
284: e0 2d mov r30, r0
286: 09 94 ijmp
000001a0 <_exit>:
1a0: f8 94 cli
00000288 <_exit>:
288: f8 94 cli
000001a2 <__stop_program>:
1a2: ff cf rjmp .-2 ; 0x1a2 <__stop_program>
0000028a <__stop_program>:
28a: ff cf rjmp .-2 ; 0x28a <__stop_program>

104
Zahl/Zahl/Debug/Zahl.map
View File

@ -195,7 +195,7 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
.rela.plt
*(.rela.plt)
.text 0x00000000 0x1a4
.text 0x00000000 0x28c
*(.vectors)
.vectors 0x00000000 0x26 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/../../../../avr/lib/avr25/tiny-stack/crttn2313.o
0x00000000 __vector_default
@ -261,7 +261,6 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
0x0000006e __vector_11
0x0000006e __vector_13
0x0000006e __vector_17
0x0000006e __vector_7
0x0000006e __vector_5
0x0000006e __vector_4
0x0000006e __vector_9
@ -275,21 +274,24 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
0x00000070 . = ALIGN (0x2)
*(.text.*)
.text.startup.main
0x00000070 0x46 Zahl.o
0x00000070 0x20 Zahl.o
0x00000070 main
.text.__vector_6
0x000000b6 0x84 Zahl.o
0x000000b6 __vector_6
0x00000090 0x8c Zahl.o
0x00000090 __vector_6
.text.__vector_7
0x0000011c 0x102 Zahl.o
0x0000011c __vector_7
.text.startup._GLOBAL__sub_I_u
0x0000013a 0x5a Zahl.o
.text.libgcc 0x00000194 0xc c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/avr25/tiny-stack\libgcc.a(_tablejump.o)
0x00000194 __tablejump2__
0x00000198 __tablejump__
0x000001a0 . = ALIGN (0x2)
0x0000021e 0x5e Zahl.o
.text.libgcc 0x0000027c 0xc c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/avr25/tiny-stack\libgcc.a(_tablejump.o)
0x0000027c __tablejump2__
0x00000280 __tablejump__
0x00000288 . = ALIGN (0x2)
*(.fini9)
.fini9 0x000001a0 0x0 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/avr25/tiny-stack\libgcc.a(_exit.o)
0x000001a0 _exit
0x000001a0 exit
.fini9 0x00000288 0x0 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/avr25/tiny-stack\libgcc.a(_exit.o)
0x00000288 _exit
0x00000288 exit
*(.fini9)
*(.fini8)
*(.fini8)
@ -308,11 +310,11 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
*(.fini1)
*(.fini1)
*(.fini0)
.fini0 0x000001a0 0x4 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/avr25/tiny-stack\libgcc.a(_exit.o)
.fini0 0x00000288 0x4 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/avr25/tiny-stack\libgcc.a(_exit.o)
*(.fini0)
0x000001a4 _etext = .
0x0000028c _etext = .
.data 0x00800060 0x24 load address 0x000001a4
.data 0x00800060 0x34 load address 0x0000028c
0x00800060 PROVIDE (__data_start, .)
*(.data)
.data 0x00800060 0x0 c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.7.2/../../../../avr/lib/avr25/tiny-stack/crttn2313.o
@ -327,31 +329,31 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
.rodata 0x00800060 0x10 Zahl.o
*(.rodata*)
.rodata.str1.1
0x00800070 0x13 Zahl.o
0x00800070 0x24 Zahl.o
0x27 (size before relaxing)
*(.gnu.linkonce.d*)
0x00800084 . = ALIGN (0x2)
*fill* 0x00800083 0x1
0x00800084 _edata = .
0x00800084 PROVIDE (__data_end, .)
0x00800094 . = ALIGN (0x2)
0x00800094 _edata = .
0x00800094 PROVIDE (__data_end, .)
.bss 0x00800084 0x20
0x00800084 PROVIDE (__bss_start, .)
.bss 0x00800094 0x24
0x00800094 PROVIDE (__bss_start, .)
*(.bss)
.bss 0x00800084 0x20 Zahl.o
0x00800084 l
0x00800096 u
.bss 0x00800094 0x24 Zahl.o
0x00800094 l
0x008000a6 u
*(.bss*)
*(COMMON)
0x008000a4 PROVIDE (__bss_end, .)
0x000001a4 __data_load_start = LOADADDR (.data)
0x000001c8 __data_load_end = (__data_load_start + SIZEOF (.data))
0x008000b8 PROVIDE (__bss_end, .)
0x0000028c __data_load_start = LOADADDR (.data)
0x000002c0 __data_load_end = (__data_load_start + SIZEOF (.data))
.noinit 0x008000a4 0x0
0x008000a4 PROVIDE (__noinit_start, .)
.noinit 0x008000b8 0x0
0x008000b8 PROVIDE (__noinit_start, .)
*(.noinit*)
0x008000a4 PROVIDE (__noinit_end, .)
0x008000a4 _end = .
0x008000a4 PROVIDE (__heap_start, .)
0x008000b8 PROVIDE (__noinit_end, .)
0x008000b8 _end = .
0x008000b8 PROVIDE (__heap_start, .)
.eeprom 0x00810000 0x0
*(.eeprom*)
@ -409,39 +411,39 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
.debug_sfnames
*(.debug_sfnames)
.debug_aranges 0x00000000 0x30
.debug_aranges 0x00000000 0x38
*(.debug_aranges)
.debug_aranges
0x00000000 0x30 Zahl.o
0x00000000 0x38 Zahl.o
.debug_pubnames
*(.debug_pubnames)
.debug_info 0x00000000 0x961
.debug_info 0x00000000 0xbac
*(.debug_info)
.debug_info 0x00000000 0x961 Zahl.o
.debug_info 0x00000000 0xbac Zahl.o
*(.gnu.linkonce.wi.*)
.debug_abbrev 0x00000000 0x333
.debug_abbrev 0x00000000 0x369
*(.debug_abbrev)
.debug_abbrev 0x00000000 0x333 Zahl.o
.debug_abbrev 0x00000000 0x369 Zahl.o
.debug_line 0x00000000 0x230
.debug_line 0x00000000 0x285
*(.debug_line)
.debug_line 0x00000000 0x230 Zahl.o
.debug_line 0x00000000 0x285 Zahl.o
.debug_frame 0x00000000 0x7c
.debug_frame 0x00000000 0xbc
*(.debug_frame)
.debug_frame 0x00000000 0x7c Zahl.o
.debug_frame 0x00000000 0xbc Zahl.o
.debug_str 0x00000000 0x441
.debug_str 0x00000000 0x498
*(.debug_str)
.debug_str 0x00000000 0x441 Zahl.o
0x47a (size before relaxing)
.debug_str 0x00000000 0x498 Zahl.o
0x4d1 (size before relaxing)
.debug_loc 0x00000000 0x299
.debug_loc 0x00000000 0x2b1
*(.debug_loc)
.debug_loc 0x00000000 0x299 Zahl.o
.debug_loc 0x00000000 0x2b1 Zahl.o
.debug_macinfo
*(.debug_macinfo)
@ -449,9 +451,9 @@ LOAD c:/program files (x86)/atmel/atmel toolchain/avr8 gcc/native/3.4.2.876/avr8
.debug_pubtypes
*(.debug_pubtypes)
.debug_ranges 0x00000000 0x20
.debug_ranges 0x00000000 0x98
*(.debug_ranges)
.debug_ranges 0x00000000 0x20 Zahl.o
.debug_ranges 0x00000000 0x98 Zahl.o
.debug_macro
*(.debug_macro)

73
Zahl/Zahl/Debug/Zahl.srec
View File

@ -1,32 +1,47 @@
S00C00005A61686C2E7372656389
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23
Zahl/Zahl/Zahl.cpp
View File

@ -12,7 +12,7 @@
///////////////////////// UART ////////////////////////////////////
typedef Uart<9600, 9> uartclass;
typedef Uart<9600, 2> uartclass;
uartclass u;
///////////////////////// LED /////////////////////////////////////
typedef Led<avrlib::portb> ledclass;
@ -23,15 +23,17 @@ int main(void)
sei();
l.setNum(0);
l.setDim(0xAC);
uint8_t i = 0;
//uint8_t i = 0;
while(1)
{
u.send("bla..\n");
l.setNum(i++);
_delay_ms(500);
if(i > 15) {
uint8_t t = u.getDig();
uint8_t d = u.getDim();
l.setNum(t);
l.setDim(d);
_delay_ms(10);
/*if(i > 15) {
i = 0;
}
}*/
}
}
@ -39,7 +41,6 @@ ISR(TIMER0_OVF_vect) {
l.timer();
}
/*ISR(USART_RX_vect) {
//u.interrupt();
PORTB ^= 0xFF;
}*/
ISR(USART_RX_vect) {
u.interrupt();
}

5
Zahl/Zahl/Zahl.cppproj
View File

@ -18,7 +18,8 @@
<ToolchainFlavour>Native</ToolchainFlavour>
<KeepTimersRunning>true</KeepTimersRunning>
<OverrideVtor>false</OverrideVtor>
<OverrideVtorValue>exception_table</OverrideVtorValue>
<OverrideVtorValue>
</OverrideVtorValue>
<eraseonlaunchrule>0</eraseonlaunchrule>
<ProgFlashFromRam>true</ProgFlashFromRam>
<RamSnippetAddress>0x20000000</RamSnippetAddress>
@ -138,7 +139,7 @@
<Value>DEBUG</Value>
</ListValues>
</avrgcccpp.compiler.symbols.DefSymbols>
<avrgcccpp.compiler.optimization.level>Optimize for size (-Os)</avrgcccpp.compiler.optimization.level>
<avrgcccpp.compiler.optimization.level>Optimize most (-O3)</avrgcccpp.compiler.optimization.level>
<avrgcccpp.compiler.optimization.PackStructureMembers>True</avrgcccpp.compiler.optimization.PackStructureMembers>
<avrgcccpp.compiler.optimization.AllocateBytesNeededForEnum>True</avrgcccpp.compiler.optimization.AllocateBytesNeededForEnum>
<avrgcccpp.compiler.optimization.DebugLevel>Default (-g2)</avrgcccpp.compiler.optimization.DebugLevel>

38
Zahl/Zahl/uart.hpp
View File

@ -20,7 +20,7 @@ class Uart {
Uart() {
sei();
init();
send("Uart done!\n");
send("Uart done!\r\n");
}
void send(const char *text) {
while (*text)
@ -29,36 +29,54 @@ class Uart {
text++;
}
}
void send(uint8_t text) {
uart_putchar(text);
}
/* USART_RX_vect */
void interrupt() {
uint8_t nextChar;
char nextChar;
nextChar = UDR;
if( nextChar != '\n' && nextChar != '\r' && uart_str_count < UART_MAXSTRLEN) {
uart_string[uart_str_count] = nextChar;
uart_str_count++;
//send(nextChar);
} else {
//send("\r\n");
if(uart_string[0] == 't') {
number = uart_string[diget];
number = uart_string[diget]-0x30;
}
if(uart_string[0] == 'd') {
dimmer = (uart_string[1]-0x30)*100 + (uart_string[2]-0x30)*10 + (uart_string[3]-0x30)*1;
}
send("Werte: Time: ");
send(number+0x30);
send(" Light: ");
send(dimmer+0x30);
send("\r\n");
uart_str_count = 0;
}
}
uint8_t getDig() {
return number;
}
uint8_t getDim() {
return dimmer;
}
private:
uint8_t number = 0;
static const uint8_t UART_MAXSTRLEN = 12;
uint8_t uart_str_count = 0;
uint8_t uart_string[UART_MAXSTRLEN];
uint8_t dimmer = 0;
static const uint8_t UART_MAXSTRLEN = 15;
volatile uint8_t uart_str_count = 0;
volatile char uart_string[UART_MAXSTRLEN];
void init() {
UCSRC = (1 << UCSZ1) | (1 << UCSZ0); //8N1
UCSRB = /*(1<<RXEN1) | / (1<<RXCIE) | */ (1<<TXEN); //Enable TXEN im Register UCR TX-Data Enable
UCSRC = (1<<UCSZ1) | (1<<UCSZ0) /* 8-Bit */ | (0<<UPM1) | (0<<UPM0) /* No Parity */ | (0<<UMSEL) /* Asyncron */;
UCSRB = (1<<RXEN) | (1<<RXCIE) /* Recieve & Interrupt */ | (1<<TXEN) /* Send */; //Enable TXEN im Register UCR TX-Data Enable
UBRRH = (uint8_t)(((F_CPU / 16 / baudrate) - 1)>>8);
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1; //Teiler wird gesetzt
UBRRL = (uint8_t)(F_CPU / 16 / baudrate) - 1;
}
uint8_t uart_putchar(uint8_t c) {
loop_until_bit_is_set(UCSRA, UDRE); //Ausgabe des Zeichens
loop_until_bit_is_set(UCSRA, UDRE); /* Data Register Empty */
UDR = c;
return 0;
}