20130420-185005
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@ -23,9 +23,9 @@ Idx Name Size VMA LMA File off Algn
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CONTENTS, READONLY, DEBUGGING
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9 .debug_frame 000001c8 00000000 00000000 00002774 2**2
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CONTENTS, READONLY, DEBUGGING
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10 .debug_str 0000025c 00000000 00000000 0000293c 2**0
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10 .debug_str 000002a8 00000000 00000000 0000293c 2**0
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CONTENTS, READONLY, DEBUGGING
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11 .debug_loc 000006d5 00000000 00000000 00002b98 2**0
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11 .debug_loc 000006d5 00000000 00000000 00002be4 2**0
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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@ -621,86 +621,36 @@ int main(void)
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356: fe cf rjmp .-4 ; 0x354 <main+0x2a>
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00000358 <rf12_trans>:
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unsigned short rf12_trans(unsigned short wert)
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{
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unsigned short werti = 0;
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unsigned char i;
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RF_PORT &= ~(1<<CS);
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358: d9 98 cbi 0x1b, 1 ; 27
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35a: 40 e1 ldi r20, 0x10 ; 16
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#include "rf12.h"
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#include <util/delay.h>
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unsigned short rf12_trans(unsigned short wert)
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{
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unsigned short werti = 0;
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35c: 20 e0 ldi r18, 0x00 ; 0
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35e: 30 e0 ldi r19, 0x00 ; 0
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unsigned char i;
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RF_PORT &= ~(1<<CS);
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for (i=0; i<16; i++)
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{
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if (wert&32768) {
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360: 99 23 and r25, r25
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362: 14 f4 brge .+4 ; 0x368 <rf12_trans+0x10>
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RF_PORT |= (1<<SDI);
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364: db 9a sbi 0x1b, 3 ; 27
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366: 01 c0 rjmp .+2 ; 0x36a <rf12_trans+0x12>
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}
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else {
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RF_PORT &= ~(1<<SDI);
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368: db 98 cbi 0x1b, 3 ; 27
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}
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werti<<=1;
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36a: 22 0f add r18, r18
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36c: 33 1f adc r19, r19
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if (RF_PIN & (1<<SDO)) {
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36e: c8 99 sbic 0x19, 0 ; 25
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werti|=1;
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370: 21 60 ori r18, 0x01 ; 1
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}
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RF_PORT |= (1<<SCK);
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372: da 9a sbi 0x1b, 2 ; 27
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wert<<=1;
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374: 88 0f add r24, r24
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376: 99 1f adc r25, r25
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378: 00 c0 rjmp .+0 ; 0x37a <rf12_trans+0x22>
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37a: 00 00 nop
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_delay_us(0.3);
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RF_PORT &= ~(1<<SCK);
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37c: da 98 cbi 0x1b, 2 ; 27
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37e: 41 50 subi r20, 0x01 ; 1
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{
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unsigned short werti = 0;
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unsigned char i;
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RF_PORT &= ~(1<<CS);
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for (i=0; i<16; i++)
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380: 79 f7 brne .-34 ; 0x360 <rf12_trans+0x8>
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RF_PORT |= (1<<SCK);
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wert<<=1;
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_delay_us(0.3);
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RF_PORT &= ~(1<<SCK);
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}
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RF_PORT |= (1<<CS);
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382: d9 9a sbi 0x1b, 1 ; 27
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return werti;
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}
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384: 82 2f mov r24, r18
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386: 93 2f mov r25, r19
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388: 08 95 ret
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0000038a <rf12_init>:
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void rf12_init(void)
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{
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RF_DDR |= (1<<SDI) | (1<<SCK) | (1<<CS);
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38a: 8a b3 in r24, 0x1a ; 26
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38c: 8e 60 ori r24, 0x0E ; 14
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38e: 8a bb out 0x1a, r24 ; 26
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RF_PORT |= (1<<CS);
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390: d9 9a sbi 0x1b, 1 ; 27
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#else
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//round up by default
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@ -717,45 +667,30 @@ void rf12_init(void)
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39e: e1 f7 brne .-8 ; 0x398 <rf12_init+0xe>
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3a0: 00 c0 rjmp .+0 ; 0x3a2 <rf12_init+0x18>
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3a2: 00 00 nop
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_delay_ms(100);
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rf12_trans(0xC0E0); // AVR CLK: 10MHz
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3a4: 80 ee ldi r24, 0xE0 ; 224
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3a6: 90 ec ldi r25, 0xC0 ; 192
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3a8: d7 df rcall .-82 ; 0x358 <rf12_trans>
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rf12_trans(0x80D7); // Enable FIFO
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3aa: 87 ed ldi r24, 0xD7 ; 215
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3ac: 90 e8 ldi r25, 0x80 ; 128
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3ae: d4 df rcall .-88 ; 0x358 <rf12_trans>
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rf12_trans(0xC2AB); // Data Filter: internal
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3b0: 8b ea ldi r24, 0xAB ; 171
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3b2: 92 ec ldi r25, 0xC2 ; 194
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3b4: d1 df rcall .-94 ; 0x358 <rf12_trans>
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rf12_trans(0xCA81); // Set FIFO mode
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3b6: 81 e8 ldi r24, 0x81 ; 129
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3b8: 9a ec ldi r25, 0xCA ; 202
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3ba: ce df rcall .-100 ; 0x358 <rf12_trans>
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rf12_trans(0xE000); // disable wakeuptimer
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3bc: 80 e0 ldi r24, 0x00 ; 0
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3be: 90 ee ldi r25, 0xE0 ; 224
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3c0: cb df rcall .-106 ; 0x358 <rf12_trans>
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rf12_trans(0xC800); // disable low duty cycle
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3c2: 80 e0 ldi r24, 0x00 ; 0
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3c4: 98 ec ldi r25, 0xC8 ; 200
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3c6: c8 df rcall .-112 ; 0x358 <rf12_trans>
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rf12_trans(0xC4F7); // AFC settings: autotuning: -10kHz...+7,5kHz
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3c8: 87 ef ldi r24, 0xF7 ; 247
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3ca: 94 ec ldi r25, 0xC4 ; 196
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3cc: c5 df rcall .-118 ; 0x358 <rf12_trans>
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}
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3ce: 08 95 ret
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000003d0 <rf12_setbandwidth>:
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void rf12_setbandwidth(unsigned char bandwidth, unsigned char gain, unsigned char drssi)
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{
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rf12_trans(0x9400|((bandwidth&7)<<5)|((gain&3)<<3)|(drssi&7));
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3d0: 90 e0 ldi r25, 0x00 ; 0
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3d2: 88 0f add r24, r24
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3d4: 99 1f adc r25, r25
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@ -784,14 +719,9 @@ void rf12_setbandwidth(unsigned char bandwidth, unsigned char gain, unsigned cha
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402: 86 2b or r24, r22
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404: 97 2b or r25, r23
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406: a8 df rcall .-176 ; 0x358 <rf12_trans>
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}
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408: 08 95 ret
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0000040a <rf12_setfreq>:
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void rf12_setfreq(unsigned short freq)
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{
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if (freq<96) { // 430,2400MHz
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40a: 80 36 cpi r24, 0x60 ; 96
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40c: 91 05 cpc r25, r1
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40e: 38 f0 brcs .+14 ; 0x41e <rf12_setfreq+0x14>
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@ -802,35 +732,21 @@ void rf12_setfreq(unsigned short freq)
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418: 8f e3 ldi r24, 0x3F ; 63
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41a: 9f e0 ldi r25, 0x0F ; 15
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41c: 02 c0 rjmp .+4 ; 0x422 <rf12_setfreq+0x18>
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freq=96;
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41e: 80 e6 ldi r24, 0x60 ; 96
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420: 90 e0 ldi r25, 0x00 ; 0
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} else if (freq>3903) { // 439,7575MHz
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freq=3903;
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}
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rf12_trans(0xA000|freq);
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422: 90 6a ori r25, 0xA0 ; 160
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424: 99 df rcall .-206 ; 0x358 <rf12_trans>
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}
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426: 08 95 ret
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00000428 <rf12_setbaud>:
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void rf12_setbaud(unsigned short baud)
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{
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if (baud<663) {
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428: 22 e0 ldi r18, 0x02 ; 2
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42a: 87 39 cpi r24, 0x97 ; 151
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42c: 92 07 cpc r25, r18
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42e: f0 f0 brcs .+60 ; 0x46c <rf12_setbaud+0x44>
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return;
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}
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if (baud<5400) { // Baudrate= 344827,58621/(R+1)/(1+CS*7)
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430: 25 e1 ldi r18, 0x15 ; 21
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432: 88 31 cpi r24, 0x18 ; 24
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434: 92 07 cpc r25, r18
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436: 70 f4 brcc .+28 ; 0x454 <rf12_setbaud+0x2c>
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rf12_trans(0xC680|((43104/baud)-1));
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438: 9c 01 movw r18, r24
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43a: 40 e0 ldi r20, 0x00 ; 0
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43c: 50 e0 ldi r21, 0x00 ; 0
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@ -845,8 +761,6 @@ void rf12_setbaud(unsigned short baud)
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44e: 96 6c ori r25, 0xC6 ; 198
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450: 83 df rcall .-250 ; 0x358 <rf12_trans>
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452: 08 95 ret
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} else {
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rf12_trans(0xC600|((344828UL/baud)-1));
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454: 9c 01 movw r18, r24
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456: 40 e0 ldi r20, 0x00 ; 0
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458: 50 e0 ldi r21, 0x00 ; 0
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@ -862,12 +776,6 @@ void rf12_setbaud(unsigned short baud)
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46c: 08 95 ret
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0000046e <rf12_setpower>:
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}
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}
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void rf12_setpower(unsigned char power, unsigned char mod)
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{
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rf12_trans(0x9800|(power&7)|((mod&15)<<4));
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46e: 90 e0 ldi r25, 0x00 ; 0
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470: 87 70 andi r24, 0x07 ; 7
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472: 90 70 andi r25, 0x00 ; 0
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@ -883,122 +791,77 @@ void rf12_setpower(unsigned char power, unsigned char mod)
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486: 86 2b or r24, r22
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488: 97 2b or r25, r23
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48a: 66 df rcall .-308 ; 0x358 <rf12_trans>
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}
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48c: 08 95 ret
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0000048e <rf12_ready>:
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void rf12_ready(void)
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{
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RF_PORT &= ~(1<<CS);
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48e: d9 98 cbi 0x1b, 1 ; 27
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while (!(RF_PIN & (1<<SDO))); // wait until FIFO ready
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490: c8 9b sbis 0x19, 0 ; 25
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492: fe cf rjmp .-4 ; 0x490 <rf12_ready+0x2>
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}
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494: 08 95 ret
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00000496 <rf12_beginasyncrx>:
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void rf12_beginasyncrx() {
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rf12_trans(0x82C8); // RX on
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496: 88 ec ldi r24, 0xC8 ; 200
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498: 92 e8 ldi r25, 0x82 ; 130
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49a: 5e df rcall .-324 ; 0x358 <rf12_trans>
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rf12_trans(0xCA81); // set FIFO mode
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49c: 81 e8 ldi r24, 0x81 ; 129
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49e: 9a ec ldi r25, 0xCA ; 202
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4a0: 5b df rcall .-330 ; 0x358 <rf12_trans>
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rf12_trans(0xCA83); // enable FIFO
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4a2: 83 e8 ldi r24, 0x83 ; 131
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4a4: 9a ec ldi r25, 0xCA ; 202
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4a6: 58 df rcall .-336 ; 0x358 <rf12_trans>
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}
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4a8: 08 95 ret
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000004aa <rf12_hasdata>:
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uint8_t rf12_hasdata() {
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RF_PORT &= ~(1<<CS);
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4aa: d9 98 cbi 0x1b, 1 ; 27
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return !(RF_PIN & (1<<SDO));
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4ac: 81 e0 ldi r24, 0x01 ; 1
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4ae: c8 99 sbic 0x19, 0 ; 25
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4b0: 80 e0 ldi r24, 0x00 ; 0
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}
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4b2: 08 95 ret
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000004b4 <rf12_rxbyte>:
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uint8_t rf12_rxbyte() {
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return rf12_trans(0xB000);
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4b4: 80 e0 ldi r24, 0x00 ; 0
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4b6: 90 eb ldi r25, 0xB0 ; 176
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4b8: 4f df rcall .-354 ; 0x358 <rf12_trans>
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}
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4ba: 08 95 ret
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000004bc <rf12_endasyncrx>:
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void rf12_endasyncrx() {
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rf12_trans(0x8208); // RX off
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4bc: 88 e0 ldi r24, 0x08 ; 8
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4be: 92 e8 ldi r25, 0x82 ; 130
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4c0: 4b df rcall .-362 ; 0x358 <rf12_trans>
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}
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4c2: 08 95 ret
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000004c4 <rf12_txdata>:
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void rf12_txdata(unsigned char *data, unsigned char number)
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{
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4c4: 0f 93 push r16
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4c6: 1f 93 push r17
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4c8: cf 93 push r28
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4ca: df 93 push r29
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4cc: 8c 01 movw r16, r24
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4ce: c6 2f mov r28, r22
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unsigned char i;
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rf12_trans(0x8238); // TX on
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4d0: 88 e3 ldi r24, 0x38 ; 56
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4d2: 92 e8 ldi r25, 0x82 ; 130
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4d4: 41 df rcall .-382 ; 0x358 <rf12_trans>
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rf12_ready();
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4d6: db df rcall .-74 ; 0x48e <rf12_ready>
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rf12_trans(0xB8AA);
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4d8: 8a ea ldi r24, 0xAA ; 170
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4da: 98 eb ldi r25, 0xB8 ; 184
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4dc: 3d df rcall .-390 ; 0x358 <rf12_trans>
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rf12_ready();
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4de: d7 df rcall .-82 ; 0x48e <rf12_ready>
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rf12_trans(0xB8AA);
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4e0: 8a ea ldi r24, 0xAA ; 170
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4e2: 98 eb ldi r25, 0xB8 ; 184
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4e4: 39 df rcall .-398 ; 0x358 <rf12_trans>
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rf12_ready();
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4e6: d3 df rcall .-90 ; 0x48e <rf12_ready>
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rf12_trans(0xB8AA);
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4e8: 8a ea ldi r24, 0xAA ; 170
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4ea: 98 eb ldi r25, 0xB8 ; 184
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4ec: 35 df rcall .-406 ; 0x358 <rf12_trans>
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rf12_ready();
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4ee: cf df rcall .-98 ; 0x48e <rf12_ready>
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rf12_trans(0xB82D);
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4f0: 8d e2 ldi r24, 0x2D ; 45
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4f2: 98 eb ldi r25, 0xB8 ; 184
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4f4: 31 df rcall .-414 ; 0x358 <rf12_trans>
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rf12_ready();
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4f6: cb df rcall .-106 ; 0x48e <rf12_ready>
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rf12_trans(0xB8D4);
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4f8: 84 ed ldi r24, 0xD4 ; 212
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4fa: 98 eb ldi r25, 0xB8 ; 184
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4fc: 2d df rcall .-422 ; 0x358 <rf12_trans>
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for (i=0; i<number; i++)
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4fe: cc 23 and r28, r28
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500: 89 f0 breq .+34 ; 0x524 <rf12_txdata+0x60>
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}
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void rf12_endasyncrx() {
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rf12_trans(0x8208); // RX off
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}
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void rf12_txdata(unsigned char *data, unsigned char number)
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502: c8 01 movw r24, r16
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504: 01 96 adiw r24, 0x01 ; 1
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506: c1 50 subi r28, 0x01 ; 1
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@ -1006,40 +869,20 @@ void rf12_txdata(unsigned char *data, unsigned char number)
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50a: 2c 0f add r18, r28
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50c: 31 1d adc r19, r1
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50e: e9 01 movw r28, r18
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rf12_trans(0xB82D);
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rf12_ready();
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rf12_trans(0xB8D4);
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for (i=0; i<number; i++)
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{
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rf12_ready();
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510: be df rcall .-132 ; 0x48e <rf12_ready>
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rf12_trans(0xB800|(*data++));
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512: f8 01 movw r30, r16
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514: 81 91 ld r24, Z+
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516: 8f 01 movw r16, r30
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518: 90 e0 ldi r25, 0x00 ; 0
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51a: 98 6b ori r25, 0xB8 ; 184
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51c: 1d df rcall .-454 ; 0x358 <rf12_trans>
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rf12_trans(0xB8AA);
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rf12_ready();
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rf12_trans(0xB82D);
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rf12_ready();
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rf12_trans(0xB8D4);
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for (i=0; i<number; i++)
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51e: 0c 17 cp r16, r28
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520: 1d 07 cpc r17, r29
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522: b1 f7 brne .-20 ; 0x510 <rf12_txdata+0x4c>
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{
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rf12_ready();
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rf12_trans(0xB800|(*data++));
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}
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rf12_ready();
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524: b4 df rcall .-152 ; 0x48e <rf12_ready>
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rf12_trans(0x8208); // TX off
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526: 88 e0 ldi r24, 0x08 ; 8
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528: 92 e8 ldi r25, 0x82 ; 130
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52a: 16 df rcall .-468 ; 0x358 <rf12_trans>
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}
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52c: df 91 pop r29
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52e: cf 91 pop r28
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530: 1f 91 pop r17
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@ -1047,37 +890,23 @@ void rf12_txdata(unsigned char *data, unsigned char number)
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534: 08 95 ret
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00000536 <rf12_rxdata>:
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void rf12_rxdata(unsigned char *data, unsigned char number)
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{
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536: 0f 93 push r16
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538: 1f 93 push r17
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53a: cf 93 push r28
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53c: df 93 push r29
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53e: 8c 01 movw r16, r24
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540: d6 2f mov r29, r22
|
||||
unsigned char i;
|
||||
rf12_trans(0x82C8); // RX on
|
||||
542: 88 ec ldi r24, 0xC8 ; 200
|
||||
544: 92 e8 ldi r25, 0x82 ; 130
|
||||
546: 08 df rcall .-496 ; 0x358 <rf12_trans>
|
||||
rf12_trans(0xCA81); // set FIFO mode
|
||||
548: 81 e8 ldi r24, 0x81 ; 129
|
||||
54a: 9a ec ldi r25, 0xCA ; 202
|
||||
54c: 05 df rcall .-502 ; 0x358 <rf12_trans>
|
||||
rf12_trans(0xCA83); // enable FIFO
|
||||
54e: 83 e8 ldi r24, 0x83 ; 131
|
||||
550: 9a ec ldi r25, 0xCA ; 202
|
||||
552: 02 df rcall .-508 ; 0x358 <rf12_trans>
|
||||
for (i=0; i<number; i++)
|
||||
554: dd 23 and r29, r29
|
||||
556: 89 f0 breq .+34 ; 0x57a <rf12_rxdata+0x44>
|
||||
}
|
||||
rf12_ready();
|
||||
rf12_trans(0x8208); // TX off
|
||||
}
|
||||
|
||||
void rf12_rxdata(unsigned char *data, unsigned char number)
|
||||
558: c8 01 movw r24, r16
|
||||
55a: 01 96 adiw r24, 0x01 ; 1
|
||||
55c: d1 50 subi r29, 0x01 ; 1
|
||||
@ -1085,38 +914,19 @@ void rf12_rxdata(unsigned char *data, unsigned char number)
|
||||
560: 2d 0f add r18, r29
|
||||
562: 31 1d adc r19, r1
|
||||
564: e9 01 movw r28, r18
|
||||
rf12_trans(0x82C8); // RX on
|
||||
rf12_trans(0xCA81); // set FIFO mode
|
||||
rf12_trans(0xCA83); // enable FIFO
|
||||
for (i=0; i<number; i++)
|
||||
{
|
||||
rf12_ready();
|
||||
566: 93 df rcall .-218 ; 0x48e <rf12_ready>
|
||||
*data++=rf12_trans(0xB000);
|
||||
568: 80 e0 ldi r24, 0x00 ; 0
|
||||
56a: 90 eb ldi r25, 0xB0 ; 176
|
||||
56c: f5 de rcall .-534 ; 0x358 <rf12_trans>
|
||||
56e: f8 01 movw r30, r16
|
||||
570: 81 93 st Z+, r24
|
||||
572: 8f 01 movw r16, r30
|
||||
{
|
||||
unsigned char i;
|
||||
rf12_trans(0x82C8); // RX on
|
||||
rf12_trans(0xCA81); // set FIFO mode
|
||||
rf12_trans(0xCA83); // enable FIFO
|
||||
for (i=0; i<number; i++)
|
||||
574: ec 17 cp r30, r28
|
||||
576: fd 07 cpc r31, r29
|
||||
578: b1 f7 brne .-20 ; 0x566 <rf12_rxdata+0x30>
|
||||
{
|
||||
rf12_ready();
|
||||
*data++=rf12_trans(0xB000);
|
||||
}
|
||||
rf12_trans(0x8208); // RX off
|
||||
57a: 88 e0 ldi r24, 0x08 ; 8
|
||||
57c: 92 e8 ldi r25, 0x82 ; 130
|
||||
57e: ec de rcall .-552 ; 0x358 <rf12_trans>
|
||||
}
|
||||
580: df 91 pop r29
|
||||
582: cf 91 pop r28
|
||||
584: 1f 91 pop r17
|
||||
@ -1124,78 +934,55 @@ void rf12_rxdata(unsigned char *data, unsigned char number)
|
||||
588: 08 95 ret
|
||||
|
||||
0000058a <rf12_txpacket>:
|
||||
|
||||
void rf12_txpacket(uint8_t addr, uint8_t from, uint8_t data) {
|
||||
58a: 1f 93 push r17
|
||||
58c: cf 93 push r28
|
||||
58e: df 93 push r29
|
||||
590: 18 2f mov r17, r24
|
||||
592: d6 2f mov r29, r22
|
||||
594: c4 2f mov r28, r20
|
||||
rf12_trans(0x8238); // TX on
|
||||
596: 88 e3 ldi r24, 0x38 ; 56
|
||||
598: 92 e8 ldi r25, 0x82 ; 130
|
||||
59a: de de rcall .-580 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
59c: 78 df rcall .-272 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB8AA);
|
||||
59e: 8a ea ldi r24, 0xAA ; 170
|
||||
5a0: 98 eb ldi r25, 0xB8 ; 184
|
||||
5a2: da de rcall .-588 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5a4: 74 df rcall .-280 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB8AA);
|
||||
5a6: 8a ea ldi r24, 0xAA ; 170
|
||||
5a8: 98 eb ldi r25, 0xB8 ; 184
|
||||
5aa: d6 de rcall .-596 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5ac: 70 df rcall .-288 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB8AA);
|
||||
5ae: 8a ea ldi r24, 0xAA ; 170
|
||||
5b0: 98 eb ldi r25, 0xB8 ; 184
|
||||
5b2: d2 de rcall .-604 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5b4: 6c df rcall .-296 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB82D);
|
||||
5b6: 8d e2 ldi r24, 0x2D ; 45
|
||||
5b8: 98 eb ldi r25, 0xB8 ; 184
|
||||
5ba: ce de rcall .-612 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5bc: 68 df rcall .-304 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB8D4);
|
||||
5be: 84 ed ldi r24, 0xD4 ; 212
|
||||
5c0: 98 eb ldi r25, 0xB8 ; 184
|
||||
5c2: ca de rcall .-620 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5c4: 64 df rcall .-312 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB800|addr);
|
||||
5c6: 81 2f mov r24, r17
|
||||
5c8: 90 e0 ldi r25, 0x00 ; 0
|
||||
5ca: 98 6b ori r25, 0xB8 ; 184
|
||||
5cc: c5 de rcall .-630 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5ce: 5f df rcall .-322 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB800|from);
|
||||
5d0: 8d 2f mov r24, r29
|
||||
5d2: 90 e0 ldi r25, 0x00 ; 0
|
||||
5d4: 98 6b ori r25, 0xB8 ; 184
|
||||
5d6: c0 de rcall .-640 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5d8: 5a df rcall .-332 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB800|data);
|
||||
5da: 8c 2f mov r24, r28
|
||||
5dc: 90 e0 ldi r25, 0x00 ; 0
|
||||
5de: 98 6b ori r25, 0xB8 ; 184
|
||||
5e0: bb de rcall .-650 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5e2: 55 df rcall .-342 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0xB800);
|
||||
5e4: 80 e0 ldi r24, 0x00 ; 0
|
||||
5e6: 98 eb ldi r25, 0xB8 ; 184
|
||||
5e8: b7 de rcall .-658 ; 0x358 <rf12_trans>
|
||||
rf12_ready();
|
||||
5ea: 51 df rcall .-350 ; 0x48e <rf12_ready>
|
||||
rf12_trans(0x8208); // TX off
|
||||
5ec: 88 e0 ldi r24, 0x08 ; 8
|
||||
5ee: 92 e8 ldi r25, 0x82 ; 130
|
||||
5f0: b3 de rcall .-666 ; 0x358 <rf12_trans>
|
||||
@ -1208,7 +995,6 @@ void rf12_txpacket(uint8_t addr, uint8_t from, uint8_t data) {
|
||||
5fe: e1 f7 brne .-8 ; 0x5f8 <rf12_txpacket+0x6e>
|
||||
600: 00 c0 rjmp .+0 ; 0x602 <rf12_txpacket+0x78>
|
||||
602: 00 00 nop
|
||||
_delay_ms(100);
|
||||
604: df 91 pop r29
|
||||
606: cf 91 pop r28
|
||||
608: 1f 91 pop r17
|
||||
|
||||
@ -412,11 +412,11 @@ LOAD c:/program files (x86)/atmel/atmel studio 6.0/extensions/atmel/avrgcc/3.4.1
|
||||
.debug_frame 0x00000000 0x9c Reciver.o
|
||||
.debug_frame 0x0000009c 0x12c rf12.o
|
||||
|
||||
.debug_str 0x00000000 0x25c
|
||||
.debug_str 0x00000000 0x2a8
|
||||
*(.debug_str)
|
||||
.debug_str 0x00000000 0x165 Reciver.o
|
||||
0x19e (size before relaxing)
|
||||
.debug_str 0x00000165 0xf7 rf12.o
|
||||
.debug_str 0x00000000 0x15c Reciver.o
|
||||
0x195 (size before relaxing)
|
||||
.debug_str 0x0000015c 0x14c rf12.o
|
||||
0x25b (size before relaxing)
|
||||
|
||||
.debug_loc 0x00000000 0x6d5
|
||||
|
||||
Loading…
Reference in New Issue
Block a user