Zeitschaltung.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         0000017c  00000000  00000000  00000054  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .stab         000006b4  00000000  00000000  000001d0  2**2
                  CONTENTS, READONLY, DEBUGGING
  2 .stabstr      00000085  00000000  00000000  00000884  2**0
                  CONTENTS, READONLY, DEBUGGING
  3 .debug_aranges 00000040  00000000  00000000  00000909  2**0
                  CONTENTS, READONLY, DEBUGGING
  4 .debug_pubnames 0000008f  00000000  00000000  00000949  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_info   0000059f  00000000  00000000  000009d8  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_abbrev 00000262  00000000  00000000  00000f77  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_line   00000441  00000000  00000000  000011d9  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_frame  000000a0  00000000  00000000  0000161c  2**2
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    00000187  00000000  00000000  000016bc  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_loc    000001f1  00000000  00000000  00001843  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_pubtypes 00000070  00000000  00000000  00001a34  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	09 c0       	rjmp	.+18     	; 0x14 <__ctors_end>
   2:	25 c0       	rjmp	.+74     	; 0x4e <__vector_1>
   4:	0d c0       	rjmp	.+26     	; 0x20 <__bad_interrupt>
   6:	0c c0       	rjmp	.+24     	; 0x20 <__bad_interrupt>
   8:	0b c0       	rjmp	.+22     	; 0x20 <__bad_interrupt>
   a:	0a c0       	rjmp	.+20     	; 0x20 <__bad_interrupt>
   c:	09 c0       	rjmp	.+18     	; 0x20 <__bad_interrupt>
   e:	08 c0       	rjmp	.+16     	; 0x20 <__bad_interrupt>
  10:	07 c0       	rjmp	.+14     	; 0x20 <__bad_interrupt>
  12:	06 c0       	rjmp	.+12     	; 0x20 <__bad_interrupt>

00000014 <__ctors_end>:
  14:	11 24       	eor	r1, r1
  16:	1f be       	out	0x3f, r1	; 63
  18:	cf e9       	ldi	r28, 0x9F	; 159
  1a:	cd bf       	out	0x3d, r28	; 61
  1c:	50 d0       	rcall	.+160    	; 0xbe <main>
  1e:	ac c0       	rjmp	.+344    	; 0x178 <_exit>

00000020 <__bad_interrupt>:
  20:	ef cf       	rjmp	.-34     	; 0x0 <__vectors>

00000022 <adc_schlafen>:

uint16_t adc_schlafen() {
	uint8_t value; 
    uint16_t sum;
	//sleep_long(1000);
	ADCSRA |= (1<<ADEN) | (1<<ADSC);
  22:	86 b1       	in	r24, 0x06	; 6
  24:	80 6c       	ori	r24, 0xC0	; 192
  26:	86 b9       	out	0x06, r24	; 6
	while(ADCSRA & (1<<ADSC)) { /* Habe Fertig */ };
  28:	36 99       	sbic	0x06, 6	; 6
  2a:	fe cf       	rjmp	.-4      	; 0x28 <adc_schlafen+0x6>
	value = ADCL; //LOWER First
  2c:	84 b1       	in	r24, 0x04	; 4
	value = ADCH; //THEN upper
  2e:	85 b1       	in	r24, 0x05	; 5
	sum = value;
	ADCSRA &= ~(1<<ADEN);
  30:	37 98       	cbi	0x06, 7	; 6
	sum *= 30;
  32:	90 e0       	ldi	r25, 0x00	; 0
  34:	6e e1       	ldi	r22, 0x1E	; 30
  36:	70 e0       	ldi	r23, 0x00	; 0
  38:	8d d0       	rcall	.+282    	; 0x154 <__mulhi3>
	sum += 1000;
  3a:	9c 01       	movw	r18, r24
  3c:	28 51       	subi	r18, 0x18	; 24
  3e:	3c 4f       	sbci	r19, 0xFC	; 252
	return sum;
}
  40:	c9 01       	movw	r24, r18
  42:	08 95       	ret

00000044 <mosfet_an>:

void mosfet_an() {
	uint16_t sleep = adc_schlafen();
  44:	ee df       	rcall	.-36     	; 0x22 <adc_schlafen>
	PORTB |= (1<<PB0);
  46:	c0 9a       	sbi	0x18, 0	; 24
	sleep_long(sleep);
  48:	68 d0       	rcall	.+208    	; 0x11a <sleep_long>
	PORTB &= ~(1<<PB0);
  4a:	c0 98       	cbi	0x18, 0	; 24
}
  4c:	08 95       	ret

0000004e <__vector_1>:

ISR(INT0_vect)
{	
  4e:	1f 92       	push	r1
  50:	0f 92       	push	r0
  52:	0f b6       	in	r0, 0x3f	; 63
  54:	0f 92       	push	r0
  56:	11 24       	eor	r1, r1
  58:	2f 93       	push	r18
  5a:	3f 93       	push	r19
  5c:	4f 93       	push	r20
  5e:	5f 93       	push	r21
  60:	6f 93       	push	r22
  62:	7f 93       	push	r23
  64:	8f 93       	push	r24
  66:	9f 93       	push	r25
  68:	af 93       	push	r26
  6a:	bf 93       	push	r27
  6c:	ef 93       	push	r30
  6e:	ff 93       	push	r31
	#else
		//round up by default
		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
	#endif

	__builtin_avr_delay_cycles(__ticks_dc);
  70:	8f ef       	ldi	r24, 0xFF	; 255
  72:	9d ee       	ldi	r25, 0xED	; 237
  74:	a2 e0       	ldi	r26, 0x02	; 2
  76:	81 50       	subi	r24, 0x01	; 1
  78:	90 40       	sbci	r25, 0x00	; 0
  7a:	a0 40       	sbci	r26, 0x00	; 0
  7c:	e1 f7       	brne	.-8      	; 0x76 <__vector_1+0x28>
  7e:	00 c0       	rjmp	.+0      	; 0x80 <__vector_1+0x32>
  80:	00 00       	nop
	_delay_ms(100);
	if (!(PINB & (1<<PINB1)) ) { //Ein
  82:	b1 99       	sbic	0x16, 1	; 22
  84:	02 c0       	rjmp	.+4      	; 0x8a <__vector_1+0x3c>
		PORTB |= (1<<PB3);
  86:	c3 9a       	sbi	0x18, 3	; 24
		mosfet_an();
  88:	dd df       	rcall	.-70     	; 0x44 <mosfet_an>
  8a:	8f ef       	ldi	r24, 0xFF	; 255
  8c:	9b e7       	ldi	r25, 0x7B	; 123
  8e:	a2 e9       	ldi	r26, 0x92	; 146
  90:	81 50       	subi	r24, 0x01	; 1
  92:	90 40       	sbci	r25, 0x00	; 0
  94:	a0 40       	sbci	r26, 0x00	; 0
  96:	e1 f7       	brne	.-8      	; 0x90 <__vector_1+0x42>
  98:	00 c0       	rjmp	.+0      	; 0x9a <__vector_1+0x4c>
  9a:	00 00       	nop
	}
	//}
	//set_sleep_mode(SLEEP_MODE_IDLE);
    //sleep_mode();

}
  9c:	ff 91       	pop	r31
  9e:	ef 91       	pop	r30
  a0:	bf 91       	pop	r27
  a2:	af 91       	pop	r26
  a4:	9f 91       	pop	r25
  a6:	8f 91       	pop	r24
  a8:	7f 91       	pop	r23
  aa:	6f 91       	pop	r22
  ac:	5f 91       	pop	r21
  ae:	4f 91       	pop	r20
  b0:	3f 91       	pop	r19
  b2:	2f 91       	pop	r18
  b4:	0f 90       	pop	r0
  b6:	0f be       	out	0x3f, r0	; 63
  b8:	0f 90       	pop	r0
  ba:	1f 90       	pop	r1
  bc:	18 95       	reti

000000be <main>:

int main (void) {
	cli();
  be:	f8 94       	cli
	DDRB  |= (1<<PB0) | (1<<PB3);
  c0:	87 b3       	in	r24, 0x17	; 23
  c2:	89 60       	ori	r24, 0x09	; 9
  c4:	87 bb       	out	0x17, r24	; 23
	PORTB |= (1<<PB1);
  c6:	c1 9a       	sbi	0x18, 1	; 24
	GIMSK |= (1<<INT0);
  c8:	8b b7       	in	r24, 0x3b	; 59
  ca:	80 64       	ori	r24, 0x40	; 64
  cc:	8b bf       	out	0x3b, r24	; 59
	MCUCR |= (1<<ISC01);
  ce:	85 b7       	in	r24, 0x35	; 53
  d0:	82 60       	ori	r24, 0x02	; 2
  d2:	85 bf       	out	0x35, r24	; 53

	ADMUX = 0x00;
  d4:	17 b8       	out	0x07, r1	; 7
	ADMUX |= (1<<REFS0) | (1<<ADLAR) | (1<<MUX1);
  d6:	87 b1       	in	r24, 0x07	; 7
  d8:	82 66       	ori	r24, 0x62	; 98
  da:	87 b9       	out	0x07, r24	; 7
	sei();
  dc:	78 94       	sei
	while(1){
		PORTB &= ~(1<<PB0);
  de:	c0 98       	cbi	0x18, 0	; 24
		//set_sleep_mode(SLEEP_MODE_IDLE);
      	//sleep_mode();
		//_delay_ms(2000);
		PORTB |= (1<<PB3);
  e0:	c3 9a       	sbi	0x18, 3	; 24
  e2:	8f e7       	ldi	r24, 0x7F	; 127
  e4:	9b eb       	ldi	r25, 0xBB	; 187
  e6:	01 97       	sbiw	r24, 0x01	; 1
  e8:	f1 f7       	brne	.-4      	; 0xe6 <main+0x28>
  ea:	00 c0       	rjmp	.+0      	; 0xec <main+0x2e>
  ec:	00 00       	nop
		_delay_ms(20);
		PORTB &= ~(1<<PB3);
  ee:	c3 98       	cbi	0x18, 3	; 24
  f0:	8f ef       	ldi	r24, 0xFF	; 255
  f2:	97 e9       	ldi	r25, 0x97	; 151
  f4:	aa e3       	ldi	r26, 0x3A	; 58
  f6:	81 50       	subi	r24, 0x01	; 1
  f8:	90 40       	sbci	r25, 0x00	; 0
  fa:	a0 40       	sbci	r26, 0x00	; 0
  fc:	e1 f7       	brne	.-8      	; 0xf6 <main+0x38>
  fe:	00 c0       	rjmp	.+0      	; 0x100 <main+0x42>
 100:	00 00       	nop
 102:	ed cf       	rjmp	.-38     	; 0xde <main+0x20>

00000104 <sleep>:
 104:	07 c0       	rjmp	.+14     	; 0x114 <sleep+0x10>
 106:	ef e5       	ldi	r30, 0x5F	; 95
 108:	f9 e0       	ldi	r31, 0x09	; 9
 10a:	31 97       	sbiw	r30, 0x01	; 1
 10c:	f1 f7       	brne	.-4      	; 0x10a <sleep+0x6>
 10e:	00 c0       	rjmp	.+0      	; 0x110 <sleep+0xc>
 110:	00 00       	nop
 112:	81 50       	subi	r24, 0x01	; 1
 114:	88 23       	and	r24, r24
 116:	b9 f7       	brne	.-18     	; 0x106 <sleep+0x2>
 118:	08 95       	ret

0000011a <sleep_long>:
 11a:	07 c0       	rjmp	.+14     	; 0x12a <sleep_long+0x10>
 11c:	ef e5       	ldi	r30, 0x5F	; 95
 11e:	f9 e0       	ldi	r31, 0x09	; 9
 120:	31 97       	sbiw	r30, 0x01	; 1
 122:	f1 f7       	brne	.-4      	; 0x120 <sleep_long+0x6>
 124:	00 c0       	rjmp	.+0      	; 0x126 <sleep_long+0xc>
 126:	00 00       	nop
 128:	01 97       	sbiw	r24, 0x01	; 1
 12a:	00 97       	sbiw	r24, 0x00	; 0
 12c:	b9 f7       	brne	.-18     	; 0x11c <sleep_long+0x2>
 12e:	08 95       	ret

00000130 <usleep>:
 130:	05 c0       	rjmp	.+10     	; 0x13c <usleep+0xc>
	#else
		//round up by default
		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
	#endif

	__builtin_avr_delay_cycles(__ticks_dc);
 132:	93 e0       	ldi	r25, 0x03	; 3
 134:	9a 95       	dec	r25
 136:	f1 f7       	brne	.-4      	; 0x134 <usleep+0x4>
 138:	00 00       	nop
 13a:	81 50       	subi	r24, 0x01	; 1
 13c:	88 23       	and	r24, r24
 13e:	c9 f7       	brne	.-14     	; 0x132 <usleep+0x2>
 140:	08 95       	ret

00000142 <usleep_long>:
 142:	05 c0       	rjmp	.+10     	; 0x14e <usleep_long+0xc>
 144:	23 e0       	ldi	r18, 0x03	; 3
 146:	2a 95       	dec	r18
 148:	f1 f7       	brne	.-4      	; 0x146 <usleep_long+0x4>
 14a:	00 00       	nop
 14c:	01 97       	sbiw	r24, 0x01	; 1
 14e:	00 97       	sbiw	r24, 0x00	; 0
 150:	c9 f7       	brne	.-14     	; 0x144 <usleep_long+0x2>
 152:	08 95       	ret

00000154 <__mulhi3>:
 154:	55 27       	eor	r21, r21
 156:	00 24       	eor	r0, r0

00000158 <__mulhi3_loop>:
 158:	80 ff       	sbrs	r24, 0
 15a:	02 c0       	rjmp	.+4      	; 0x160 <__mulhi3_skip1>
 15c:	06 0e       	add	r0, r22
 15e:	57 1f       	adc	r21, r23

00000160 <__mulhi3_skip1>:
 160:	66 0f       	add	r22, r22
 162:	77 1f       	adc	r23, r23
 164:	61 15       	cp	r22, r1
 166:	71 05       	cpc	r23, r1
 168:	21 f0       	breq	.+8      	; 0x172 <__mulhi3_exit>
 16a:	96 95       	lsr	r25
 16c:	87 95       	ror	r24
 16e:	00 97       	sbiw	r24, 0x00	; 0
 170:	99 f7       	brne	.-26     	; 0x158 <__mulhi3_loop>

00000172 <__mulhi3_exit>:
 172:	95 2f       	mov	r25, r21
 174:	80 2d       	mov	r24, r0
 176:	08 95       	ret

00000178 <_exit>:
 178:	f8 94       	cli

0000017a <__stop_program>:
 17a:	ff cf       	rjmp	.-2      	; 0x17a <__stop_program>