This commit is contained in:
2015-11-15 18:18:42 +00:00
parent 9ac343fc45
commit 72be7b0c2f
580 changed files with 356252 additions and 6 deletions
File diff suppressed because it is too large Load Diff
+97
View File
@@ -0,0 +1,97 @@
/*
* linux/include/asm-arm/assembler.h
*
* Copyright (C) 1996-2000 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This file contains arm architecture specific defines
* for the different processors.
*
* Do not include any C declarations in this file - it is included by
* assembler source.
*/
#ifndef __ASSEMBLY__
#error "Only include this from assembly code"
#endif
#include <asm/ptrace.h>
#define pull lsl
#define push lsr
#define get_byte_0 lsr #24
#define get_byte_1 lsr #16
#define get_byte_2 lsr #8
#define get_byte_3 lsl #0
#define put_byte_0 lsl #24
#define put_byte_1 lsl #16
#define put_byte_2 lsl #8
#define put_byte_3 lsl #0
#define PLD(code...)
#define MODE_USR USR_MODE
#define MODE_FIQ FIQ_MODE
#define MODE_IRQ IRQ_MODE
#define MODE_SVC SVC_MODE
#define DEFAULT_FIQ MODE_FIQ
/*
* LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
*/
#ifdef __STDC__
#define LOADREGS(cond, base, reglist...)\
ldm##cond base,reglist
#else
#define LOADREGS(cond, base, reglist...)\
ldm/**/cond base,reglist
#endif
/*
* Build a return instruction for this processor type.
*/
#define RETINSTR(instr, regs...)\
instr regs
/*
* Enable and disable interrupts
*/
.macro disable_irq
msr cpsr_c, #PSR_I_BIT | SVC_MODE
.endm
.macro enable_irq
msr cpsr_c, #SVC_MODE
.endm
/*
* Save the current IRQ state and disable IRQs. Note that this macro
* assumes FIQs are enabled, and that the processor is in SVC mode.
*/
.macro save_and_disable_irqs, oldcpsr
mrs \oldcpsr, cpsr
disable_irq
.endm
/*
* Restore interrupt state previously stored in a register. We don't
* guarantee that this will preserve the flags.
*/
.macro restore_irqs, oldcpsr
msr cpsr_c, \oldcpsr
.endm
/*
* These two are used to save LR/restore PC over a user-based access.
* The old 26-bit architecture requires that we do. On 32-bit
* architecture, we can safely ignore this requirement.
*/
.macro save_lr
.endm
.macro restore_pc
mov pc, lr
.endm
+106
View File
@@ -0,0 +1,106 @@
/*
* linux/include/asm-arm/atomic.h
*
* Copyright (C) 1996 Russell King.
* Copyright (C) 2002 Deep Blue Solutions Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_ATOMIC_H
#define __ASM_ARM_ATOMIC_H
typedef struct { volatile int counter; } atomic_t;
#define ATOMIC_INIT(i) { (i) }
#define atomic_read(v) ((v)->counter)
#include <asm/system.h>
#include <asm/compiler.h>
#define atomic_set(v,i) (((v)->counter) = (i))
static inline int atomic_add_return(int i, atomic_t *v)
{
unsigned long flags;
int val;
local_irq_save(flags);
val = v->counter;
v->counter = val += i;
local_irq_restore(flags);
return val;
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
unsigned long flags;
int val;
local_irq_save(flags);
val = v->counter;
v->counter = val -= i;
local_irq_restore(flags);
return val;
}
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
{
int ret;
unsigned long flags;
local_irq_save(flags);
ret = v->counter;
if (likely(ret == old))
v->counter = new;
local_irq_restore(flags);
return ret;
}
static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
{
unsigned long flags;
local_irq_save(flags);
*addr &= ~mask;
local_irq_restore(flags);
}
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
static inline int atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
c = atomic_read(v);
while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
c = old;
return c != u;
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
#define atomic_add(i, v) (void) atomic_add_return(i, v)
#define atomic_inc(v) (void) atomic_add_return(1, v)
#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
#define atomic_dec(v) (void) atomic_sub_return(1, v)
#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
#define atomic_inc_return(v) (atomic_add_return(1, v))
#define atomic_dec_return(v) (atomic_sub_return(1, v))
#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
/* Atomic operations are already serializing on ARM */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#endif
+225
View File
@@ -0,0 +1,225 @@
/*
* Copyright 1995, Russell King.
* Various bits and pieces copyrights include:
* Linus Torvalds (test_bit).
* Big endian support: Copyright 2001, Nicolas Pitre
* reworked by rmk.
*
* bit 0 is the LSB of an "unsigned long" quantity.
*
* Please note that the code in this file should never be included
* from user space. Many of these are not implemented in assembler
* since they would be too costly. Also, they require privileged
* instructions (which are not available from user mode) to ensure
* that they are atomic.
*/
#ifndef __ASM_ARM_BITOPS_H
#define __ASM_ARM_BITOPS_H
#include <asm/system.h>
#define smp_mb__before_clear_bit() mb()
#define smp_mb__after_clear_bit() mb()
/*
* These functions are the basis of our bit ops.
*
* First, the atomic bitops. These use native endian.
*/
static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned long mask = 1UL << (bit & 31);
p += bit >> 5;
local_irq_save(flags);
*p |= mask;
local_irq_restore(flags);
}
static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned long mask = 1UL << (bit & 31);
p += bit >> 5;
local_irq_save(flags);
*p &= ~mask;
local_irq_restore(flags);
}
static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned long mask = 1UL << (bit & 31);
p += bit >> 5;
local_irq_save(flags);
*p ^= mask;
local_irq_restore(flags);
}
static inline int
____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned int res;
unsigned long mask = 1UL << (bit & 31);
p += bit >> 5;
local_irq_save(flags);
res = *p;
*p = res | mask;
local_irq_restore(flags);
return res & mask;
}
static inline int
____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned int res;
unsigned long mask = 1UL << (bit & 31);
p += bit >> 5;
local_irq_save(flags);
res = *p;
*p = res & ~mask;
local_irq_restore(flags);
return res & mask;
}
static inline int
____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned int res;
unsigned long mask = 1UL << (bit & 31);
p += bit >> 5;
local_irq_save(flags);
res = *p;
*p = res ^ mask;
local_irq_restore(flags);
return res & mask;
}
//#include <asm-generic/bitops/non-atomic.h>
/*
* A note about Endian-ness.
* -------------------------
*
* When the ARM is put into big endian mode via CR15, the processor
* merely swaps the order of bytes within words, thus:
*
* ------------ physical data bus bits -----------
* D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
* little byte 3 byte 2 byte 1 byte 0
* big byte 0 byte 1 byte 2 byte 3
*
* This means that reading a 32-bit word at address 0 returns the same
* value irrespective of the endian mode bit.
*
* Peripheral devices should be connected with the data bus reversed in
* "Big Endian" mode. ARM Application Note 61 is applicable, and is
* available from http://www.arm.com/.
*
* The following assumes that the data bus connectivity for big endian
* mode has been followed.
*
* Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
*/
/*
* Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
*/
extern void _set_bit_le(int nr, volatile unsigned long * p);
extern void _clear_bit_le(int nr, volatile unsigned long * p);
extern void _change_bit_le(int nr, volatile unsigned long * p);
extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
extern int _find_first_zero_bit_le(const void * p, unsigned size);
extern int _find_next_zero_bit_le(const void * p, int size, int offset);
extern int _find_first_bit_le(const unsigned long *p, unsigned size);
extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
/*
* Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
*/
extern void _set_bit_be(int nr, volatile unsigned long * p);
extern void _clear_bit_be(int nr, volatile unsigned long * p);
extern void _change_bit_be(int nr, volatile unsigned long * p);
extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
extern int _find_first_zero_bit_be(const void * p, unsigned size);
extern int _find_next_zero_bit_be(const void * p, int size, int offset);
extern int _find_first_bit_be(const unsigned long *p, unsigned size);
extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
/*
* The __* form of bitops are non-atomic and may be reordered.
*/
#define ATOMIC_BITOP_LE(name,nr,p) \
(__builtin_constant_p(nr) ? \
____atomic_##name(nr, p) : \
_##name##_le(nr,p))
#define ATOMIC_BITOP_BE(name,nr,p) \
(__builtin_constant_p(nr) ? \
____atomic_##name(nr, p) : \
_##name##_be(nr,p))
#define NONATOMIC_BITOP(name,nr,p) \
(____nonatomic_##name(nr, p))
/*
* These are the little endian, atomic definitions.
*/
#define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p)
#define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p)
#define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p)
#define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
#define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
#define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
#define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
#define find_first_bit(p,sz) _find_first_bit_le(p,sz)
#define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off)
#define WORD_BITOFF_TO_LE(x) ((x))
#if 0
#include <asm-generic/bitops/ffz.h>
#include <asm-generic/bitops/__ffs.h>
#include <asm-generic/bitops/fls.h>
#include <asm-generic/bitops/ffs.h>
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/hweight.h>
#endif
#define BITS_PER_LONG 32
#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
static inline int test_bit(int nr, const volatile unsigned long *addr)
{
return 1UL & (addr[BITOP_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
}
#endif /* _ARM_BITOPS_H */
+7
View File
@@ -0,0 +1,7 @@
#ifndef _ASM_COMPILER_H
#define _ASM_COMPILER_H
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#endif
+54
View File
@@ -0,0 +1,54 @@
#ifndef _LINUX_CTYPE_H
#define _LINUX_CTYPE_H
/*
* NOTE! This ctype does not handle EOF like the standard C
* library is required to.
*/
#define _U 0x01 /* upper */
#define _L 0x02 /* lower */
#define _D 0x04 /* digit */
#define _C 0x08 /* cntrl */
#define _P 0x10 /* punct */
#define _S 0x20 /* white space (space/lf/tab) */
#define _X 0x40 /* hex digit */
#define _SP 0x80 /* hard space (0x20) */
extern unsigned char _ctype[];
#define __ismask(x) (_ctype[(int)(unsigned char)(x)])
#define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0)
#define isalpha(c) ((__ismask(c)&(_U|_L)) != 0)
#define iscntrl(c) ((__ismask(c)&(_C)) != 0)
#define isdigit(c) ((__ismask(c)&(_D)) != 0)
#define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0)
#define islower(c) ((__ismask(c)&(_L)) != 0)
#define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0)
#define ispunct(c) ((__ismask(c)&(_P)) != 0)
#define isspace(c) ((__ismask(c)&(_S)) != 0)
#define isupper(c) ((__ismask(c)&(_U)) != 0)
#define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0)
#define isascii(c) (((unsigned char)(c))<=0x7f)
#define toascii(c) (((unsigned char)(c))&0x7f)
static inline unsigned char __tolower(unsigned char c)
{
if (isupper(c))
c -= 'A'-'a';
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
c -= 'a'-'A';
return c;
}
#define tolower(c) __tolower(c)
#define toupper(c) __toupper(c)
#endif
+48
View File
@@ -0,0 +1,48 @@
#ifndef __ASM_ARM_DIV64
#define __ASM_ARM_DIV64
#include <asm/system.h>
/*
* The semantics of do_div() are:
*
* uint32_t do_div(uint64_t *n, uint32_t base)
* {
* uint32_t remainder = *n % base;
* *n = *n / base;
* return remainder;
* }
*
* In other words, a 64-bit dividend with a 32-bit divisor producing
* a 64-bit result and a 32-bit remainder. To accomplish this optimally
* we call a special __do_div64 helper with completely non standard
* calling convention for arguments and results (beware).
*/
#ifdef __ARMEB__
#define __xh "r0"
#define __xl "r1"
#else
#define __xl "r0"
#define __xh "r1"
#endif
#define do_div(n,base) \
({ \
register unsigned int __base asm("r4") = base; \
register unsigned long long __n asm("r0") = n; \
register unsigned long long __res asm("r2"); \
register unsigned int __rem asm(__xh); \
asm( __asmeq("%0", __xh) \
__asmeq("%1", "r2") \
__asmeq("%2", "r0") \
__asmeq("%3", "r4") \
"bl __do_div64" \
: "=r" (__rem), "=r" (__res) \
: "r" (__n), "r" (__base) \
: "ip", "lr", "cc"); \
n = __res; \
__rem; \
})
#endif
+18
View File
@@ -0,0 +1,18 @@
#ifndef __ASM_LINKAGE_H
#define __ASM_LINKAGE_H
/* asm-arm/linkage.h */
#define __ALIGN .align 0
#define __ALIGN_STR ".align 0"
/* linux/linkage.h */
#define ALIGN __ALIGN
#define ENTRY(name) \
.globl name; \
ALIGN; \
name:
#endif
+128
View File
@@ -0,0 +1,128 @@
/*
* linux/include/asm-arm/ptrace.h
*
* Copyright (C) 1996-2003 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_PTRACE_H
#define __ASM_ARM_PTRACE_H
/*
* PSR bits
*/
#define USR26_MODE 0x00000000
#define FIQ26_MODE 0x00000001
#define IRQ26_MODE 0x00000002
#define SVC26_MODE 0x00000003
#define USR_MODE 0x00000010
#define FIQ_MODE 0x00000011
#define IRQ_MODE 0x00000012
#define SVC_MODE 0x00000013
#define ABT_MODE 0x00000017
#define UND_MODE 0x0000001b
#define SYSTEM_MODE 0x0000001f
#define MODE32_BIT 0x00000010
#define MODE_MASK 0x0000001f
#define PSR_T_BIT 0x00000020
#define PSR_F_BIT 0x00000040
#define PSR_I_BIT 0x00000080
#define PSR_J_BIT 0x01000000
#define PSR_Q_BIT 0x08000000
#define PSR_V_BIT 0x10000000
#define PSR_C_BIT 0x20000000
#define PSR_Z_BIT 0x40000000
#define PSR_N_BIT 0x80000000
#define PCMASK 0
/*
* Groups of PSR bits
*/
#define PSR_f 0xff000000 /* Flags */
#define PSR_s 0x00ff0000 /* Status */
#define PSR_x 0x0000ff00 /* Extension */
#define PSR_c 0x000000ff /* Control */
#ifndef __ASSEMBLY__
/*
* This struct defines the way the registers are stored on the
* stack during a system call. Note that sizeof(struct pt_regs)
* has to be a multiple of 8.
*/
struct pt_regs {
long uregs[18];
};
#define ARM_cpsr uregs[16]
#define ARM_pc uregs[15]
#define ARM_lr uregs[14]
#define ARM_sp uregs[13]
#define ARM_ip uregs[12]
#define ARM_fp uregs[11]
#define ARM_r10 uregs[10]
#define ARM_r9 uregs[9]
#define ARM_r8 uregs[8]
#define ARM_r7 uregs[7]
#define ARM_r6 uregs[6]
#define ARM_r5 uregs[5]
#define ARM_r4 uregs[4]
#define ARM_r3 uregs[3]
#define ARM_r2 uregs[2]
#define ARM_r1 uregs[1]
#define ARM_r0 uregs[0]
#define ARM_ORIG_r0 uregs[17]
#define user_mode(regs) \
(((regs)->ARM_cpsr & 0xf) == 0)
#ifdef CONFIG_ARM_THUMB
#define thumb_mode(regs) \
(((regs)->ARM_cpsr & PSR_T_BIT))
#else
#define thumb_mode(regs) (0)
#endif
#define processor_mode(regs) \
((regs)->ARM_cpsr & MODE_MASK)
#define interrupts_enabled(regs) \
(!((regs)->ARM_cpsr & PSR_I_BIT))
#define fast_interrupts_enabled(regs) \
(!((regs)->ARM_cpsr & PSR_F_BIT))
#define condition_codes(regs) \
((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
/* Are the current registers suitable for user mode?
* (used to maintain security in signal handlers)
*/
static inline int valid_user_regs(struct pt_regs *regs)
{
if (user_mode(regs) &&
(regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
return 1;
/*
* Force CPSR to something logical...
*/
regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
return 0;
}
#define pc_pointer(v) \
((v) & ~PCMASK)
#define instruction_pointer(regs) \
(pc_pointer((regs)->ARM_pc))
#define profile_pc(regs) instruction_pointer(regs)
#endif /* __ASSEMBLY__ */
#endif
+109
View File
@@ -0,0 +1,109 @@
#ifndef __ASM_ARM_SYSTEM_H
#define __ASM_ARM_SYSTEM_H
/* Generic ARM7TDMI (ARMv4T) synchronisation primitives, mostly
* taken from Linux kernel source, licensed under GPL */
#define local_irq_save(x) \
({ \
unsigned long temp; \
(void) (&temp == &x); \
__asm__ __volatile__( \
"mrs %0, cpsr @ local_irq_save\n" \
" orr %1, %0, #128\n" \
" msr cpsr_c, %1" \
: "=r" (x), "=r" (temp) \
: \
: "memory", "cc"); \
})
/*
* Enable IRQs
*/
#define local_irq_enable() \
({ \
unsigned long temp; \
__asm__ __volatile__( \
"mrs %0, cpsr @ local_irq_enable\n" \
" bic %0, %0, #128\n" \
" msr cpsr_c, %0" \
: "=r" (temp) \
: \
: "memory", "cc"); \
})
/*
* Disable IRQs
*/
#define local_irq_disable() \
({ \
unsigned long temp; \
__asm__ __volatile__( \
"mrs %0, cpsr @ local_irq_disable\n" \
" orr %0, %0, #128\n" \
" msr cpsr_c, %0" \
: "=r" (temp) \
: \
: "memory", "cc"); \
})
/*
* Enable FIQs
*/
#define local_fiq_enable() \
({ \
unsigned long temp; \
__asm__ __volatile__( \
"mrs %0, cpsr @ stf\n" \
" bic %0, %0, #64\n" \
" msr cpsr_c, %0" \
: "=r" (temp) \
: \
: "memory", "cc"); \
})
/*
* Disable FIQs
*/
#define local_fiq_disable() \
({ \
unsigned long temp; \
__asm__ __volatile__( \
"mrs %0, cpsr @ clf\n" \
" orr %0, %0, #64\n" \
" msr cpsr_c, %0" \
: "=r" (temp) \
: \
: "memory", "cc"); \
})
/*
* Save the current interrupt enable state.
*/
#define local_save_flags(x) \
({ \
__asm__ __volatile__( \
"mrs %0, cpsr @ local_save_flags" \
: "=r" (x) : : "memory", "cc"); \
})
/*
* restore saved IRQ & FIQ state
*/
#define local_irq_restore(x) \
__asm__ __volatile__( \
"msr cpsr_c, %0 @ local_irq_restore\n" \
: \
: "r" (x) \
: "memory", "cc")
#define irqs_disabled() \
({ \
unsigned long flags; \
local_save_flags(flags); \
(int)(flags & PSR_I_BIT); \
})
#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
#endif
+14
View File
@@ -0,0 +1,14 @@
#ifndef __BOARD_H__
#define __BOARD_H__
#include <AT91SAM7.h>
#include <lib_AT91SAM7.h>
/*--------------*/
/* Master Clock */
/*--------------*/
#define EXT_OSC 18432000 // External Crystal Oscillator
#define MCK 47923200 // Resulting PLL CLock
#define ENVIRONMENT_SIZE ( AT91C_IFLASH_PAGE_SIZE )
#endif/*__BOARD_H__*/
+271
View File
@@ -0,0 +1,271 @@
/* Register definitions for Philips CL RC632 RFID Reader IC
*
* (C) 2005 Harald Welte <laforge@gnumonks.org>
*
* Licensed under GNU General Public License, Version 2
*/
#ifndef _CLRC632_H
#define _CLRC632_H
enum rc632_registers {
RC632_REG_PAGE0 = 0x00,
RC632_REG_COMMAND = 0x01,
RC632_REG_FIFO_DATA = 0x02,
RC632_REG_PRIMARY_STATUS = 0x03,
RC632_REG_FIFO_LENGTH = 0x04,
RC632_REG_SECONDARY_STATUS = 0x05,
RC632_REG_INTERRUPT_EN = 0x06,
RC632_REG_INTERRUPT_RQ = 0x07,
RC632_REG_PAGE1 = 0x08,
RC632_REG_CONTROL = 0x09,
RC632_REG_ERROR_FLAG = 0x0a,
RC632_REG_COLL_POS = 0x0b,
RC632_REG_TIMER_VALUE = 0x0c,
RC632_REG_CRC_RESULT_LSB = 0x0d,
RC632_REG_CRC_RESULT_MSB = 0x0e,
RC632_REG_BIT_FRAMING = 0x0f,
RC632_REG_PAGE2 = 0x10,
RC632_REG_TX_CONTROL = 0x11,
RC632_REG_CW_CONDUCTANCE = 0x12,
RC632_REG_MOD_CONDUCTANCE = 0x13,
RC632_REG_CODER_CONTROL = 0x14,
RC632_REG_MOD_WIDTH = 0x15,
RC632_REG_MOD_WIDTH_SOF = 0x16,
RC632_REG_TYPE_B_FRAMING = 0x17,
RC632_REG_PAGE3 = 0x18,
RC632_REG_RX_CONTROL1 = 0x19,
RC632_REG_DECODER_CONTROL = 0x1a,
RC632_REG_BIT_PHASE = 0x1b,
RC632_REG_RX_THRESHOLD = 0x1c,
RC632_REG_BPSK_DEM_CONTROL = 0x1d,
RC632_REG_RX_CONTROL2 = 0x1e,
RC632_REG_CLOCK_Q_CONTROL = 0x1f,
RC632_REG_PAGE4 = 0x20,
RC632_REG_RX_WAIT = 0x21,
RC632_REG_CHANNEL_REDUNDANCY = 0x22,
RC632_REG_CRC_PRESET_LSB = 0x23,
RC632_REG_CRC_PRESET_MSB = 0x24,
RC632_REG_TIME_SLOT_PERIOD = 0x25,
RC632_REG_MFOUT_SELECT = 0x26,
RC632_REG_PRESET_27 = 0x27,
RC632_REG_PAGE5 = 0x28,
RC632_REG_FIFO_LEVEL = 0x29,
RC632_REG_TIMER_CLOCK = 0x2a,
RC632_REG_TIMER_CONTROL = 0x2b,
RC632_REG_TIMER_RELOAD = 0x2c,
RC632_REG_IRQ_PIN_CONFIG = 0x2d,
RC632_REG_PRESET_2E = 0x2e,
RC632_REG_PRESET_2F = 0x2f,
RC632_REG_PAGE6 = 0x30,
RC632_REG_PAGE7 = 0x38,
RC632_REG_TEST_ANA_SELECT = 0x3a,
RC632_REG_TEST_DIGI_SELECT = 0x3d,
};
enum rc632_reg_status {
RC632_STAT_LOALERT = 0x01,
RC632_STAT_HIALERT = 0x02,
RC632_STAT_ERR = 0x04,
RC632_STAT_IRQ = 0x08,
#define RC632_STAT_MODEM_MASK 0x70
RC632_STAT_MODEM_IDLE = 0x00,
RC632_STAT_MODEM_TXSOF = 0x10,
RC632_STAT_MODEM_TXDATA = 0x20,
RC632_STAT_MODEM_TXEOF = 0x30,
RC632_STAT_MODEM_GOTORX = 0x40,
RC632_STAT_MODEM_PREPARERX = 0x50,
RC632_STAT_MODEM_AWAITINGRX = 0x60,
RC632_STAT_MODEM_RECV = 0x70,
};
enum rc632_reg_command {
RC632_CMD_IDLE = 0x00,
RC632_CMD_WRITE_E2 = 0x01,
RC632_CMD_READ_E2 = 0x03,
RC632_CMD_LOAD_CONFIG = 0x07,
RC632_CMD_LOAD_KEY_E2 = 0x0b,
RC632_CMD_AUTHENT1 = 0x0c,
RC632_CMD_CALC_CRC = 0x12,
RC632_CMD_AUTHENT2 = 0x14,
RC632_CMD_RECEIVE = 0x16,
RC632_CMD_LOAD_KEY = 0x19,
RC632_CMD_TRANSMIT = 0x1a,
RC632_CMD_TRANSCEIVE = 0x1e,
RC632_CMD_STARTUP = 0x3f,
};
enum rc632_reg_interrupt {
RC632_INT_LOALERT = 0x01,
RC632_INT_HIALERT = 0x02,
RC632_INT_IDLE = 0x04,
RC632_INT_RX = 0x08,
RC632_INT_TX = 0x10,
RC632_INT_TIMER = 0x20,
RC632_INT_SET = 0x80,
};
enum rc632_reg_control {
RC632_CONTROL_FIFO_FLUSH = 0x01,
RC632_CONTROL_TIMER_START = 0x02,
RC632_CONTROL_TIMER_STOP = 0x04,
RC632_CONTROL_CRYPTO1_ON = 0x08,
RC632_CONTROL_POWERDOWN = 0x10,
RC632_CONTROL_STANDBY = 0x20,
};
enum rc632_reg_error_flag {
RC632_ERR_FLAG_COL_ERR = 0x01,
RC632_ERR_FLAG_PARITY_ERR = 0x02,
RC632_ERR_FLAG_FRAMING_ERR = 0x04,
RC632_ERR_FLAG_CRC_ERR = 0x08,
RC632_ERR_FLAG_FIFO_OVERFLOW = 0x10,
RC632_ERR_FLAG_ACCESS_ERR = 0x20,
RC632_ERR_FLAG_KEY_ERR = 0x40,
};
enum rc632_reg_tx_control {
RC632_TXCTRL_TX1_RF_EN = 0x01,
RC632_TXCTRL_TX2_RF_EN = 0x02,
RC632_TXCTRL_TX2_CW = 0x04,
RC632_TXCTRL_TX2_INV = 0x08,
RC632_TXCTRL_FORCE_100_ASK = 0x10,
RC632_TXCTRL_MOD_SRC_LOW = 0x00,
RC632_TXCTRL_MOD_SRC_HIGH = 0x20,
RC632_TXCTRL_MOD_SRC_INT = 0x40,
RC632_TXCTRL_MOD_SRC_MFIN = 0x60,
};
enum rc632_reg_coder_control {
/* bit 2-0 TXCoding */
#define RC632_CDRCTRL_TXCD_MASK 0x07
RC632_CDRCTRL_TXCD_NRZ = 0x00,
RC632_CDRCTRL_TXCD_14443A = 0x01,
RC632_CDRCTRL_TXCD_ICODE_STD = 0x04,
RC632_CDRCTRL_TXCD_ICODE_FAST = 0x05,
RC632_CDRCTRL_TXCD_15693_STD = 0x06,
RC632_CDRCTRL_TXCD_15693_FAST = 0x07,
/* bit5-3 CoderRate*/
#define RC632_CDRCTRL_RATE_MASK 0x38
RC632_CDRCTRL_RATE_848K = 0x00,
RC632_CDRCTRL_RATE_424K = 0x08,
RC632_CDRCTRL_RATE_212K = 0x10,
RC632_CDRCTRL_RATE_106K = 0x18,
RC632_CDRCTRL_RATE_14443B = 0x20,
RC632_CDRCTRL_RATE_15693 = 0x28,
RC632_CDRCTRL_RATE_ICODE_FAST = 0x30,
/* bit 7 SendOnePuls */
RC632_CDRCTRL_15693_EOF_PULSE = 0x80,
};
enum rc632_erg_type_b_framing {
RC632_TBFRAMING_SOF_10L_2H = 0x00,
RC632_TBFRAMING_SOF_10L_3H = 0x01,
RC632_TBFRAMING_SOF_11L_2H = 0x02,
RC632_TBFRAMING_SOF_11L_3H = 0x03,
RC632_TBFRAMING_EOF_10 = 0x00,
RC632_TBFRAMING_EOF_11 = 0x20,
RC632_TBFRAMING_NO_TX_SOF = 0x80,
RC632_TBFRAMING_NO_TX_EOF = 0x40,
};
#define RC632_TBFRAMING_SPACE_SHIFT 2
#define RC632_TBFRAMING_SPACE_MASK 7
enum rc632_reg_rx_control1 {
RC632_RXCTRL1_GAIN_20DB = 0x00,
RC632_RXCTRL1_GAIN_24DB = 0x01,
RC632_RXCTRL1_GAIN_31DB = 0x02,
RC632_RXCTRL1_GAIN_35DB = 0x03,
RC632_RXCTRL1_LP_OFF = 0x04,
RC632_RXCTRL1_ISO15693 = 0x08,
RC632_RXCTRL1_ISO14443 = 0x10,
#define RC632_RXCTRL1_SUBCP_MASK 0xe0
RC632_RXCTRL1_SUBCP_1 = 0x00,
RC632_RXCTRL1_SUBCP_2 = 0x20,
RC632_RXCTRL1_SUBCP_4 = 0x40,
RC632_RXCTRL1_SUBCP_8 = 0x60,
RC632_RXCTRL1_SUBCP_16 = 0x80,
};
enum rc632_reg_decoder_control {
RC632_DECCTRL_MANCHESTER = 0x00,
RC632_DECCTRL_BPSK = 0x01,
RC632_DECCTRL_RX_INVERT = 0x04,
RC632_DECCTRL_RXFR_ICODE = 0x00,
RC632_DECCTRL_RXFR_14443A = 0x08,
RC632_DECCTRL_RXFR_15693 = 0x10,
RC632_DECCTRL_RXFR_14443B = 0x18,
RC632_DECCTRL_ZEROAFTERCOL = 0x20,
RC632_DECCTRL_RX_MULTIPLE = 0x40,
};
enum rc632_reg_bpsk_dem_control {
RC632_BPSKD_TAUB_SHIFT = 0x00,
RC632_BPSKD_TAUB_MASK = 0x03,
RC632_BPSKD_TAUD_SHIFT = 0x02,
RC632_BPSKD_TAUD_MASK = 0x03,
RC632_BPSKD_FILTER_AMP_DETECT = 0x10,
RC632_BPSKD_NO_RX_EOF = 0x20,
RC632_BPSKD_NO_RX_EGT = 0x40,
RC632_BPSKD_NO_RX_SOF = 0x80,
};
enum rc632_reg_rx_control2 {
RC632_RXCTRL2_DECSRC_LOW = 0x00,
RC632_RXCTRL2_DECSRC_INT = 0x01,
RC632_RXCTRL2_DECSRC_SUBC_MFIN = 0x10,
RC632_RXCTRL2_DECSRC_BASE_MFIN = 0x11,
RC632_RXCTRL2_AUTO_PD = 0x40,
RC632_RXCTRL2_CLK_I = 0x80,
RC632_RXCTRL2_CLK_Q = 0x00,
};
enum rc632_reg_channel_redundancy {
RC632_CR_PARITY_ENABLE = 0x01,
RC632_CR_PARITY_ODD = 0x02,
RC632_CR_TX_CRC_ENABLE = 0x04,
RC632_CR_RX_CRC_ENABLE = 0x08,
RC632_CR_CRC8 = 0x10,
RC632_CR_CRC3309 = 0x20,
};
enum rc632_reg_timer_control {
RC632_TMR_START_TX_BEGIN = 0x01,
RC632_TMR_START_TX_END = 0x02,
RC632_TMR_STOP_RX_BEGIN = 0x04,
RC632_TMR_STOP_RX_END = 0x08,
};
enum rc632_reg_irq_pin_cfg {
RC632_IRQCFG_CMOS = 0x01,
RC632_IRQCFG_INV = 0x02,
};
enum rc632_reg_secondary_status {
RC632_SEC_ST_TMR_RUNNING = 0x80,
RC632_SEC_ST_E2_READY = 0x40,
RC632_SEC_ST_CRC_READY = 0x20,
};
#endif
+9
View File
@@ -0,0 +1,9 @@
#ifndef _COMPILE_H
#define _COMPILE_H
/* This file is auto generated */
#define COMPILE_DATE "20110510-160907"
#define COMPILE_BY "netz@BlubbFish"
#define COMPILE_SVNREV "495-unclean"
#endif /* _COMPILE_H */
File diff suppressed because it is too large Load Diff
+111
View File
@@ -0,0 +1,111 @@
#ifndef _OPENPCD_PROTO_H
#define _OPENPCD_PROTO_H
/* This header file describes the USB protocol of the OpenPCD RFID reader */
#include <sys/types.h>
struct openpcd_hdr {
u_int8_t cmd; /* command. high nibble: class,
* low nibble: cmd */
u_int8_t flags;
u_int8_t reg; /* register */
u_int8_t val; /* value (in case of write *) */
u_int8_t data[0];
} __attribute__ ((packed));
#define OPCD_REV_LEN 16
struct openpcd_compile_version {
char svnrev[OPCD_REV_LEN];
char by[OPCD_REV_LEN];
char date[OPCD_REV_LEN];
} __attribute__ ((packed));
#define OPENPCD_FLAG_RESPOND 0x01 /* Response requested */
#define OPENPCD_FLAG_ERROR 0x80 /* An error occurred */
enum openpcd_cmd_class {
OPENPCD_CMD_CLS_GENERIC = 0x0,
/* PCD (reader) side */
OPENPCD_CMD_CLS_RC632 = 0x1,
//OPENPCD_CMD_CLS_LED = 0x2,
OPENPCD_CMD_CLS_SSC = 0x3,
OPENPCD_CMD_CLS_PWM = 0x4,
OPENPCD_CMD_CLS_ADC = 0x5,
OPENPCD_CMD_CLS_LIBRFID = 0x6,
OPENPCD_CMD_CLS_PRESENCE = 0x7,
/* PICC (transponder) side */
OPENPCD_CMD_CLS_PICC = 0xe,
OPENPCD_CMD_CLS_USBTEST = 0xf,
};
#define OPENPCD_REG_MAX 0x3f
#define OPENPCD_CMD_CLS(x) (x >> 4)
#define OPENPCD_CMD(x) (x & 0xf)
#define OPENPCD_CLS2CMD(x) (x << 4)
/* Generic */
#define OPENPCD_CMD_GET_VERSION (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
#define OPENPCD_CMD_SET_LED (0x2|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
#define OPENPCD_CMD_GET_SERIAL (0x3|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
#define OPENPCD_CMD_GET_API_VERSION (0x4|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
#define OPENPCD_CMD_GET_ENVIRONMENT (0x5|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
#define OPENPCD_CMD_SET_ENVIRONMENT (0x6|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
#define OPENPCD_CMD_RESET (0x7|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_GENERIC))
/* CMD_CLS_RC632 */
#define OPENPCD_CMD_WRITE_REG (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_WRITE_FIFO (0x2|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_WRITE_VFIFO (0x3|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_REG_BITS_CLEAR (0x4|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_REG_BITS_SET (0x5|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_READ_REG (0x6|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_READ_FIFO (0x7|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_READ_VFIFO (0x8|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_DUMP_REGS (0x9|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_IRQ (0xa|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
#define OPENPCD_CMD_WRITE_REG_SET (0xb|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_RC632))
/* CMD_CLS_SSC */
#define OPENPCD_CMD_SSC_READ (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_SSC))
#define OPENPCD_CMD_SSC_WRITE (0x2|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_SSC))
/* CMD_CLS_PWM */
#define OPENPCD_CMD_PWM_ENABLE (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PWM))
#define OPENPCD_CMD_PWM_DUTY_SET (0x2|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PWM))
#define OPENPCD_CMD_PWM_DUTY_GET (0x3|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PWM))
#define OPENPCD_CMD_PWM_FREQ_SET (0x4|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PWM))
#define OPENPCD_CMD_PWM_FREQ_GET (0x5|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PWM))
/* CMD_CLS_PICC */
#define OPENPCD_CMD_PICC_REG_WRITE (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PICC))
#define OPENPCD_CMD_PICC_REG_READ (0x2|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PICC))
/* CMD_CLS_ADC */
#define OPENPCD_CMD_ADC_READ (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_ADC))
/* CMD_CLS_LIBRFID */
#define OPENPCD_CMD_LRFID_DETECT_IRQ (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_LIBRFID))
/* CMD_CLS_LIBRFID */
#define OPENPCD_CMD_PRESENCE_UID_GET (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_PRESENCE))
/* CMD_CLS_USBTEST */
#define OPENPCD_CMD_USBTEST_IN (0x1|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_USBTEST))
#define OPENPCD_CMD_USBTEST_OUT (0x2|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_USBTEST))
/* FIXME */
#define OPENPCD_CMD_PIO_IRQ (0x3|OPENPCD_CLS2CMD(OPENPCD_CMD_CLS_USBTEST))
#define OPENPCD_VENDOR_ID 0x16c0
#define OPENPCD_PRODUCT_ID 0x076b
#define OPENPICC_PRODUCT_ID 0x076c
#define OPENPCD_OUT_EP 0x01
#define OPENPCD_IN_EP 0x82
#define OPENPCD_IRQ_EP 0x83
#endif
+31
View File
@@ -0,0 +1,31 @@
#ifndef _OPENPICC_H
#define _OPENPICC_H
/* OpenPICC Register definition
* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
*/
enum openpicc_register {
OPICC_REG_MODE, /* operational mode */
OPICC_REG_ISO14443A_FDT_0, /* FDT (after 0) in carrier cycles */
OPICC_REG_ISO14443A_FDT_1, /* FDT (after 1) in carrier cycles */
OPICC_REG_BITCLK_PHASE_CORR, /* signed 8bit phase correction */
OPICC_REG_SPEED_RX,
OPICC_REG_SPEED_TX,
OPICC_REG_UID_PUPI, /* UID (14443A) / PUPI (14443B) */
};
enum openpicc_reg_mode {
OPICC_MODE_14443A,
OPICC_MODE_14443B,
OPICC_MODE_LOWLEVEL, /* low-level bit-transceive mode TBD */
};
enum openpicc_reg_speed {
OPICC_SPEED_14443_106K,
OPICC_SPEED_14443_212K,
OPICC_SPEED_14443_424K,
OPICC_SPEED_14443_848K,
};
#endif /* _OPENPICC_H */
+47
View File
@@ -0,0 +1,47 @@
#ifndef _OPENPICC_STATE
#define _OPENPICC_STATE
/* according to ISO 14443-3(2000) 6.2 */
enum opicc_14443a_state {
ISO14443A_ST_POWEROFF,
ISO14443A_ST_IDLE,
ISO14443A_ST_READY,
ISO14443A_ST_ACTIVE,
ISO14443A_ST_HALT,
ISO14443A_ST_READY2,
ISO14443A_ST_ACTIVE2,
};
enum opicc_reg_tx_control {
OPICC_REG_TX_BPSK = 0x01,
OPICC_REG_TX_MANCHESTER = 0x02,
OPICC_REG_TX_INTENSITY0 = 0x00,
OPICC_REG_TX_INTENSITY1 = 0x10,
OPICC_REG_TX_INTENSITY2 = 0x20,
OPICC_REG_TX_INTENSITY3 = 0x30,
};
enum opicc_reg {
OPICC_REG_14443A_UIDLEN,/* Length of UID in bytes */
OPICC_REG_14443A_FDT0, /* Frame delay time if last bit 0 */
OPICC_REG_14443A_FDT1, /* Frame delay time if last bit 1 */
OPICC_REG_14443A_STATE, /* see 'enum opicc_14443a_state' */
OPICC_REG_14443A_ATQA, /* The ATQA template for 14443A */
OPICC_REG_RX_CLK_DIV, /* Clock divider for Rx sample clock */
OPICC_REG_RX_CLK_PHASE, /* Phase shift of Rx sample clock */
OPICC_REG_RX_COMP_LEVEL,/* Comparator level of Demodulator */
OPICC_REG_RX_CONTROL,
OPICC_REG_TX_CLK_DIV, /* Clock divider for Tx sample clock */
OPICC_REG_TX_CONTROL, /* see 'enum opicc_reg_tx_Control */
_OPICC_NUM_REGS,
};
enum openpicc_14443a_sregs {
/* string 'registers' */
OPICC_REG_14443A_UID, /* The UID (4...10 bytes) */
};
#endif
+550
View File
@@ -0,0 +1,550 @@
/*
* This file holds USB constants and structures that are needed for USB
* device APIs. These are used by the USB device model, which is defined
* in chapter 9 of the USB 2.0 specification. Linux has several APIs in C
* that need these:
*
* - the master/host side Linux-USB kernel driver API;
* - the "usbfs" user space API; and
* - the Linux "gadget" slave/device/peripheral side driver API.
*
* USB 2.0 adds an additional "On The Go" (OTG) mode, which lets systems
* act either as a USB master/host or as a USB slave/device. That means
* the master and slave side APIs benefit from working well together.
*
* There's also "Wireless USB", using low power short range radios for
* peripheral interconnection but otherwise building on the USB framework.
*/
#ifndef __LINUX_USB_CH9_H
#define __LINUX_USB_CH9_H
#include <sys/types.h>
/*-------------------------------------------------------------------------*/
/* CONTROL REQUEST SUPPORT */
/*
* USB directions
*
* This bit flag is used in endpoint descriptors' bEndpointAddress field.
* It's also one of three fields in control requests bRequestType.
*/
#define USB_DIR_OUT 0 /* to device */
#define USB_DIR_IN 0x80 /* to host */
/*
* USB types, the second of three bRequestType fields
*/
#define USB_TYPE_MASK (0x03 << 5)
#define USB_TYPE_STANDARD (0x00 << 5)
#define USB_TYPE_CLASS (0x01 << 5)
#define USB_TYPE_VENDOR (0x02 << 5)
#define USB_TYPE_RESERVED (0x03 << 5)
/*
* USB recipients, the third of three bRequestType fields
*/
#define USB_RECIP_MASK 0x1f
#define USB_RECIP_DEVICE 0x00
#define USB_RECIP_INTERFACE 0x01
#define USB_RECIP_ENDPOINT 0x02
#define USB_RECIP_OTHER 0x03
/*
* Standard requests, for the bRequest field of a SETUP packet.
*
* These are qualified by the bRequestType field, so that for example
* TYPE_CLASS or TYPE_VENDOR specific feature flags could be retrieved
* by a GET_STATUS request.
*/
#define USB_REQ_GET_STATUS 0x00
#define USB_REQ_CLEAR_FEATURE 0x01
#define USB_REQ_SET_FEATURE 0x03
#define USB_REQ_SET_ADDRESS 0x05
#define USB_REQ_GET_DESCRIPTOR 0x06
#define USB_REQ_SET_DESCRIPTOR 0x07
#define USB_REQ_GET_CONFIGURATION 0x08
#define USB_REQ_SET_CONFIGURATION 0x09
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
#define USB_REQ_GET_ENCRYPTION 0x0E
#define USB_REQ_SET_HANDSHAKE 0x0F
#define USB_REQ_GET_HANDSHAKE 0x10
#define USB_REQ_SET_CONNECTION 0x11
#define USB_REQ_SET_SECURITY_DATA 0x12
#define USB_REQ_GET_SECURITY_DATA 0x13
#define USB_REQ_SET_WUSB_DATA 0x14
#define USB_REQ_LOOPBACK_DATA_WRITE 0x15
#define USB_REQ_LOOPBACK_DATA_READ 0x16
#define USB_REQ_SET_INTERFACE_DS 0x17
/*
* USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
* are read as a bit array returned by USB_REQ_GET_STATUS. (So there
* are at most sixteen features of each type.)
*/
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
#define USB_DEVICE_BATTERY 2 /* (wireless) */
#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
/**
* struct usb_ctrlrequest - SETUP data for a USB device control request
* @bRequestType: matches the USB bmRequestType field
* @bRequest: matches the USB bRequest field
* @wValue: matches the USB wValue field (le16 byte order)
* @wIndex: matches the USB wIndex field (le16 byte order)
* @wLength: matches the USB wLength field (le16 byte order)
*
* This structure is used to send control requests to a USB device. It matches
* the different fields of the USB 2.0 Spec section 9.3, table 9-2. See the
* USB spec for a fuller description of the different fields, and what they are
* used for.
*
* Note that the driver for any interface can issue control requests.
* For most devices, interfaces don't coordinate with each other, so
* such requests may be made at any time.
*/
struct usb_ctrlrequest {
u_int8_t bRequestType;
u_int8_t bRequest;
u_int16_t wValue;
u_int16_t wIndex;
u_int16_t wLength;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/*
* STANDARD DESCRIPTORS ... as returned by GET_DESCRIPTOR, or
* (rarely) accepted by SET_DESCRIPTOR.
*
* Note that all multi-byte values here are encoded in little endian
* byte order "on the wire". But when exposed through Linux-USB APIs,
* they've been converted to cpu byte order.
*/
/*
* Descriptor types ... USB 2.0 spec table 9.5
*/
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
#define USB_DT_STRING 0x03
#define USB_DT_INTERFACE 0x04
#define USB_DT_ENDPOINT 0x05
#define USB_DT_DEVICE_QUALIFIER 0x06
#define USB_DT_OTHER_SPEED_CONFIG 0x07
#define USB_DT_INTERFACE_POWER 0x08
/* these are from a minor usb 2.0 revision (ECN) */
#define USB_DT_OTG 0x09
#define USB_DT_DEBUG 0x0a
#define USB_DT_INTERFACE_ASSOCIATION 0x0b
/* these are from the Wireless USB spec */
#define USB_DT_SECURITY 0x0c
#define USB_DT_KEY 0x0d
#define USB_DT_ENCRYPTION_TYPE 0x0e
#define USB_DT_BOS 0x0f
#define USB_DT_DEVICE_CAPABILITY 0x10
#define USB_DT_WIRELESS_ENDPOINT_COMP 0x11
/* conventional codes for class-specific descriptors */
#define USB_DT_CS_DEVICE 0x21
#define USB_DT_CS_CONFIG 0x22
#define USB_DT_CS_STRING 0x23
#define USB_DT_CS_INTERFACE 0x24
#define USB_DT_CS_ENDPOINT 0x25
/* All standard descriptors have these 2 fields at the beginning */
struct usb_descriptor_header {
u_int8_t bLength;
u_int8_t bDescriptorType;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE: Device descriptor */
struct usb_device_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t bcdUSB;
u_int8_t bDeviceClass;
u_int8_t bDeviceSubClass;
u_int8_t bDeviceProtocol;
u_int8_t bMaxPacketSize0;
u_int16_t idVendor;
u_int16_t idProduct;
u_int16_t bcdDevice;
u_int8_t iManufacturer;
u_int8_t iProduct;
u_int8_t iSerialNumber;
u_int8_t bNumConfigurations;
} __attribute__ ((packed));
#define USB_DT_DEVICE_SIZE 18
/*
* Device and/or Interface Class codes
* as found in bDeviceClass or bInterfaceClass
* and defined by www.usb.org documents
*/
#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */
#define USB_CLASS_AUDIO 1
#define USB_CLASS_COMM 2
#define USB_CLASS_HID 3
#define USB_CLASS_PHYSICAL 5
#define USB_CLASS_STILL_IMAGE 6
#define USB_CLASS_PRINTER 7
#define USB_CLASS_MASS_STORAGE 8
#define USB_CLASS_HUB 9
#define USB_CLASS_CDC_DATA 0x0a
#define USB_CLASS_CSCID 0x0b /* chip+ smart card */
#define USB_CLASS_CONTENT_SEC 0x0d /* content security */
#define USB_CLASS_VIDEO 0x0e
#define USB_CLASS_WIRELESS_CONTROLLER 0xe0
#define USB_CLASS_APP_SPEC 0xfe
#define USB_CLASS_VENDOR_SPEC 0xff
/*-------------------------------------------------------------------------*/
/* USB_DT_CONFIG: Configuration descriptor information.
*
* USB_DT_OTHER_SPEED_CONFIG is the same descriptor, except that the
* descriptor type is different. Highspeed-capable devices can look
* different depending on what speed they're currently running. Only
* devices with a USB_DT_DEVICE_QUALIFIER have any OTHER_SPEED_CONFIG
* descriptors.
*/
struct usb_config_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t wTotalLength;
u_int8_t bNumInterfaces;
u_int8_t bConfigurationValue;
u_int8_t iConfiguration;
u_int8_t bmAttributes;
u_int8_t bMaxPower;
} __attribute__ ((packed));
#define USB_DT_CONFIG_SIZE 9
/* from config descriptor bmAttributes */
#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */
#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */
#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */
#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */
/*-------------------------------------------------------------------------*/
/* USB_DT_STRING: String descriptor */
struct usb_string_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t wData[0]; /* UTF-16LE encoded */
} __attribute__ ((packed));
/* note that "string" zero is special, it holds language codes that
* the device supports, not Unicode characters.
*/
/*-------------------------------------------------------------------------*/
/* USB_DT_INTERFACE: Interface descriptor */
struct usb_interface_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bInterfaceNumber;
u_int8_t bAlternateSetting;
u_int8_t bNumEndpoints;
u_int8_t bInterfaceClass;
u_int8_t bInterfaceSubClass;
u_int8_t bInterfaceProtocol;
u_int8_t iInterface;
} __attribute__ ((packed));
#define USB_DT_INTERFACE_SIZE 9
/*-------------------------------------------------------------------------*/
/* USB_DT_ENDPOINT: Endpoint descriptor */
struct usb_endpoint_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bEndpointAddress;
u_int8_t bmAttributes;
u_int16_t wMaxPacketSize;
u_int8_t bInterval;
} __attribute__ ((packed));
#define USB_DT_ENDPOINT_SIZE 7
#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */
/*
* Endpoints
*/
#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */
#define USB_ENDPOINT_DIR_MASK 0x80
#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */
#define USB_ENDPOINT_XFER_CONTROL 0
#define USB_ENDPOINT_XFER_ISOC 1
#define USB_ENDPOINT_XFER_BULK 2
#define USB_ENDPOINT_XFER_INT 3
#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_QUALIFIER: Device Qualifier descriptor */
struct usb_qualifier_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t bcdUSB;
u_int8_t bDeviceClass;
u_int8_t bDeviceSubClass;
u_int8_t bDeviceProtocol;
u_int8_t bMaxPacketSize0;
u_int8_t bNumConfigurations;
u_int8_t bRESERVED;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_OTG (from OTG 1.0a supplement) */
struct usb_otg_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bmAttributes; /* support for HNP, SRP, etc */
} __attribute__ ((packed));
/* from usb_otg_descriptor.bmAttributes */
#define USB_OTG_SRP (1 << 0)
#define USB_OTG_HNP (1 << 1) /* swap host/device roles */
/*-------------------------------------------------------------------------*/
/* USB_DT_DEBUG: for special highspeed devices, replacing serial console */
struct usb_debug_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
/* bulk endpoints with 8 byte maxpacket */
u_int8_t bDebugInEndpoint;
u_int8_t bDebugOutEndpoint;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_INTERFACE_ASSOCIATION: groups interfaces */
struct usb_interface_assoc_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bFirstInterface;
u_int8_t bInterfaceCount;
u_int8_t bFunctionClass;
u_int8_t bFunctionSubClass;
u_int8_t bFunctionProtocol;
u_int8_t iFunction;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_SECURITY: group of wireless security descriptors, including
* encryption types available for setting up a CC/association.
*/
struct usb_security_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t wTotalLength;
u_int8_t bNumEncryptionTypes;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_KEY: used with {GET,SET}_SECURITY_DATA; only public keys
* may be retrieved.
*/
struct usb_key_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t tTKID[3];
u_int8_t bReserved;
u_int8_t bKeyData[0];
};
/*-------------------------------------------------------------------------*/
/* USB_DT_ENCRYPTION_TYPE: bundled in DT_SECURITY groups */
struct usb_encryption_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bEncryptionType;
#define USB_ENC_TYPE_UNSECURE 0
#define USB_ENC_TYPE_WIRED 1 /* non-wireless mode */
#define USB_ENC_TYPE_CCM_1 2 /* aes128/cbc session */
#define USB_ENC_TYPE_RSA_1 3 /* rsa3072/sha1 auth */
u_int8_t bEncryptionValue; /* use in SET_ENCRYPTION */
u_int8_t bAuthKeyIndex;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_BOS: group of wireless capabilities */
struct usb_bos_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t wTotalLength;
u_int8_t bNumDeviceCaps;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_CAPABILITY: grouped with BOS */
struct usb_dev_cap_header {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bDevCapabilityType;
};
#define USB_CAP_TYPE_WIRELESS_USB 1
struct usb_wireless_cap_descriptor { /* Ultra Wide Band */
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bDevCapabilityType;
u_int8_t bmAttributes;
#define USB_WIRELESS_P2P_DRD (1 << 1)
#define USB_WIRELESS_BEACON_MASK (3 << 2)
#define USB_WIRELESS_BEACON_SELF (1 << 2)
#define USB_WIRELESS_BEACON_DIRECTED (2 << 2)
#define USB_WIRELESS_BEACON_NONE (3 << 2)
u_int16_t wPHYRates; /* bit rates, Mbps */
#define USB_WIRELESS_PHY_53 (1 << 0) /* always set */
#define USB_WIRELESS_PHY_80 (1 << 1)
#define USB_WIRELESS_PHY_107 (1 << 2) /* always set */
#define USB_WIRELESS_PHY_160 (1 << 3)
#define USB_WIRELESS_PHY_200 (1 << 4) /* always set */
#define USB_WIRELESS_PHY_320 (1 << 5)
#define USB_WIRELESS_PHY_400 (1 << 6)
#define USB_WIRELESS_PHY_480 (1 << 7)
u_int8_t bmTFITXPowerInfo; /* TFI power levels */
u_int8_t bmFFITXPowerInfo; /* FFI power levels */
u_int16_t bmBandGroup;
u_int8_t bReserved;
};
/*-------------------------------------------------------------------------*/
/* USB_DT_WIRELESS_ENDPOINT_COMP: companion descriptor associated with
* each endpoint descriptor for a wireless device
*/
struct usb_wireless_ep_comp_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bMaxBurst;
u_int8_t bMaxSequence;
u_int16_t wMaxStreamDelay;
u_int16_t wOverTheAirPacketSize;
u_int8_t bOverTheAirInterval;
u_int8_t bmCompAttributes;
#define USB_ENDPOINT_SWITCH_MASK 0x03 /* in bmCompAttributes */
#define USB_ENDPOINT_SWITCH_NO 0
#define USB_ENDPOINT_SWITCH_SWITCH 1
#define USB_ENDPOINT_SWITCH_SCALE 2
};
/*-------------------------------------------------------------------------*/
/* USB_REQ_SET_HANDSHAKE is a four-way handshake used between a wireless
* host and a device for connection set up, mutual authentication, and
* exchanging short lived session keys. The handshake depends on a CC.
*/
struct usb_handshake {
u_int8_t bMessageNumber;
u_int8_t bStatus;
u_int8_t tTKID[3];
u_int8_t bReserved;
u_int8_t CDID[16];
u_int8_t nonce[16];
u_int8_t MIC[8];
};
/*-------------------------------------------------------------------------*/
/* USB_REQ_SET_CONNECTION modifies or revokes a connection context (CC).
* A CC may also be set up using non-wireless secure channels (including
* wired USB!), and some devices may support CCs with multiple hosts.
*/
struct usb_connection_context {
u_int8_t CHID[16]; /* persistent host id */
u_int8_t CDID[16]; /* device id (unique w/in host context) */
u_int8_t CK[16]; /* connection key */
};
/*-------------------------------------------------------------------------*/
/* USB 2.0 defines three speeds, here's how Linux identifies them */
enum usb_device_speed {
USB_SPEED_UNKNOWN = 0, /* enumerating */
USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
USB_SPEED_HIGH, /* usb 2.0 */
USB_SPEED_VARIABLE, /* wireless (usb 2.5) */
};
enum usb_device_state {
/* NOTATTACHED isn't in the USB spec, and this state acts
* the same as ATTACHED ... but it's clearer this way.
*/
USB_STATE_NOTATTACHED = 0,
/* chapter 9 and authentication (wireless) device states */
USB_STATE_ATTACHED,
USB_STATE_POWERED, /* wired */
USB_STATE_UNAUTHENTICATED, /* auth */
USB_STATE_RECONNECTING, /* auth */
USB_STATE_DEFAULT, /* limited function */
USB_STATE_ADDRESS,
USB_STATE_CONFIGURED, /* most functions */
USB_STATE_SUSPENDED
/* NOTE: there are actually four different SUSPENDED
* states, returning to POWERED, DEFAULT, ADDRESS, or
* CONFIGURED respectively when SOF tokens flow again.
*/
};
#endif /* __LINUX_USB_CH9_H */
+81
View File
@@ -0,0 +1,81 @@
#ifndef _USB_DFU_H
#define _USB_DFU_H
/* USB Device Firmware Update Implementation for OpenPCD
* (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
*
* Protocol definitions for USB DFU
*
* This ought to be compliant to the USB DFU Spec 1.0 as available from
* http://www.usb.org/developers/devclass_docs/usbdfu10.pdf
*
*/
#include <sys/types.h>
#define USB_DT_DFU 0x21
struct usb_dfu_func_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int8_t bmAttributes;
#define USB_DFU_CAN_DOWNLOAD (1 << 0)
#define USB_DFU_CAN_UPLOAD (1 << 1)
#define USB_DFU_MANIFEST_TOL (1 << 2)
#define USB_DFU_WILL_DETACH (1 << 3)
u_int16_t wDetachTimeOut;
u_int16_t wTransferSize;
u_int16_t bcdDFUVersion;
} __attribute__ ((packed));
#define USB_DT_DFU_SIZE 9
#define USB_TYPE_DFU (USB_TYPE_CLASS|USB_RECIP_INTERFACE)
/* DFU class-specific requests (Section 3, DFU Rev 1.1) */
#define USB_REQ_DFU_DETACH 0x00
#define USB_REQ_DFU_DNLOAD 0x01
#define USB_REQ_DFU_UPLOAD 0x02
#define USB_REQ_DFU_GETSTATUS 0x03
#define USB_REQ_DFU_CLRSTATUS 0x04
#define USB_REQ_DFU_GETSTATE 0x05
#define USB_REQ_DFU_ABORT 0x06
struct dfu_status {
u_int8_t bStatus;
u_int8_t bwPollTimeout[3];
u_int8_t bState;
u_int8_t iString;
} __attribute__((packed));
#define DFU_STATUS_OK 0x00
#define DFU_STATUS_errTARGET 0x01
#define DFU_STATUS_errFILE 0x02
#define DFU_STATUS_errWRITE 0x03
#define DFU_STATUS_errERASE 0x04
#define DFU_STATUS_errCHECK_ERASED 0x05
#define DFU_STATUS_errPROG 0x06
#define DFU_STATUS_errVERIFY 0x07
#define DFU_STATUS_errADDRESS 0x08
#define DFU_STATUS_errNOTDONE 0x09
#define DFU_STATUS_errFIRMWARE 0x0a
#define DFU_STATUS_errVENDOR 0x0b
#define DFU_STATUS_errUSBR 0x0c
#define DFU_STATUS_errPOR 0x0d
#define DFU_STATUS_errUNKNOWN 0x0e
#define DFU_STATUS_errSTALLEDPKT 0x0f
enum dfu_state {
DFU_STATE_appIDLE = 0,
DFU_STATE_appDETACH = 1,
DFU_STATE_dfuIDLE = 2,
DFU_STATE_dfuDNLOAD_SYNC = 3,
DFU_STATE_dfuDNBUSY = 4,
DFU_STATE_dfuDNLOAD_IDLE = 5,
DFU_STATE_dfuMANIFEST_SYNC = 6,
DFU_STATE_dfuMANIFEST = 7,
DFU_STATE_dfuMANIFEST_WAIT_RST = 8,
DFU_STATE_dfuUPLOAD_IDLE = 9,
DFU_STATE_dfuERROR = 10,
};
#endif /* _USB_DFU_H */
+236
View File
@@ -0,0 +1,236 @@
#ifndef _USB_HID_H
#define _USB_HID_H
/*
*
* Portions of <linux/hid.h>:
* Copyright (c) 1999 Andreas Gal
* Copyright (c) 2000-2001 Vojtech Pavlik
* Copyright (c) 2006-2007 Jiri Kosina
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
/*
* USB HID (Human Interface Device) interface class code
*/
#define USB_INTERFACE_CLASS_HID 3
/*
* USB HID interface subclass and protocol codes
*/
#define USB_INTERFACE_SUBCLASS_BOOT 1
#define USB_INTERFACE_PROTOCOL_KEYBOARD 1
#define USB_INTERFACE_PROTOCOL_MOUSE 2
/*
* HID class requests
*/
#define HID_REQ_GET_REPORT 0x01
#define HID_REQ_GET_IDLE 0x02
#define HID_REQ_GET_PROTOCOL 0x03
#define HID_REQ_SET_REPORT 0x09
#define HID_REQ_SET_IDLE 0x0A
#define HID_REQ_SET_PROTOCOL 0x0B
/*
* HID class descriptor types
*/
#define HID_DT_HID (USB_TYPE_CLASS | 0x01)
#define HID_DT_REPORT (USB_TYPE_CLASS | 0x02)
#define HID_DT_PHYSICAL (USB_TYPE_CLASS | 0x03)
#define HID_MAX_DESCRIPTOR_SIZE 4096
/*
* HID report item format
*/
#define HID_ITEM_FORMAT_SHORT 0
#define HID_ITEM_FORMAT_LONG 1
/*
* Special tag indicating long items
*/
#define HID_ITEM_TAG_LONG 15
/*
* HID report descriptor item type (prefix bit 2,3)
*/
#define HID_ITEM_TYPE_MAIN 0
#define HID_ITEM_TYPE_GLOBAL 1
#define HID_ITEM_TYPE_LOCAL 2
#define HID_ITEM_TYPE_RESERVED 3
/*
* HID report descriptor main item tags
*/
#define HID_MAIN_ITEM_TAG_INPUT 8
#define HID_MAIN_ITEM_TAG_OUTPUT 9
#define HID_MAIN_ITEM_TAG_FEATURE 11
#define HID_MAIN_ITEM_TAG_BEGIN_COLLECTION 10
#define HID_MAIN_ITEM_TAG_END_COLLECTION 12
/*
* HID report descriptor main item contents
*/
#define HID_MAIN_ITEM_CONSTANT 0x001
#define HID_MAIN_ITEM_VARIABLE 0x002
#define HID_MAIN_ITEM_RELATIVE 0x004
#define HID_MAIN_ITEM_WRAP 0x008
#define HID_MAIN_ITEM_NONLINEAR 0x010
#define HID_MAIN_ITEM_NO_PREFERRED 0x020
#define HID_MAIN_ITEM_NULL_STATE 0x040
#define HID_MAIN_ITEM_VOLATILE 0x080
#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100
/*
* HID report descriptor collection item types
*/
#define HID_COLLECTION_PHYSICAL 0
#define HID_COLLECTION_APPLICATION 1
#define HID_COLLECTION_LOGICAL 2
/*
* HID report descriptor global item tags
*/
#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0
#define HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM 1
#define HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM 2
#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM 3
#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM 4
#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 5
#define HID_GLOBAL_ITEM_TAG_UNIT 6
#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 7
#define HID_GLOBAL_ITEM_TAG_REPORT_ID 8
#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 9
#define HID_GLOBAL_ITEM_TAG_PUSH 10
#define HID_GLOBAL_ITEM_TAG_POP 11
/*
* HID report descriptor local item tags
*/
#define HID_LOCAL_ITEM_TAG_USAGE 0
#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1
#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2
#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3
#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4
#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5
#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7
#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8
#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9
#define HID_LOCAL_ITEM_TAG_DELIMITER 10
/*
* HID usage tables
*/
#define HID_USAGE_PAGE 0xffff0000
#define HID_UP_UNDEFINED 0x00000000
#define HID_UP_GENDESK 0x00010000
#define HID_UP_SIMULATION 0x00020000
#define HID_UP_KEYBOARD 0x00070000
#define HID_UP_LED 0x00080000
#define HID_UP_BUTTON 0x00090000
#define HID_UP_ORDINAL 0x000a0000
#define HID_UP_CONSUMER 0x000c0000
#define HID_UP_DIGITIZER 0x000d0000
#define HID_UP_PID 0x000f0000
#define HID_UP_HPVENDOR 0xff7f0000
#define HID_UP_MSVENDOR 0xff000000
#define HID_UP_CUSTOM 0x00ff0000
#define HID_UP_LOGIVENDOR 0xffbc0000
#define HID_USAGE 0x0000ffff
#define HID_GD_POINTER 0x00010001
#define HID_GD_MOUSE 0x00010002
#define HID_GD_JOYSTICK 0x00010004
#define HID_GD_GAMEPAD 0x00010005
#define HID_GD_KEYBOARD 0x00010006
#define HID_GD_KEYPAD 0x00010007
#define HID_GD_MULTIAXIS 0x00010008
#define HID_GD_X 0x00010030
#define HID_GD_Y 0x00010031
#define HID_GD_Z 0x00010032
#define HID_GD_RX 0x00010033
#define HID_GD_RY 0x00010034
#define HID_GD_RZ 0x00010035
#define HID_GD_SLIDER 0x00010036
#define HID_GD_DIAL 0x00010037
#define HID_GD_WHEEL 0x00010038
#define HID_GD_HATSWITCH 0x00010039
#define HID_GD_BUFFER 0x0001003a
#define HID_GD_BYTECOUNT 0x0001003b
#define HID_GD_MOTION 0x0001003c
#define HID_GD_START 0x0001003d
#define HID_GD_SELECT 0x0001003e
#define HID_GD_VX 0x00010040
#define HID_GD_VY 0x00010041
#define HID_GD_VZ 0x00010042
#define HID_GD_VBRX 0x00010043
#define HID_GD_VBRY 0x00010044
#define HID_GD_VBRZ 0x00010045
#define HID_GD_VNO 0x00010046
#define HID_GD_FEATURE 0x00010047
#define HID_GD_UP 0x00010090
#define HID_GD_DOWN 0x00010091
#define HID_GD_RIGHT 0x00010092
#define HID_GD_LEFT 0x00010093
/*
* HID report types --- Ouch! HID spec says 1 2 3!
*/
#define HID_INPUT_REPORT 0
#define HID_OUTPUT_REPORT 1
#define HID_FEATURE_REPORT 2
struct usb_hid_class_descriptor {
u_int8_t bDescriptorType;
u_int16_t wDescriptorLength;
} __attribute__ ((packed));
struct usb_hid_descriptor {
u_int8_t bLength;
u_int8_t bDescriptorType;
u_int16_t bcdHID;
u_int8_t bCountryCode;
u_int8_t bNumDescriptors;
struct hid_class_descriptor desc[1];
} __attribute__ ((packed));
/* Applications from HID Usage Tables 4/8/99 Version 1.1 */
/* We ignore a few input applications that are not widely used */
#define IS_INPUT_APPLICATION(a) (((a >= 0x00010000) && (a <= 0x00010008)) || (a == 0x00010080) || (a == 0x000c0001))
#endif