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72be7b0c2f
Matomat/firmware/main_dumbreader.lss
BlubbFish 72be7b0c2f bla
2015-11-15 18:18:42 +00:00

18470 lines
583 KiB
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main_dumbreader.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00006e44 00104000 00000000 00004000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 000002e4 00200028 00006e44 00010028 2**2
CONTENTS, ALLOC, LOAD, CODE
2 .bss 00003840 0020030c 00007128 0001030c 2**2
ALLOC
3 .ARM.attributes 0000002e 00000000 00000000 0001030c 2**0
CONTENTS, READONLY
4 .comment 0000002a 00000000 00000000 0001033a 2**0
CONTENTS, READONLY
5 .debug_aranges 00000458 00000000 00000000 00010368 2**3
CONTENTS, READONLY, DEBUGGING
6 .debug_pubnames 00000b4c 00000000 00000000 000107c0 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_info 0000e685 00000000 00000000 0001130c 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_abbrev 00003579 00000000 00000000 0001f991 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_line 00003414 00000000 00000000 00022f0a 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_frame 00001244 00000000 00000000 00026320 2**2
CONTENTS, READONLY, DEBUGGING
11 .debug_str 00003811 00000000 00000000 00027564 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 00005011 00000000 00000000 0002ad75 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000f50 00000000 00000000 0002fd88 2**3
CONTENTS, READONLY, DEBUGGING
14 .debug_pubtypes 000012b0 00000000 00000000 00030cd8 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00104000 <_startup>:
.global _startup
.func _startup
_startup:
/* Relocate .data section (copy from Flash to RAM) */
ldr r1, =_etext
104000: e59f1054 ldr r1, [pc, #84] ; 10405c <exit+0x4>
ldr r2, =_data
104004: e59f2054 ldr r2, [pc, #84] ; 104060 <exit+0x8>
ldr r3, =_edata
104008: e59f3054 ldr r3, [pc, #84] ; 104064 <exit+0xc>
0010400c <loop_r>:
loop_r: cmp r2, r3
10400c: e1520003 cmp r2, r3
ldrlo r0, [r1], #4
104010: 34910004 ldrcc r0, [r1], #4
strlo r0, [r2], #4
104014: 34820004 strcc r0, [r2], #4
blo loop_r
104018: 3afffffb bcc 10400c <loop_r>
/* Clear .bss section (Zero init) */
mov r0, #0
10401c: e3a00000 mov r0, #0
ldr r1, =__bss_start__
104020: e59f1040 ldr r1, [pc, #64] ; 104068 <exit+0x10>
ldr r2, =__bss_end__
104024: e59f2040 ldr r2, [pc, #64] ; 10406c <exit+0x14>
00104028 <loop_z>:
loop_z: cmp r1, r2
104028: e1510002 cmp r1, r2
strlo r0, [r1], #4
10402c: 34810004 strcc r0, [r1], #4
blo loop_z
104030: 3afffffc bcc 104028 <loop_z>
/* initialize FIQ mode registers */
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
104034: e321f0d1 msr CPSR_c, #209 ; 0xd1
ldr r10, =AT91C_BASE_PIOA
104038: e59fa030 ldr sl, [pc, #48] ; 104070 <exit+0x18>
ldr r12, =AT91C_BASE_TC0
10403c: e59fc030 ldr ip, [pc, #48] ; 104074 <exit+0x1c>
mov r9, #AT91C_TC_SWTRG
104040: e3a09004 mov r9, #4
msr CPSR_c, #ARM_MODE_SVC
104044: e321f013 msr CPSR_c, #19
led1on
/* prepare C function call to main */
mov r0, #0 /* argc = 0 */
104048: e3a00000 mov r0, #0
ldr lr, =exit
10404c: e59fe024 ldr lr, [pc, #36] ; 104078 <exit+0x20>
ldr r10, =main
104050: e59fa024 ldr sl, [pc, #36] ; 10407c <exit+0x24>
bx r10
104054: e12fff1a bx sl
00104058 <exit>:
/* "exit" dummy to avoid sbrk write read etc. needed by the newlib default "exit" */
.global exit
.func exit
exit:
b .
104058: eafffffe b 104058 <exit>
10405c: 0010ae44 .word 0x0010ae44
104060: 00200028 .word 0x00200028
104064: 0020030c .word 0x0020030c
104068: 0020030c .word 0x0020030c
10406c: 00203b4c .word 0x00203b4c
104070: fffff400 .word 0xfffff400
104074: fffa0000 .word 0xfffa0000
104078: 00104058 .word 0x00104058
10407c: 001080dc .word 0x001080dc
00104080 <_change_bit_be>:
/* Purpose : Function to change a bit
* Prototype: int change_bit(int bit, void *addr)
*/
ENTRY(_change_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
104080: e2200018 eor r0, r0, #24
00104084 <_change_bit_le>:
ENTRY(_change_bit_le)
bitop eor
104084: e2002007 and r2, r0, #7
104088: e3a03001 mov r3, #1
10408c: e1a03213 lsl r3, r3, r2
104090: e10fc000 mrs ip, CPSR
104094: e321f093 msr CPSR_c, #147 ; 0x93
104098: e7d121a0 ldrb r2, [r1, r0, lsr #3]
10409c: e0222003 eor r2, r2, r3
1040a0: e7c121a0 strb r2, [r1, r0, lsr #3]
1040a4: e121f00c msr CPSR_c, ip
1040a8: e1a0f00e mov pc, lr
001040ac <_clear_bit_be>:
/*
* Purpose : Function to clear a bit
* Prototype: int clear_bit(int bit, void *addr)
*/
ENTRY(_clear_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
1040ac: e2200018 eor r0, r0, #24
001040b0 <_clear_bit_le>:
ENTRY(_clear_bit_le)
bitop bic
1040b0: e2002007 and r2, r0, #7
1040b4: e3a03001 mov r3, #1
1040b8: e1a03213 lsl r3, r3, r2
1040bc: e10fc000 mrs ip, CPSR
1040c0: e321f093 msr CPSR_c, #147 ; 0x93
1040c4: e7d121a0 ldrb r2, [r1, r0, lsr #3]
1040c8: e1c22003 bic r2, r2, r3
1040cc: e7c121a0 strb r2, [r1, r0, lsr #3]
1040d0: e121f00c msr CPSR_c, ip
1040d4: e1a0f00e mov pc, lr
001040d8 <_set_bit_be>:
/*
* Purpose : Function to set a bit
* Prototype: int set_bit(int bit, void *addr)
*/
ENTRY(_set_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
1040d8: e2200018 eor r0, r0, #24
001040dc <_set_bit_le>:
ENTRY(_set_bit_le)
bitop orr
1040dc: e2002007 and r2, r0, #7
1040e0: e3a03001 mov r3, #1
1040e4: e1a03213 lsl r3, r3, r2
1040e8: e10fc000 mrs ip, CPSR
1040ec: e321f093 msr CPSR_c, #147 ; 0x93
1040f0: e7d121a0 ldrb r2, [r1, r0, lsr #3]
1040f4: e1822003 orr r2, r2, r3
1040f8: e7c121a0 strb r2, [r1, r0, lsr #3]
1040fc: e121f00c msr CPSR_c, ip
104100: e1a0f00e mov pc, lr
00104104 <_test_and_change_bit_be>:
#include <asm/assembler.h>
#include "bitops.h"
.text
ENTRY(_test_and_change_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
104104: e2200018 eor r0, r0, #24
00104108 <_test_and_change_bit_le>:
ENTRY(_test_and_change_bit_le)
testop eor, strb
104108: e08111a0 add r1, r1, r0, lsr #3
10410c: e2003007 and r3, r0, #7
104110: e3a00001 mov r0, #1
104114: e10fc000 mrs ip, CPSR
104118: e321f093 msr CPSR_c, #147 ; 0x93
10411c: e5d12000 ldrb r2, [r1]
104120: e1120310 tst r2, r0, lsl r3
104124: e0222310 eor r2, r2, r0, lsl r3
104128: e5c12000 strb r2, [r1]
10412c: e121f00c msr CPSR_c, ip
104130: 03a00000 moveq r0, #0
104134: e1a0f00e mov pc, lr
00104138 <_test_and_clear_bit_be>:
#include <asm/assembler.h>
#include "bitops.h"
.text
ENTRY(_test_and_clear_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
104138: e2200018 eor r0, r0, #24
0010413c <_test_and_clear_bit_le>:
ENTRY(_test_and_clear_bit_le)
testop bicne, strneb
10413c: e08111a0 add r1, r1, r0, lsr #3
104140: e2003007 and r3, r0, #7
104144: e3a00001 mov r0, #1
104148: e10fc000 mrs ip, CPSR
10414c: e321f093 msr CPSR_c, #147 ; 0x93
104150: e5d12000 ldrb r2, [r1]
104154: e1120310 tst r2, r0, lsl r3
104158: 11c22310 bicne r2, r2, r0, lsl r3
10415c: 15c12000 strbne r2, [r1]
104160: e121f00c msr CPSR_c, ip
104164: 03a00000 moveq r0, #0
104168: e1a0f00e mov pc, lr
0010416c <_test_and_set_bit_be>:
#include <asm/assembler.h>
#include "bitops.h"
.text
ENTRY(_test_and_set_bit_be)
eor r0, r0, #0x18 @ big endian byte ordering
10416c: e2200018 eor r0, r0, #24
00104170 <_test_and_set_bit_le>:
ENTRY(_test_and_set_bit_le)
testop orreq, streqb
104170: e08111a0 add r1, r1, r0, lsr #3
104174: e2003007 and r3, r0, #7
104178: e3a00001 mov r0, #1
10417c: e10fc000 mrs ip, CPSR
104180: e321f093 msr CPSR_c, #147 ; 0x93
104184: e5d12000 ldrb r2, [r1]
104188: e1120310 tst r2, r0, lsl r3
10418c: 01822310 orreq r2, r2, r0, lsl r3
104190: 05c12000 strbeq r2, [r1]
104194: e121f00c msr CPSR_c, ip
104198: 03a00000 moveq r0, #0
10419c: e1a0f00e mov pc, lr
001041a0 <__umodsi3>:
mov pc, lr
*/
ENTRY(__umodsi3)
subs r2, r1, #1 @ compare divisor with 1
1041a0: e2512001 subs r2, r1, #1
bcc Ldiv0
1041a4: 3a0000a7 bcc 104448 <Ldiv0>
cmpne r0, r1 @ compare dividend with divisor
1041a8: 11500001 cmpne r0, r1
moveq r0, #0
1041ac: 03a00000 moveq r0, #0
tsthi r1, r2 @ see if divisor is power of 2
1041b0: 81110002 tsthi r1, r2
andeq r0, r0, r2
1041b4: 00000002 andeq r0, r0, r2
movls pc, lr
1041b8: 91a0f00e movls pc, lr
clz \spare, \dividend
sub \order, \order, \spare
mov \divisor, \divisor, lsl \order
#else
1041bc: e3a02000 mov r2, #0
1041c0: e3510201 cmp r1, #268435456 ; 0x10000000
1041c4: 31510000 cmpcc r1, r0
1041c8: 31a01201 lslcc r1, r1, #4
1041cc: 32822004 addcc r2, r2, #4
1041d0: 3afffffa bcc 1041c0 <__umodsi3+0x20>
1041d4: e3510102 cmp r1, #-2147483648 ; 0x80000000
1041d8: 31510000 cmpcc r1, r0
1041dc: 31a01081 lslcc r1, r1, #1
1041e0: 32822001 addcc r2, r2, #1
1041e4: 3afffffa bcc 1041d4 <__umodsi3+0x34>
1041e8: e2522003 subs r2, r2, #3
1041ec: ba00000e blt 10422c <__umodsi3+0x8c>
1041f0: e1500001 cmp r0, r1
1041f4: 20400001 subcs r0, r0, r1
1041f8: e15000a1 cmp r0, r1, lsr #1
1041fc: 204000a1 subcs r0, r0, r1, lsr #1
104200: e1500121 cmp r0, r1, lsr #2
104204: 20400121 subcs r0, r0, r1, lsr #2
104208: e15001a1 cmp r0, r1, lsr #3
10420c: 204001a1 subcs r0, r0, r1, lsr #3
104210: e3500001 cmp r0, #1
104214: e1a01221 lsr r1, r1, #4
104218: a2522004 subsge r2, r2, #4
10421c: aafffff3 bge 1041f0 <__umodsi3+0x50>
104220: e3120003 tst r2, #3
104224: 13300000 teqne r0, #0
104228: 0a00000a beq 104258 <__umodsi3+0xb8>
10422c: e3720002 cmn r2, #2
104230: ba000006 blt 104250 <__umodsi3+0xb0>
104234: 0a000002 beq 104244 <__umodsi3+0xa4>
104238: e1500001 cmp r0, r1
10423c: 20400001 subcs r0, r0, r1
104240: e1a010a1 lsr r1, r1, #1
104244: e1500001 cmp r0, r1
104248: 20400001 subcs r0, r0, r1
10424c: e1a010a1 lsr r1, r1, #1
104250: e1500001 cmp r0, r1
104254: 20400001 subcs r0, r0, r1
andeq r0, r0, r2
movls pc, lr
ARM_MOD_BODY r0, r1, r2, r3
mov pc, lr
104258: e1a0f00e mov pc, lr
0010425c <__aeabi_idiv>:
ENTRY(__divsi3)
ENTRY(__aeabi_idiv)
cmp r1, #0
10425c: e3510000 cmp r1, #0
eor ip, r0, r1 @ save the sign of the result.
104260: e020c001 eor ip, r0, r1
beq Ldiv0
104264: 0a000077 beq 104448 <Ldiv0>
rsbmi r1, r1, #0 @ loops below use unsigned.
104268: 42611000 rsbmi r1, r1, #0
subs r2, r1, #1 @ division by 1 or -1 ?
10426c: e2512001 subs r2, r1, #1
beq 10f
104270: 0a000027 beq 104314 <__aeabi_idiv+0xb8>
movs r3, r0
104274: e1b03000 movs r3, r0
rsbmi r3, r0, #0 @ positive dividend value
104278: 42603000 rsbmi r3, r0, #0
cmp r3, r1
10427c: e1530001 cmp r3, r1
bls 11f
104280: 9a000026 bls 104320 <__aeabi_idiv+0xc4>
tst r1, r2 @ divisor is power of 2 ?
104284: e1110002 tst r1, r2
beq 12f
104288: 0a000028 beq 104330 <__aeabi_idiv+0xd4>
mov \divisor, \divisor, lsl \result
mov \curbit, \curbit, lsl \result
mov \result, #0
#else
10428c: e311020e tst r1, #-536870912 ; 0xe0000000
104290: 01a01181 lsleq r1, r1, #3
104294: 03a02008 moveq r2, #8
104298: 13a02001 movne r2, #1
10429c: e3510201 cmp r1, #268435456 ; 0x10000000
1042a0: 31510003 cmpcc r1, r3
1042a4: 31a01201 lslcc r1, r1, #4
1042a8: 31a02202 lslcc r2, r2, #4
1042ac: 3afffffa bcc 10429c <__aeabi_idiv+0x40>
1042b0: e3510102 cmp r1, #-2147483648 ; 0x80000000
1042b4: 31510003 cmpcc r1, r3
1042b8: 31a01081 lslcc r1, r1, #1
1042bc: 31a02082 lslcc r2, r2, #1
1042c0: 3afffffa bcc 1042b0 <__aeabi_idiv+0x54>
1042c4: e3a00000 mov r0, #0
1042c8: e1530001 cmp r3, r1
1042cc: 20433001 subcs r3, r3, r1
1042d0: 21800002 orrcs r0, r0, r2
1042d4: e15300a1 cmp r3, r1, lsr #1
1042d8: 204330a1 subcs r3, r3, r1, lsr #1
1042dc: 218000a2 orrcs r0, r0, r2, lsr #1
1042e0: e1530121 cmp r3, r1, lsr #2
1042e4: 20433121 subcs r3, r3, r1, lsr #2
1042e8: 21800122 orrcs r0, r0, r2, lsr #2
1042ec: e15301a1 cmp r3, r1, lsr #3
1042f0: 204331a1 subcs r3, r3, r1, lsr #3
1042f4: 218001a2 orrcs r0, r0, r2, lsr #3
1042f8: e3530000 cmp r3, #0
1042fc: 11b02222 lsrsne r2, r2, #4
104300: 11a01221 lsrne r1, r1, #4
104304: 1affffef bne 1042c8 <__aeabi_idiv+0x6c>
tst r1, r2 @ divisor is power of 2 ?
beq 12f
ARM_DIV_BODY r3, r1, r0, r2
cmp ip, #0
104308: e35c0000 cmp ip, #0
rsbmi r0, r0, #0
10430c: 42600000 rsbmi r0, r0, #0
mov pc, lr
104310: e1a0f00e mov pc, lr
10: teq ip, r0 @ same sign ?
104314: e13c0000 teq ip, r0
rsbmi r0, r0, #0
104318: 42600000 rsbmi r0, r0, #0
mov pc, lr
10431c: e1a0f00e mov pc, lr
11: movlo r0, #0
104320: 33a00000 movcc r0, #0
moveq r0, ip, asr #31
104324: 01a00fcc asreq r0, ip, #31
orreq r0, r0, #1
104328: 03800001 orreq r0, r0, #1
mov pc, lr
10432c: e1a0f00e mov pc, lr
clz \order, \divisor
rsb \order, \order, #31
#else
104330: e3510801 cmp r1, #65536 ; 0x10000
104334: 21a01821 lsrcs r1, r1, #16
104338: 23a02010 movcs r2, #16
10433c: 33a02000 movcc r2, #0
104340: e3510c01 cmp r1, #256 ; 0x100
104344: 21a01421 lsrcs r1, r1, #8
104348: 22822008 addcs r2, r2, #8
10434c: e3510010 cmp r1, #16
104350: 21a01221 lsrcs r1, r1, #4
104354: 22822004 addcs r2, r2, #4
104358: e3510004 cmp r1, #4
10435c: 82822003 addhi r2, r2, #3
104360: 908220a1 addls r2, r2, r1, lsr #1
orreq r0, r0, #1
mov pc, lr
12: ARM_DIV2_ORDER r1, r2
cmp ip, #0
104364: e35c0000 cmp ip, #0
mov r0, r3, lsr r2
104368: e1a00233 lsr r0, r3, r2
rsbmi r0, r0, #0
10436c: 42600000 rsbmi r0, r0, #0
mov pc, lr
104370: e1a0f00e mov pc, lr
00104374 <__modsi3>:
ENTRY(__modsi3)
cmp r1, #0
104374: e3510000 cmp r1, #0
beq Ldiv0
104378: 0a000032 beq 104448 <Ldiv0>
rsbmi r1, r1, #0 @ loops below use unsigned.
10437c: 42611000 rsbmi r1, r1, #0
movs ip, r0 @ preserve sign of dividend
104380: e1b0c000 movs ip, r0
rsbmi r0, r0, #0 @ if negative make positive
104384: 42600000 rsbmi r0, r0, #0
subs r2, r1, #1 @ compare divisor with 1
104388: e2512001 subs r2, r1, #1
cmpne r0, r1 @ compare dividend with divisor
10438c: 11500001 cmpne r0, r1
moveq r0, #0
104390: 03a00000 moveq r0, #0
tsthi r1, r2 @ see if divisor is power of 2
104394: 81110002 tsthi r1, r2
andeq r0, r0, r2
104398: 00000002 andeq r0, r0, r2
bls 10f
10439c: 9a000026 bls 10443c <__modsi3+0xc8>
clz \spare, \dividend
sub \order, \order, \spare
mov \divisor, \divisor, lsl \order
#else
1043a0: e3a02000 mov r2, #0
1043a4: e3510201 cmp r1, #268435456 ; 0x10000000
1043a8: 31510000 cmpcc r1, r0
1043ac: 31a01201 lslcc r1, r1, #4
1043b0: 32822004 addcc r2, r2, #4
1043b4: 3afffffa bcc 1043a4 <__modsi3+0x30>
1043b8: e3510102 cmp r1, #-2147483648 ; 0x80000000
1043bc: 31510000 cmpcc r1, r0
1043c0: 31a01081 lslcc r1, r1, #1
1043c4: 32822001 addcc r2, r2, #1
1043c8: 3afffffa bcc 1043b8 <__modsi3+0x44>
1043cc: e2522003 subs r2, r2, #3
1043d0: ba00000e blt 104410 <__modsi3+0x9c>
1043d4: e1500001 cmp r0, r1
1043d8: 20400001 subcs r0, r0, r1
1043dc: e15000a1 cmp r0, r1, lsr #1
1043e0: 204000a1 subcs r0, r0, r1, lsr #1
1043e4: e1500121 cmp r0, r1, lsr #2
1043e8: 20400121 subcs r0, r0, r1, lsr #2
1043ec: e15001a1 cmp r0, r1, lsr #3
1043f0: 204001a1 subcs r0, r0, r1, lsr #3
1043f4: e3500001 cmp r0, #1
1043f8: e1a01221 lsr r1, r1, #4
1043fc: a2522004 subsge r2, r2, #4
104400: aafffff3 bge 1043d4 <__modsi3+0x60>
104404: e3120003 tst r2, #3
104408: 13300000 teqne r0, #0
10440c: 0a00000a beq 10443c <__modsi3+0xc8>
104410: e3720002 cmn r2, #2
104414: ba000006 blt 104434 <__modsi3+0xc0>
104418: 0a000002 beq 104428 <__modsi3+0xb4>
10441c: e1500001 cmp r0, r1
104420: 20400001 subcs r0, r0, r1
104424: e1a010a1 lsr r1, r1, #1
104428: e1500001 cmp r0, r1
10442c: 20400001 subcs r0, r0, r1
104430: e1a010a1 lsr r1, r1, #1
104434: e1500001 cmp r0, r1
104438: 20400001 subcs r0, r0, r1
andeq r0, r0, r2
bls 10f
ARM_MOD_BODY r0, r1, r2, r3
10: cmp ip, #0
10443c: e35c0000 cmp ip, #0
rsbmi r0, r0, #0
104440: 42600000 rsbmi r0, r0, #0
mov pc, lr
104444: e1a0f00e mov pc, lr
00104448 <Ldiv0>:
#endif
Ldiv0:
str lr, [sp, #-8]!
104448: e52de008 str lr, [sp, #-8]!
bl __div0
10444c: eb000001 bl 104458 <__div0>
mov r0, #0 @ About as wrong as it could be.
104450: e3a00000 mov r0, #0
ldr pc, [sp], #8
104454: e49df008 ldr pc, [sp], #8
00104458 <__div0>:
ENTRY(__div0)
mov pc, lr
104458: e1a0f00e mov pc, lr
0010445c <__do_div64>:
*/
ENTRY(__do_div64)
@ Test for easy paths first.
subs ip, r4, #1
10445c: e254c001 subs ip, r4, #1
bls 9f @ divisor is 0 or 1
104460: 9a00003f bls 104564 <__do_div64+0x108>
tst ip, r4
104464: e11c0004 tst ip, r4
beq 8f @ divisor is power of 2
104468: 0a000028 beq 104510 <__do_div64+0xb4>
@ See if we need to handle upper 32-bit result.
cmp xh, r4
10446c: e1510004 cmp r1, r4
mov yh, #0
104470: e3a03000 mov r3, #0
blo 3f
104474: 3a00000c bcc 1044ac <__do_div64+0x50>
mov ip, ip, lsl yl
mov yl, r4, lsl yl
#else
mov yl, r4
104478: e1a02004 mov r2, r4
mov ip, #1
10447c: e3a0c001 mov ip, #1
1: cmp yl, #0x80000000
104480: e3520102 cmp r2, #-2147483648 ; 0x80000000
cmpcc yl, xh
104484: 31520001 cmpcc r2, r1
movcc yl, yl, lsl #1
104488: 31a02082 lslcc r2, r2, #1
movcc ip, ip, lsl #1
10448c: 31a0c08c lslcc ip, ip, #1
bcc 1b
104490: 3afffffa bcc 104480 <__do_div64+0x24>
#endif
@ The division loop for needed upper bit positions.
@ Break out early if dividend reaches 0.
2: cmp xh, yl
104494: e1510002 cmp r1, r2
orrcs yh, yh, ip
104498: 2183300c orrcs r3, r3, ip
subcss xh, xh, yl
10449c: 20511002 subscs r1, r1, r2
movnes ip, ip, lsr #1
1044a0: 11b0c0ac lsrsne ip, ip, #1
mov yl, yl, lsr #1
1044a4: e1a020a2 lsr r2, r2, #1
bne 2b
1044a8: 1afffff9 bne 104494 <__do_div64+0x38>
@ See if we need to handle lower 32-bit result.
3: cmp xh, #0
1044ac: e3510000 cmp r1, #0
mov yl, #0
1044b0: e3a02000 mov r2, #0
cmpeq xl, r4
1044b4: 01500004 cmpeq r0, r4
movlo xh, xl
1044b8: 31a01000 movcc r1, r0
movlo pc, lr
1044bc: 31a0f00e movcc pc, lr
@ The division loop for lower bit positions.
@ Here we shift remainer bits leftwards rather than moving the
@ divisor for comparisons, considering the carry-out bit as well.
mov ip, #0x80000000
1044c0: e3a0c102 mov ip, #-2147483648 ; 0x80000000
4: movs xl, xl, lsl #1
1044c4: e1b00080 lsls r0, r0, #1
adcs xh, xh, xh
1044c8: e0b11001 adcs r1, r1, r1
beq 6f
1044cc: 0a000005 beq 1044e8 <__do_div64+0x8c>
cmpcc xh, r4
1044d0: 31510004 cmpcc r1, r4
5: orrcs yl, yl, ip
1044d4: 2182200c orrcs r2, r2, ip
subcs xh, xh, r4
1044d8: 20411004 subcs r1, r1, r4
movs ip, ip, lsr #1
1044dc: e1b0c0ac lsrs ip, ip, #1
bne 4b
1044e0: 1afffff7 bne 1044c4 <__do_div64+0x68>
mov pc, lr
1044e4: e1a0f00e mov pc, lr
@ The top part of remainder became zero. If carry is set
@ (the 33th bit) this is a false positive so resume the loop.
@ Otherwise, if lower part is also null then we are done.
6: bcs 5b
1044e8: 2afffff9 bcs 1044d4 <__do_div64+0x78>
cmp xl, #0
1044ec: e3500000 cmp r0, #0
moveq pc, lr
1044f0: 01a0f00e moveq pc, lr
mov xl, xl, lsl xh
mov ip, ip, lsr xh
#else
7: movs xl, xl, lsl #1
1044f4: e1b00080 lsls r0, r0, #1
mov ip, ip, lsr #1
1044f8: e1a0c0ac lsr ip, ip, #1
bcc 7b
1044fc: 3afffffc bcc 1044f4 <__do_div64+0x98>
@ Current remainder is now 1. It is worthless to compare with
@ divisor at this point since divisor can not be smaller than 3 here.
@ If possible, branch for another shift in the division loop.
@ If no bit position left then we are done.
movs ip, ip, lsr #1
104500: e1b0c0ac lsrs ip, ip, #1
mov xh, #1
104504: e3a01001 mov r1, #1
bne 4b
104508: 1affffed bne 1044c4 <__do_div64+0x68>
mov pc, lr
10450c: e1a0f00e mov pc, lr
clz ip, r4
rsb ip, ip, #31
#else
mov yl, r4
104510: e1a02004 mov r2, r4
cmp r4, #(1 << 16)
104514: e3540801 cmp r4, #65536 ; 0x10000
mov ip, #0
104518: e3a0c000 mov ip, #0
movhs yl, yl, lsr #16
10451c: 21a02822 lsrcs r2, r2, #16
movhs ip, #16
104520: 23a0c010 movcs ip, #16
cmp yl, #(1 << 8)
104524: e3520c01 cmp r2, #256 ; 0x100
movhs yl, yl, lsr #8
104528: 21a02422 lsrcs r2, r2, #8
addhs ip, ip, #8
10452c: 228cc008 addcs ip, ip, #8
cmp yl, #(1 << 4)
104530: e3520010 cmp r2, #16
movhs yl, yl, lsr #4
104534: 21a02222 lsrcs r2, r2, #4
addhs ip, ip, #4
104538: 228cc004 addcs ip, ip, #4
cmp yl, #(1 << 2)
10453c: e3520004 cmp r2, #4
addhi ip, ip, #3
104540: 828cc003 addhi ip, ip, #3
addls ip, ip, yl, lsr #1
104544: 908cc0a2 addls ip, ip, r2, lsr #1
#endif
mov yh, xh, lsr ip
104548: e1a03c31 lsr r3, r1, ip
mov yl, xl, lsr ip
10454c: e1a02c30 lsr r2, r0, ip
rsb ip, ip, #32
104550: e26cc020 rsb ip, ip, #32
orr yl, yl, xh, lsl ip
104554: e1822c11 orr r2, r2, r1, lsl ip
mov xh, xl, lsl ip
104558: e1a01c10 lsl r1, r0, ip
mov xh, xh, lsr ip
10455c: e1a01c31 lsr r1, r1, ip
mov pc, lr
104560: e1a0f00e mov pc, lr
@ eq -> division by 1: obvious enough...
9: moveq yl, xl
104564: 01a02000 moveq r2, r0
moveq yh, xh
104568: 01a03001 moveq r3, r1
moveq xh, #0
10456c: 03a01000 moveq r1, #0
moveq pc, lr
104570: 01a0f00e moveq pc, lr
@ Division by 0:
str lr, [sp, #-8]!
104574: e52de008 str lr, [sp, #-8]!
bl __div0
104578: ebffffb6 bl 104458 <__div0>
@ as wrong as it could be...
mov yl, #0
10457c: e3a02000 mov r2, #0
mov yh, #0
104580: e3a03000 mov r3, #0
mov xh, #0
104584: e3a01000 mov r1, #0
ldr pc, [sp], #8
104588: e49df008 ldr pc, [sp], #8
0010458c <AT91F_AIC_ConfigureIt>:
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id, // \arg interrupt number to initialize
unsigned int priority, // \arg priority to give to the interrupt
unsigned int src_type, // \arg activation and sense of activation
void (*newHandler) () ) // \arg address of the interrupt handler
{
10458c: e92d0030 push {r4, r5}
unsigned int oldHandler;
unsigned int mask ;
oldHandler = pAic->AIC_SVR[irq_id];
mask = 0x1 << irq_id ;
104590: e3a04001 mov r4, #1
104594: e1a04114 lsl r4, r4, r1
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
//* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
//* Store the Source Mode Register
pAic->AIC_SMR[irq_id] = src_type | priority ;
104598: e1833002 orr r3, r3, r2
mask = 0x1 << irq_id ;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
//* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
10459c: e59d2008 ldr r2, [sp, #8]
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id, // \arg interrupt number to initialize
unsigned int priority, // \arg priority to give to the interrupt
unsigned int src_type, // \arg activation and sense of activation
void (*newHandler) () ) // \arg address of the interrupt handler
{
1045a0: e1a0c000 mov ip, r0
unsigned int oldHandler;
unsigned int mask ;
oldHandler = pAic->AIC_SVR[irq_id];
1045a4: e2815020 add r5, r1, #32
1045a8: e7900105 ldr r0, [r0, r5, lsl #2]
mask = 0x1 << irq_id ;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
1045ac: e58c4124 str r4, [ip, #292] ; 0x124
//* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
1045b0: e78c2105 str r2, [ip, r5, lsl #2]
//* Store the Source Mode Register
pAic->AIC_SMR[irq_id] = src_type | priority ;
1045b4: e78c3101 str r3, [ip, r1, lsl #2]
//* Clear the interrupt on the interrupt controller
pAic->AIC_ICCR = mask ;
1045b8: e58c4128 str r4, [ip, #296] ; 0x128
return oldHandler;
}
1045bc: e8bd0030 pop {r4, r5}
1045c0: e12fff1e bx lr
001045c4 <AT91F_AIC_SetExceptionVector>:
unsigned int *pVector, // \arg pointer to the AIC registers
void (*Handler) () ) // \arg Interrupt Handler
{
unsigned int oldVector = *pVector;
if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
1045c4: e59f2028 ldr r2, [pc, #40] ; 1045f4 <AT91F_AIC_SetExceptionVector+0x30>
//* \brief Configure vector handler
//*----------------------------------------------------------------------------
unsigned int AT91F_AIC_SetExceptionVector (
unsigned int *pVector, // \arg pointer to the AIC registers
void (*Handler) () ) // \arg Interrupt Handler
{
1045c8: e1a03000 mov r3, r0
unsigned int oldVector = *pVector;
if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
1045cc: e1510002 cmp r1, r2
*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
else
*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
1045d0: 10632001 rsbne r2, r3, r1
1045d4: 12422008 subne r2, r2, #8
1045d8: 11a02122 lsrne r2, r2, #2
1045dc: 13c224ff bicne r2, r2, #-16777216 ; 0xff000000
1045e0: 138224ea orrne r2, r2, #-369098752 ; 0xea000000
//*----------------------------------------------------------------------------
unsigned int AT91F_AIC_SetExceptionVector (
unsigned int *pVector, // \arg pointer to the AIC registers
void (*Handler) () ) // \arg Interrupt Handler
{
unsigned int oldVector = *pVector;
1045e4: e5900000 ldr r0, [r0]
if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
1045e8: 05831000 streq r1, [r3]
else
*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
1045ec: 15832000 strne r2, [r3]
return oldVector;
}
1045f0: e12fff1e bx lr
1045f4: e51fff20 .word 0xe51fff20
001045f8 <AT91F_AIC_Open>:
void (*IrqHandler) (), // \arg Default IRQ vector exception
void (*FiqHandler) (), // \arg Default FIQ vector exception
void (*DefaultHandler) (), // \arg Default Handler set in ISR
void (*SpuriousHandler) (), // \arg Default Spurious Handler
unsigned int protectMode) // \arg Debug Control Register
{
1045f8: e92d07f0 push {r4, r5, r6, r7, r8, r9, sl}
int i;
// Disable all interrupts and set IVR to the default handler
for (i = 0; i < 32; ++i) {
1045fc: e3a0c000 mov ip, #0
//*----------------------------------------------------------------------------
static inline void AT91F_AIC_DisableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
unsigned int mask = 0x1 << irq_id;
104600: e3a09001 mov r9, #1
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
//* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
//* Store the Source Mode Register
pAic->AIC_SMR[irq_id] = src_type | priority ;
104604: e3a0a040 mov sl, #64 ; 0x40
104608: e1a05c19 lsl r5, r9, ip
unsigned int protectMode) // \arg Debug Control Register
{
int i;
// Disable all interrupts and set IVR to the default handler
for (i = 0; i < 32; ++i) {
10460c: e28c6001 add r6, ip, #1
104610: e1a04619 lsl r4, r9, r6
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
104614: e5805124 str r5, [r0, #292] ; 0x124
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = mask ;
104618: e5805128 str r5, [r0, #296] ; 0x128
void (*newHandler) () ) // \arg address of the interrupt handler
{
unsigned int oldHandler;
unsigned int mask ;
oldHandler = pAic->AIC_SVR[irq_id];
10461c: e28c8020 add r8, ip, #32
104620: e7907108 ldr r7, [r0, r8, lsl #2]
mask = 0x1 << irq_id ;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
104624: e5805124 str r5, [r0, #292] ; 0x124
void (*newHandler) () ) // \arg address of the interrupt handler
{
unsigned int oldHandler;
unsigned int mask ;
oldHandler = pAic->AIC_SVR[irq_id];
104628: e28c7021 add r7, ip, #33 ; 0x21
mask = 0x1 << irq_id ;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
//* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
10462c: e7803108 str r3, [r0, r8, lsl #2]
//* Store the Source Mode Register
pAic->AIC_SMR[irq_id] = src_type | priority ;
104630: e780a10c str sl, [r0, ip, lsl #2]
//* Clear the interrupt on the interrupt controller
pAic->AIC_ICCR = mask ;
104634: e5805128 str r5, [r0, #296] ; 0x128
unsigned int protectMode) // \arg Debug Control Register
{
int i;
// Disable all interrupts and set IVR to the default handler
for (i = 0; i < 32; ++i) {
104638: e28cc002 add ip, ip, #2
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
unsigned int mask = 0x1 << irq_id;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
10463c: e5804124 str r4, [r0, #292] ; 0x124
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = mask ;
104640: e5804128 str r4, [r0, #296] ; 0x128
104644: e35c0020 cmp ip, #32
void (*newHandler) () ) // \arg address of the interrupt handler
{
unsigned int oldHandler;
unsigned int mask ;
oldHandler = pAic->AIC_SVR[irq_id];
104648: e7905107 ldr r5, [r0, r7, lsl #2]
mask = 0x1 << irq_id ;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
10464c: e5804124 str r4, [r0, #292] ; 0x124
//* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
104650: e7803107 str r3, [r0, r7, lsl #2]
//* Store the Source Mode Register
pAic->AIC_SMR[irq_id] = src_type | priority ;
104654: e780a106 str sl, [r0, r6, lsl #2]
//* Clear the interrupt on the interrupt controller
pAic->AIC_ICCR = mask ;
104658: e5804128 str r4, [r0, #296] ; 0x128
unsigned int protectMode) // \arg Debug Control Register
{
int i;
// Disable all interrupts and set IVR to the default handler
for (i = 0; i < 32; ++i) {
10465c: 1affffe9 bne 104608 <AT91F_AIC_Open+0x10>
unsigned int *pVector, // \arg pointer to the AIC registers
void (*Handler) () ) // \arg Interrupt Handler
{
unsigned int oldVector = *pVector;
if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
104660: e59f3050 ldr r3, [pc, #80] ; 1046b8 <AT91F_AIC_Open+0xc0>
104664: e1510003 cmp r1, r3
*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
else
*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
104668: 12411020 subne r1, r1, #32
10466c: 11a01121 lsrne r1, r1, #2
unsigned int *pVector, // \arg pointer to the AIC registers
void (*Handler) () ) // \arg Interrupt Handler
{
unsigned int oldVector = *pVector;
if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
104670: e59f3040 ldr r3, [pc, #64] ; 1046b8 <AT91F_AIC_Open+0xc0>
*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
else
*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
104674: 13c114ff bicne r1, r1, #-16777216 ; 0xff000000
104678: 138114ea orrne r1, r1, #-369098752 ; 0xea000000
unsigned int *pVector, // \arg pointer to the AIC registers
void (*Handler) () ) // \arg Interrupt Handler
{
unsigned int oldVector = *pVector;
if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
10467c: e1520003 cmp r2, r3
*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
else
*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
104680: 12422024 subne r2, r2, #36 ; 0x24
104684: 11a02122 lsrne r2, r2, #2
104688: e3a0c000 mov ip, #0
10468c: 13c224ff bicne r2, r2, #-16777216 ; 0xff000000
104690: e58c1018 str r1, [ip, #24]
104694: 138224ea orrne r2, r2, #-369098752 ; 0xea000000
104698: e3a0c000 mov ip, #0
10469c: e58c201c str r2, [ip, #28]
// Set the IRQ exception vector
AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
// Set the Fast Interrupt exception vector
AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
pAic->AIC_SPU = (unsigned int) SpuriousHandler;
1046a0: e28d101c add r1, sp, #28
1046a4: e891000a ldm r1, {r1, r3}
1046a8: e5801134 str r1, [r0, #308] ; 0x134
pAic->AIC_DCR = protectMode;
1046ac: e5803138 str r3, [r0, #312] ; 0x138
}
1046b0: e8bd07f0 pop {r4, r5, r6, r7, r8, r9, sl}
1046b4: e12fff1e bx lr
1046b8: e51fff20 .word 0xe51fff20
001046bc <AT91F_PDC_Open>:
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
1046bc: e3a03002 mov r3, #2
1046c0: e5803020 str r3, [r0, #32]
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
1046c4: e3a0c000 mov ip, #0
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
1046c8: e3a02c02 mov r2, #512 ; 0x200
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
1046cc: e3a01001 mov r1, #1
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
1046d0: e3a03c01 mov r3, #256 ; 0x100
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
1046d4: e5802020 str r2, [r0, #32]
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
1046d8: e580c018 str ip, [r0, #24]
pPDC->PDC_TNCR = bytes;
1046dc: e580c01c str ip, [r0, #28]
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
1046e0: e580c010 str ip, [r0, #16]
pPDC->PDC_RNCR = bytes;
1046e4: e580c014 str ip, [r0, #20]
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
1046e8: e580c008 str ip, [r0, #8]
pPDC->PDC_TCR = bytes;
1046ec: e580c00c str ip, [r0, #12]
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
1046f0: e580c000 str ip, [r0]
pPDC->PDC_RCR = bytes;
1046f4: e580c004 str ip, [r0, #4]
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
1046f8: e5801020 str r1, [r0, #32]
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
1046fc: e5803020 str r3, [r0, #32]
AT91F_PDC_SetRx(pPDC, NULL, 0);
//* Enable the RX and TX PDC transfer requests
AT91F_PDC_EnableRx(pPDC);
AT91F_PDC_EnableTx(pPDC);
}
104700: e12fff1e bx lr
00104704 <AT91F_PDC_Close>:
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104704: e3a03000 mov r3, #0
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104708: e3a01002 mov r1, #2
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
10470c: e3a02c02 mov r2, #512 ; 0x200
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104710: e5801020 str r1, [r0, #32]
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104714: e5802020 str r2, [r0, #32]
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104718: e5803018 str r3, [r0, #24]
pPDC->PDC_TNCR = bytes;
10471c: e580301c str r3, [r0, #28]
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
104720: e5803010 str r3, [r0, #16]
pPDC->PDC_RNCR = bytes;
104724: e5803014 str r3, [r0, #20]
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
104728: e5803008 str r3, [r0, #8]
pPDC->PDC_TCR = bytes;
10472c: e580300c str r3, [r0, #12]
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
104730: e5803000 str r3, [r0]
pPDC->PDC_RCR = bytes;
104734: e5803004 str r3, [r0, #4]
AT91F_PDC_SetNextTx(pPDC, NULL, 0);
AT91F_PDC_SetNextRx(pPDC, NULL, 0);
AT91F_PDC_SetTx(pPDC, NULL, 0);
AT91F_PDC_SetRx(pPDC, NULL, 0);
}
104738: e12fff1e bx lr
0010473c <AT91F_PDC_SendFrame>:
//* \brief Test if the current transfer descriptor has been sent
//*----------------------------------------------------------------------------
static inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
return !(pPDC->PDC_TCR);
10473c: e590c00c ldr ip, [r0, #12]
const unsigned char *pBuffer,
unsigned int szBuffer,
const unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
if (AT91F_PDC_IsTxEmpty(pPDC)) {
104740: e35c0000 cmp ip, #0
104744: 1a000007 bne 104768 <AT91F_PDC_SendFrame+0x2c>
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
104748: e5801008 str r1, [r0, #8]
pPDC->PDC_TCR = bytes;
10474c: e580200c str r2, [r0, #12]
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104750: e5803018 str r3, [r0, #24]
pPDC->PDC_TNCR = bytes;
104754: e59d3000 ldr r3, [sp]
//* Buffer and next buffer can be initialized
AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
return 2;
104758: e3a01002 mov r1, #2
10475c: e580301c str r3, [r0, #28]
}
else {
//* All buffer are in use...
return 0;
}
}
104760: e1a00001 mov r0, r1
104764: e12fff1e bx lr
//* \brief Test if the next transfer descriptor has been moved to the current td
//*----------------------------------------------------------------------------
static inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
return !(pPDC->PDC_TNCR);
104768: e590c01c ldr ip, [r0, #28]
//* Buffer and next buffer can be initialized
AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
return 2;
}
else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
10476c: e35c0000 cmp ip, #0
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104770: 05801018 streq r1, [r0, #24]
AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
return 1;
}
else {
//* All buffer are in use...
return 0;
104774: 13a01000 movne r1, #0
return 2;
}
else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
//* Only one buffer can be initialized
AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
return 1;
104778: 03a01001 moveq r1, #1
pPDC->PDC_TNCR = bytes;
10477c: 0580201c streq r2, [r0, #28]
}
else {
//* All buffer are in use...
return 0;
}
}
104780: e1a00001 mov r0, r1
104784: e12fff1e bx lr
00104788 <AT91F_PDC_ReceiveFrame>:
//* \brief Test if the current transfer descriptor has been filled
//*----------------------------------------------------------------------------
static inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
return !(pPDC->PDC_RCR);
104788: e590c004 ldr ip, [r0, #4]
unsigned char *pBuffer,
unsigned int szBuffer,
unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
if (AT91F_PDC_IsRxEmpty(pPDC)) {
10478c: e35c0000 cmp ip, #0
104790: 1a000007 bne 1047b4 <AT91F_PDC_ReceiveFrame+0x2c>
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
104794: e5801000 str r1, [r0]
pPDC->PDC_RCR = bytes;
104798: e5802004 str r2, [r0, #4]
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
10479c: e5803010 str r3, [r0, #16]
pPDC->PDC_RNCR = bytes;
1047a0: e59d3000 ldr r3, [sp]
//* Buffer and next buffer can be initialized
AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
return 2;
1047a4: e3a01002 mov r1, #2
1047a8: e5803014 str r3, [r0, #20]
}
else {
//* All buffer are in use...
return 0;
}
}
1047ac: e1a00001 mov r0, r1
1047b0: e12fff1e bx lr
//* \brief Test if the next transfer descriptor has been moved to the current td
//*----------------------------------------------------------------------------
static inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
return !(pPDC->PDC_RNCR);
1047b4: e590c014 ldr ip, [r0, #20]
//* Buffer and next buffer can be initialized
AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
return 2;
}
else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
1047b8: e35c0000 cmp ip, #0
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
1047bc: 05801010 streq r1, [r0, #16]
AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
return 1;
}
else {
//* All buffer are in use...
return 0;
1047c0: 13a01000 movne r1, #0
return 2;
}
else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
//* Only one buffer can be initialized
AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
return 1;
1047c4: 03a01001 moveq r1, #1
pPDC->PDC_RNCR = bytes;
1047c8: 05802014 streq r2, [r0, #20]
}
else {
//* All buffer are in use...
return 0;
}
}
1047cc: e1a00001 mov r0, r1
1047d0: e12fff1e bx lr
001047d4 <AT91F_PMC_GetMasterClock>:
//*------------------------------------------------------------------------------
unsigned int AT91F_PMC_GetMasterClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
unsigned int slowClock) // \arg slowClock in Hz
{
1047d4: e92d4038 push {r3, r4, r5, lr}
unsigned int reg = pPMC->PMC_MCKR;
1047d8: e5903030 ldr r3, [r0, #48] ; 0x30
unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
1047dc: e203401c and r4, r3, #28
unsigned int pllDivider, pllMultiplier;
switch (reg & AT91C_PMC_CSS) {
1047e0: e2033003 and r3, r3, #3
AT91PS_PMC pPMC, // \arg pointer to PMC controller
AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
unsigned int slowClock) // \arg slowClock in Hz
{
unsigned int reg = pPMC->PMC_MCKR;
unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
1047e4: e1a0c124 lsr ip, r4, #2
unsigned int pllDivider, pllMultiplier;
switch (reg & AT91C_PMC_CSS) {
1047e8: e3530001 cmp r3, #1
AT91PS_PMC pPMC, // \arg pointer to PMC controller
AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
unsigned int slowClock) // \arg slowClock in Hz
{
unsigned int reg = pPMC->PMC_MCKR;
unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
1047ec: e3a04001 mov r4, #1
1047f0: e1a04c14 lsl r4, r4, ip
unsigned int pllDivider, pllMultiplier;
switch (reg & AT91C_PMC_CSS) {
1047f4: 0a000017 beq 104858 <AT91F_PMC_GetMasterClock+0x84>
1047f8: 3a000012 bcc 104848 <AT91F_PMC_GetMasterClock+0x74>
1047fc: e3530003 cmp r3, #3
reg = pCKGR->CKGR_PLLR;
pllDivider = (reg & AT91C_CKGR_DIV);
pllMultiplier = ((reg & AT91C_CKGR_MUL) >> 16) + 1;
return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
}
return 0;
104800: 13a00000 movne r0, #0
{
unsigned int reg = pPMC->PMC_MCKR;
unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
unsigned int pllDivider, pllMultiplier;
switch (reg & AT91C_PMC_CSS) {
104804: 1a00000d bne 104840 <AT91F_PMC_GetMasterClock+0x6c>
case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
return slowClock / prescaler;
case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected
reg = pCKGR->CKGR_PLLR;
104808: e591500c ldr r5, [r1, #12]
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_CKGR_GetMainClock (
AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
unsigned int slowClock) // \arg slowClock in Hz
{
return ((pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF) * slowClock) >> 4;
10480c: e591e004 ldr lr, [r1, #4]
104810: e1a0180e lsl r1, lr, #16
104814: e1a00821 lsr r0, r1, #16
104818: e0020290 mul r2, r0, r2
pllDivider = (reg & AT91C_CKGR_DIV);
10481c: e20510ff and r1, r5, #255 ; 0xff
pllMultiplier = ((reg & AT91C_CKGR_MUL) >> 16) + 1;
return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
104820: e1a00222 lsr r0, r2, #4
104824: eb001700 bl 10a42c <__aeabi_uidiv>
case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected
reg = pCKGR->CKGR_PLLR;
pllDivider = (reg & AT91C_CKGR_DIV);
pllMultiplier = ((reg & AT91C_CKGR_MUL) >> 16) + 1;
104828: e59f3048 ldr r3, [pc, #72] ; 104878 <AT91F_PMC_GetMasterClock+0xa4>
10482c: e005c003 and ip, r5, r3
104830: e1a0282c lsr r2, ip, #16
return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
104834: e0200092 mla r0, r2, r0, r0
104838: e1a01004 mov r1, r4
10483c: eb0016fa bl 10a42c <__aeabi_uidiv>
}
return 0;
}
104840: e8bd4038 pop {r3, r4, r5, lr}
104844: e12fff1e bx lr
unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
unsigned int pllDivider, pllMultiplier;
switch (reg & AT91C_PMC_CSS) {
case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
return slowClock / prescaler;
104848: e1a00002 mov r0, r2
10484c: e1a01004 mov r1, r4
104850: eb0016f5 bl 10a42c <__aeabi_uidiv>
104854: eafffff9 b 104840 <AT91F_PMC_GetMasterClock+0x6c>
104858: e591e004 ldr lr, [r1, #4]
10485c: e1a0180e lsl r1, lr, #16
104860: e1a00821 lsr r0, r1, #16
104864: e0020290 mul r2, r0, r2
case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
104868: e1a01004 mov r1, r4
10486c: e1a00222 lsr r0, r2, #4
104870: eb0016ed bl 10a42c <__aeabi_uidiv>
104874: eafffff1 b 104840 <AT91F_PMC_GetMasterClock+0x6c>
104878: 07ff0000 .word 0x07ff0000
0010487c <AT91F_RTTReadValue>:
//*--------------------------------------------------------------------------------------
//* \fn AT91F_RTT_ReadValue()
//* \brief Read the RTT value
//*--------------------------------------------------------------------------------------
unsigned int AT91F_RTTReadValue(AT91PS_RTTC pRTTC)
{
10487c: e24dd008 sub sp, sp, #8
register volatile unsigned int val1,val2;
do
{
val1 = pRTTC->RTTC_RTVR;
104880: e590c008 ldr ip, [r0, #8]
104884: e58dc004 str ip, [sp, #4]
val2 = pRTTC->RTTC_RTVR;
104888: e5901008 ldr r1, [r0, #8]
10488c: e58d1000 str r1, [sp]
}
while(val1 != val2);
104890: e59d2004 ldr r2, [sp, #4]
104894: e59d3000 ldr r3, [sp]
104898: e1520003 cmp r2, r3
10489c: 1afffff7 bne 104880 <AT91F_RTTReadValue+0x4>
return(val1);
1048a0: e59d0004 ldr r0, [sp, #4]
}
1048a4: e28dd008 add sp, sp, #8
1048a8: e12fff1e bx lr
001048ac <AT91F_SPI_Close>:
//* \brief Close SPI: disable IT disable transfert, close PDC
//*----------------------------------------------------------------------------
void AT91F_SPI_Close(AT91PS_SPI pSPI) // \arg pointer to a SPI controller
{
//* Reset all the Chip Select register
pSPI->SPI_CSR[0] = 0 ;
1048ac: e3a03000 mov r3, #0
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
1048b0: e3a01002 mov r1, #2
//* Reset the SPI mode
pSPI->SPI_MR = 0 ;
//* Disable all interrupts
pSPI->SPI_IDR = 0xFFFFFFFF ;
1048b4: e3e02000 mvn r2, #0
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
1048b8: e3a0cc02 mov ip, #512 ; 0x200
//* \brief Close SPI: disable IT disable transfert, close PDC
//*----------------------------------------------------------------------------
void AT91F_SPI_Close(AT91PS_SPI pSPI) // \arg pointer to a SPI controller
{
//* Reset all the Chip Select register
pSPI->SPI_CSR[0] = 0 ;
1048bc: e5803030 str r3, [r0, #48] ; 0x30
pSPI->SPI_CSR[1] = 0 ;
1048c0: e5803034 str r3, [r0, #52] ; 0x34
pSPI->SPI_CSR[2] = 0 ;
1048c4: e5803038 str r3, [r0, #56] ; 0x38
pSPI->SPI_CSR[3] = 0 ;
1048c8: e580303c str r3, [r0, #60] ; 0x3c
//* Reset the SPI mode
pSPI->SPI_MR = 0 ;
1048cc: e5803004 str r3, [r0, #4]
//* Disable all interrupts
pSPI->SPI_IDR = 0xFFFFFFFF ;
1048d0: e5802018 str r2, [r0, #24]
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
1048d4: e5801120 str r1, [r0, #288] ; 0x120
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
1048d8: e580c120 str ip, [r0, #288] ; 0x120
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
1048dc: e5803118 str r3, [r0, #280] ; 0x118
pPDC->PDC_TNCR = bytes;
1048e0: e580311c str r3, [r0, #284] ; 0x11c
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
1048e4: e5803110 str r3, [r0, #272] ; 0x110
pPDC->PDC_RNCR = bytes;
1048e8: e5803114 str r3, [r0, #276] ; 0x114
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
1048ec: e5803108 str r3, [r0, #264] ; 0x108
pPDC->PDC_TCR = bytes;
1048f0: e580310c str r3, [r0, #268] ; 0x10c
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
1048f4: e5803100 str r3, [r0, #256] ; 0x100
pPDC->PDC_RCR = bytes;
1048f8: e5803104 str r3, [r0, #260] ; 0x104
//* Abort the Peripheral Data Transfers
AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
//* Disable receiver and transmitter and stop any activity immediately
pSPI->SPI_CR = AT91C_SPI_SPIDIS;
1048fc: e5801000 str r1, [r0]
}
104900: e12fff1e bx lr
00104904 <AT91F_ADC_CfgTimings>:
unsigned int sample_and_hold_time) // in ns
{
unsigned int prescal,startup,shtim;
prescal = mck_clock/(2*adc_clock) - 1;
startup = adc_clock*startup_time/8 - 1;
104904: e00c0392 mul ip, r2, r3
AT91PS_ADC pADC, // pointer to a ADC controller
unsigned int mck_clock, // in MHz
unsigned int adc_clock, // in MHz
unsigned int startup_time, // in us
unsigned int sample_and_hold_time) // in ns
{
104908: e92d4070 push {r4, r5, r6, lr}
unsigned int prescal,startup,shtim;
prescal = mck_clock/(2*adc_clock) - 1;
startup = adc_clock*startup_time/8 - 1;
10490c: e1a051ac lsr r5, ip, #3
104910: e2456001 sub r6, r5, #1
shtim = adc_clock*sample_and_hold_time/1000 - 1;
//* Write to the MR register
pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
104914: e1a0e806 lsl lr, r6, #16
AT91PS_ADC pADC, // pointer to a ADC controller
unsigned int mck_clock, // in MHz
unsigned int adc_clock, // in MHz
unsigned int startup_time, // in us
unsigned int sample_and_hold_time) // in ns
{
104918: e1a05000 mov r5, r0
unsigned int prescal,startup,shtim;
prescal = mck_clock/(2*adc_clock) - 1;
10491c: e1a00001 mov r0, r1
104920: e1a01082 lsl r1, r2, #1
AT91PS_ADC pADC, // pointer to a ADC controller
unsigned int mck_clock, // in MHz
unsigned int adc_clock, // in MHz
unsigned int startup_time, // in us
unsigned int sample_and_hold_time) // in ns
{
104924: e1a04002 mov r4, r2
prescal = mck_clock/(2*adc_clock) - 1;
startup = adc_clock*startup_time/8 - 1;
shtim = adc_clock*sample_and_hold_time/1000 - 1;
//* Write to the MR register
pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
104928: e20e681f and r6, lr, #2031616 ; 0x1f0000
unsigned int startup_time, // in us
unsigned int sample_and_hold_time) // in ns
{
unsigned int prescal,startup,shtim;
prescal = mck_clock/(2*adc_clock) - 1;
10492c: eb0016be bl 10a42c <__aeabi_uidiv>
startup = adc_clock*startup_time/8 - 1;
shtim = adc_clock*sample_and_hold_time/1000 - 1;
104930: e59d1010 ldr r1, [sp, #16]
104934: e0040491 mul r4, r1, r4
104938: e59f3030 ldr r3, [pc, #48] ; 104970 <AT91F_ADC_CfgTimings+0x6c>
10493c: e0842493 umull r2, r4, r3, r4
unsigned int startup_time, // in us
unsigned int sample_and_hold_time) // in ns
{
unsigned int prescal,startup,shtim;
prescal = mck_clock/(2*adc_clock) - 1;
104940: e240c001 sub ip, r0, #1
startup = adc_clock*startup_time/8 - 1;
shtim = adc_clock*sample_and_hold_time/1000 - 1;
104944: e1a02324 lsr r2, r4, #6
//* Write to the MR register
pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
104948: e1a0140c lsl r1, ip, #8
{
unsigned int prescal,startup,shtim;
prescal = mck_clock/(2*adc_clock) - 1;
startup = adc_clock*startup_time/8 - 1;
shtim = adc_clock*sample_and_hold_time/1000 - 1;
10494c: e2420001 sub r0, r2, #1
//* Write to the MR register
pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
104950: e2013c3f and r3, r1, #16128 ; 0x3f00
104954: e1a04c00 lsl r4, r0, #24
104958: e1866003 orr r6, r6, r3
10495c: e204440f and r4, r4, #251658240 ; 0xf000000
104960: e1866004 orr r6, r6, r4
104964: e5856004 str r6, [r5, #4]
}
104968: e8bd4070 pop {r4, r5, r6, lr}
10496c: e12fff1e bx lr
104970: 10624dd3 .word 0x10624dd3
00104974 <AT91F_SSC_SetBaudrate>:
unsigned int mainClock, // \arg peripheral clock
unsigned int speed) // \arg SSC baudrate
{
unsigned int baud_value;
//* Define the baud rate divisor register
if (speed == 0)
104974: e3520000 cmp r2, #0
//*----------------------------------------------------------------------------
void AT91F_SSC_SetBaudrate (
AT91PS_SSC pSSC, // \arg pointer to a SSC controller
unsigned int mainClock, // \arg peripheral clock
unsigned int speed) // \arg SSC baudrate
{
104978: e92d4010 push {r4, lr}
10497c: e1a04000 mov r4, r0
unsigned int baud_value;
//* Define the baud rate divisor register
if (speed == 0)
104980: 0a00000a beq 1049b0 <AT91F_SSC_SetBaudrate+0x3c>
baud_value = 0;
else
{
baud_value = (unsigned int) (mainClock * 10)/(2*speed);
104984: e0811101 add r1, r1, r1, lsl #2
104988: e1a00081 lsl r0, r1, #1
10498c: e1a01082 lsl r1, r2, #1
104990: eb0016a5 bl 10a42c <__aeabi_uidiv>
if ((baud_value % 10) >= 5)
104994: e59f2020 ldr r2, [pc, #32] ; 1049bc <AT91F_SSC_SetBaudrate+0x48>
104998: e0823290 umull r3, r2, r0, r2
10499c: e1a021a2 lsr r2, r2, #3
1049a0: e0823102 add r3, r2, r2, lsl #2
1049a4: e0400083 sub r0, r0, r3, lsl #1
1049a8: e3500004 cmp r0, #4
baud_value = (baud_value / 10) + 1;
1049ac: 82822001 addhi r2, r2, #1
else
baud_value /= 10;
}
pSSC->SSC_CMR = baud_value;
1049b0: e5842004 str r2, [r4, #4]
}
1049b4: e8bd4010 pop {r4, lr}
1049b8: e12fff1e bx lr
1049bc: cccccccd .word 0xcccccccd
001049c0 <AT91F_SSC_Configure>:
unsigned int baud_rate, // \arg Expected Baud Rate Frequency
unsigned int clock_rx, // \arg Receiver Clock Parameters
unsigned int mode_rx, // \arg mode Register to be programmed
unsigned int clock_tx, // \arg Transmitter Clock Parameters
unsigned int mode_tx) // \arg mode Register to be programmed
{
1049c0: e92d4038 push {r3, r4, r5, lr}
1049c4: e1a05003 mov r5, r3
//* Disable interrupts
pSSC->SSC_IDR = (unsigned int) -1;
//* Reset receiver and transmitter
pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
1049c8: e59f30ac ldr r3, [pc, #172] ; 104a7c <AT91F_SSC_Configure+0xbc>
unsigned int baud_rate, // \arg Expected Baud Rate Frequency
unsigned int clock_rx, // \arg Receiver Clock Parameters
unsigned int mode_rx, // \arg mode Register to be programmed
unsigned int clock_tx, // \arg Transmitter Clock Parameters
unsigned int mode_tx) // \arg mode Register to be programmed
{
1049cc: e1a04000 mov r4, r0
unsigned int mainClock, // \arg peripheral clock
unsigned int speed) // \arg SSC baudrate
{
unsigned int baud_value;
//* Define the baud rate divisor register
if (speed == 0)
1049d0: e3520000 cmp r2, #0
unsigned int mode_rx, // \arg mode Register to be programmed
unsigned int clock_tx, // \arg Transmitter Clock Parameters
unsigned int mode_tx) // \arg mode Register to be programmed
{
//* Disable interrupts
pSSC->SSC_IDR = (unsigned int) -1;
1049d4: e3e00000 mvn r0, #0
1049d8: e5840048 str r0, [r4, #72] ; 0x48
//* Reset receiver and transmitter
pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
1049dc: e5843000 str r3, [r4]
unsigned int mainClock, // \arg peripheral clock
unsigned int speed) // \arg SSC baudrate
{
unsigned int baud_value;
//* Define the baud rate divisor register
if (speed == 0)
1049e0: 0a00000a beq 104a10 <AT91F_SSC_Configure+0x50>
baud_value = 0;
else
{
baud_value = (unsigned int) (mainClock * 10)/(2*speed);
1049e4: e081e101 add lr, r1, r1, lsl #2
1049e8: e1a0008e lsl r0, lr, #1
1049ec: e1a01082 lsl r1, r2, #1
1049f0: eb00168d bl 10a42c <__aeabi_uidiv>
if ((baud_value % 10) >= 5)
1049f4: e59f2084 ldr r2, [pc, #132] ; 104a80 <AT91F_SSC_Configure+0xc0>
1049f8: e0823290 umull r3, r2, r0, r2
1049fc: e1a021a2 lsr r2, r2, #3
104a00: e082c102 add ip, r2, r2, lsl #2
104a04: e040108c sub r1, r0, ip, lsl #1
104a08: e3510004 cmp r1, #4
baud_value = (baud_value / 10) + 1;
104a0c: 82822001 addhi r2, r2, #1
//* Write the Receive Clock Mode Register
pSSC->SSC_RCMR = clock_rx;
//* Write the Transmit Clock Mode Register
pSSC->SSC_TCMR = clock_tx;
104a10: e28d0010 add r0, sp, #16
104a14: e8901001 ldm r0, {r0, ip}
//* Write the Receive Frame Mode Register
pSSC->SSC_RFMR = mode_rx;
//* Write the Transmit Frame Mode Register
pSSC->SSC_TFMR = mode_tx;
104a18: e59d3018 ldr r3, [sp, #24]
baud_value = (baud_value / 10) + 1;
else
baud_value /= 10;
}
pSSC->SSC_CMR = baud_value;
104a1c: e5842004 str r2, [r4, #4]
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104a20: e3a01000 mov r1, #0
//* Define the Clock Mode Register
AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);
//* Write the Receive Clock Mode Register
pSSC->SSC_RCMR = clock_rx;
104a24: e5845010 str r5, [r4, #16]
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104a28: e3a02002 mov r2, #2
//* Write the Transmit Clock Mode Register
pSSC->SSC_TCMR = clock_tx;
104a2c: e584c018 str ip, [r4, #24]
//* Write the Receive Frame Mode Register
pSSC->SSC_RFMR = mode_rx;
104a30: e5840014 str r0, [r4, #20]
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104a34: e3a0cc02 mov ip, #512 ; 0x200
//* Write the Transmit Frame Mode Register
pSSC->SSC_TFMR = mode_tx;
104a38: e584301c str r3, [r4, #28]
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
104a3c: e3a00001 mov r0, #1
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
104a40: e3a03c01 mov r3, #256 ; 0x100
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104a44: e5842120 str r2, [r4, #288] ; 0x120
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104a48: e584c120 str ip, [r4, #288] ; 0x120
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104a4c: e5841118 str r1, [r4, #280] ; 0x118
pPDC->PDC_TNCR = bytes;
104a50: e584111c str r1, [r4, #284] ; 0x11c
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
104a54: e5841110 str r1, [r4, #272] ; 0x110
pPDC->PDC_RNCR = bytes;
104a58: e5841114 str r1, [r4, #276] ; 0x114
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
104a5c: e5841108 str r1, [r4, #264] ; 0x108
pPDC->PDC_TCR = bytes;
104a60: e584110c str r1, [r4, #268] ; 0x10c
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
104a64: e5841100 str r1, [r4, #256] ; 0x100
pPDC->PDC_RCR = bytes;
104a68: e5841104 str r1, [r4, #260] ; 0x104
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
104a6c: e5840120 str r0, [r4, #288] ; 0x120
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
104a70: e5843120 str r3, [r4, #288] ; 0x120
//* Clear Transmit and Receive Counters
AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));
}
104a74: e8bd4038 pop {r3, r4, r5, lr}
104a78: e12fff1e bx lr
104a7c: 00008202 .word 0x00008202
104a80: cccccccd .word 0xcccccccd
00104a84 <AT91F_US_Configure>:
AT91PS_USART pUSART, // \arg pointer to a USART controller
unsigned int mainClock, // \arg peripheral clock
unsigned int mode , // \arg mode Register to be programmed
unsigned int baudRate , // \arg baudrate to be programmed
unsigned int timeguard ) // \arg timeguard to be programmed
{
104a84: e92d4038 push {r3, r4, r5, lr}
104a88: e1a04000 mov r4, r0
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_Baudrate (
const unsigned int main_clock, // \arg peripheral clock
const unsigned int baud_rate) // \arg UART baudrate
{
unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
104a8c: e081e101 add lr, r1, r1, lsl #2
//* Disable interrupts
pUSART->US_IDR = (unsigned int) -1;
104a90: e3e00000 mvn r0, #0
//* Reset receiver and transmitter
pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
104a94: e3a050ac mov r5, #172 ; 0xac
unsigned int mode , // \arg mode Register to be programmed
unsigned int baudRate , // \arg baudrate to be programmed
unsigned int timeguard ) // \arg timeguard to be programmed
{
//* Disable interrupts
pUSART->US_IDR = (unsigned int) -1;
104a98: e584000c str r0, [r4, #12]
104a9c: e1a01203 lsl r1, r3, #4
//* Reset receiver and transmitter
pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
104aa0: e5845000 str r5, [r4]
104aa4: e1a0008e lsl r0, lr, #1
AT91PS_USART pUSART, // \arg pointer to a USART controller
unsigned int mainClock, // \arg peripheral clock
unsigned int mode , // \arg mode Register to be programmed
unsigned int baudRate , // \arg baudrate to be programmed
unsigned int timeguard ) // \arg timeguard to be programmed
{
104aa8: e1a05002 mov r5, r2
104aac: eb00165e bl 10a42c <__aeabi_uidiv>
if ((baud_value % 10) >= 5)
104ab0: e59f3074 ldr r3, [pc, #116] ; 104b2c <AT91F_US_Configure+0xa8>
104ab4: e0832390 umull r2, r3, r0, r3
104ab8: e1a031a3 lsr r3, r3, #3
104abc: e083c103 add ip, r3, r3, lsl #2
104ac0: e040108c sub r1, r0, ip, lsl #1
104ac4: e3510004 cmp r1, #4
static inline void AT91F_US_SetTimeguard (
AT91PS_USART pUSART, // \arg pointer to a USART controller
unsigned int timeguard) // \arg timeguard value
{
//* Write the Timeguard Register
pUSART->US_TTGR = timeguard ;
104ac8: e59d2010 ldr r2, [sp, #16]
const unsigned int main_clock, // \arg peripheral clock
const unsigned int baud_rate) // \arg UART baudrate
{
unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
if ((baud_value % 10) >= 5)
baud_value = (baud_value / 10) + 1;
104acc: 82830001 addhi r0, r3, #1
else
baud_value /= 10;
104ad0: 91a00003 movls r0, r3
AT91PS_USART pUSART, // \arg pointer to a USART controller
unsigned int mainClock, // \arg peripheral clock
unsigned int speed) // \arg UART baudrate
{
//* Define the baud rate divisor register
pUSART->US_BRGR = AT91F_US_Baudrate(mainClock, speed);
104ad4: e5840020 str r0, [r4, #32]
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104ad8: e3a03000 mov r3, #0
static inline void AT91F_US_SetTimeguard (
AT91PS_USART pUSART, // \arg pointer to a USART controller
unsigned int timeguard) // \arg timeguard value
{
//* Write the Timeguard Register
pUSART->US_TTGR = timeguard ;
104adc: e5842028 str r2, [r4, #40] ; 0x28
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104ae0: e3a0c002 mov ip, #2
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104ae4: e3a01c02 mov r1, #512 ; 0x200
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
104ae8: e3a00001 mov r0, #1
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
104aec: e3a02c01 mov r2, #256 ; 0x100
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104af0: e584c120 str ip, [r4, #288] ; 0x120
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104af4: e5841120 str r1, [r4, #288] ; 0x120
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104af8: e5843118 str r3, [r4, #280] ; 0x118
pPDC->PDC_TNCR = bytes;
104afc: e584311c str r3, [r4, #284] ; 0x11c
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
104b00: e5843110 str r3, [r4, #272] ; 0x110
pPDC->PDC_RNCR = bytes;
104b04: e5843114 str r3, [r4, #276] ; 0x114
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
104b08: e5843108 str r3, [r4, #264] ; 0x108
pPDC->PDC_TCR = bytes;
104b0c: e584310c str r3, [r4, #268] ; 0x10c
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
104b10: e5843100 str r3, [r4, #256] ; 0x100
pPDC->PDC_RCR = bytes;
104b14: e5843104 str r3, [r4, #260] ; 0x104
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
104b18: e5840120 str r0, [r4, #288] ; 0x120
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
104b1c: e5842120 str r2, [r4, #288] ; 0x120
//* Clear Transmit and Receive Counters
AT91F_PDC_Open((AT91PS_PDC) &(pUSART->US_RPR));
//* Define the USART mode
pUSART->US_MR = mode ;
104b20: e5845004 str r5, [r4, #4]
}
104b24: e8bd4038 pop {r3, r4, r5, lr}
104b28: e12fff1e bx lr
104b2c: cccccccd .word 0xcccccccd
00104b30 <AT91F_US_Close>:
//* \brief Close USART: disable IT disable receiver and transmitter, close PDC
//*----------------------------------------------------------------------------
void AT91F_US_Close(AT91PS_USART pUSART) // \arg pointer to a USART controller
{
//* Reset the baud rate divisor register
pUSART->US_BRGR = 0 ;
104b30: e3a0c000 mov ip, #0
//* Reset the Timeguard Register
pUSART->US_TTGR = 0;
//* Disable all interrupts
pUSART->US_IDR = 0xFFFFFFFF ;
104b34: e3e03000 mvn r3, #0
//* \brief Close USART: disable IT disable receiver and transmitter, close PDC
//*----------------------------------------------------------------------------
void AT91F_US_Close(AT91PS_USART pUSART) // \arg pointer to a USART controller
{
//* Reset the baud rate divisor register
pUSART->US_BRGR = 0 ;
104b38: e580c020 str ip, [r0, #32]
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104b3c: e3a02002 mov r2, #2
//* Reset the USART mode
pUSART->US_MR = 0 ;
104b40: e580c004 str ip, [r0, #4]
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104b44: e3a01c02 mov r1, #512 ; 0x200
//* Reset the Timeguard Register
pUSART->US_TTGR = 0;
104b48: e580c028 str ip, [r0, #40] ; 0x28
//* Disable all interrupts
pUSART->US_IDR = 0xFFFFFFFF ;
104b4c: e580300c str r3, [r0, #12]
//* Abort the Peripheral Data Transfers
AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
//* Disable receiver and transmitter and stop any activity immediately
pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX ;
104b50: e3a030ac mov r3, #172 ; 0xac
//* \brief Disable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
104b54: e5802120 str r2, [r0, #288] ; 0x120
//* \brief Disable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_DisableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
104b58: e5801120 str r1, [r0, #288] ; 0x120
static inline void AT91F_PDC_SetNextTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TNPR = (unsigned int) address;
104b5c: e580c118 str ip, [r0, #280] ; 0x118
pPDC->PDC_TNCR = bytes;
104b60: e580c11c str ip, [r0, #284] ; 0x11c
static inline void AT91F_PDC_SetNextRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RNPR = (unsigned int) address;
104b64: e580c110 str ip, [r0, #272] ; 0x110
pPDC->PDC_RNCR = bytes;
104b68: e580c114 str ip, [r0, #276] ; 0x114
static inline void AT91F_PDC_SetTx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
const unsigned char *address,// \arg address to the next bloc to be transmitted
unsigned int bytes) // \arg number of bytes to be transmitted
{
pPDC->PDC_TPR = (unsigned int) address;
104b6c: e580c108 str ip, [r0, #264] ; 0x108
pPDC->PDC_TCR = bytes;
104b70: e580c10c str ip, [r0, #268] ; 0x10c
static inline void AT91F_PDC_SetRx (
AT91PS_PDC pPDC, // \arg pointer to a PDC controller
unsigned char *address,// \arg address to the next bloc to be received
unsigned int bytes) // \arg number of bytes to be received
{
pPDC->PDC_RPR = (unsigned int) address;
104b74: e580c100 str ip, [r0, #256] ; 0x100
pPDC->PDC_RCR = bytes;
104b78: e580c104 str ip, [r0, #260] ; 0x104
104b7c: e5803000 str r3, [r0]
}
104b80: e12fff1e bx lr
00104b84 <number>:
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
{
104b84: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
104b88: e24dd064 sub sp, sp, #100 ; 0x64
104b8c: e59db094 ldr fp, [sp, #148] ; 0x94
const char *digits;
static const char small_digits[] = "0123456789abcdefghijklmnopqrstuvwxyz";
static const char large_digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
int i;
digits = (type & LARGE) ? large_digits : small_digits;
104b90: e59fc444 ldr ip, [pc, #1092] ; 104fdc <number+0x458>
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
{
104b94: e59d8088 ldr r8, [sp, #136] ; 0x88
const char *digits;
static const char small_digits[] = "0123456789abcdefghijklmnopqrstuvwxyz";
static const char large_digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
int i;
digits = (type & LARGE) ? large_digits : small_digits;
104b98: e31b0040 tst fp, #64 ; 0x40
104b9c: e24ca028 sub sl, ip, #40 ; 0x28
104ba0: 01a0a00c moveq sl, ip
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
{
104ba4: e1a07001 mov r7, r1
static const char small_digits[] = "0123456789abcdefghijklmnopqrstuvwxyz";
static const char large_digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
int i;
digits = (type & LARGE) ? large_digits : small_digits;
if (type & LEFT)
104ba8: e31b0010 tst fp, #16
type &= ~ZEROPAD;
if (base < 2 || base > 36)
104bac: e2481002 sub r1, r8, #2
static const char large_digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
int i;
digits = (type & LARGE) ? large_digits : small_digits;
if (type & LEFT)
type &= ~ZEROPAD;
104bb0: 13cbb001 bicne fp, fp, #1
if (base < 2 || base > 36)
104bb4: e3510022 cmp r1, #34 ; 0x22
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
{
104bb8: e1a05000 mov r5, r0
int i;
digits = (type & LARGE) ? large_digits : small_digits;
if (type & LEFT)
type &= ~ZEROPAD;
if (base < 2 || base > 36)
104bbc: 8a0000df bhi 104f40 <number+0x3bc>
return NULL;
c = (type & ZEROPAD) ? '0' : ' ';
104bc0: e31b0001 tst fp, #1
104bc4: 03a00020 moveq r0, #32
104bc8: 13a00030 movne r0, #48 ; 0x30
sign = 0;
if (type & SIGN) {
104bcc: e21b1002 ands r1, fp, #2
digits = (type & LARGE) ? large_digits : small_digits;
if (type & LEFT)
type &= ~ZEROPAD;
if (base < 2 || base > 36)
return NULL;
c = (type & ZEROPAD) ? '0' : ' ';
104bd0: e58d000c str r0, [sp, #12]
sign = 0;
if (type & SIGN) {
104bd4: 1a0000cc bne 104f0c <number+0x388>
if (type & LEFT)
type &= ~ZEROPAD;
if (base < 2 || base > 36)
return NULL;
c = (type & ZEROPAD) ? '0' : ' ';
sign = 0;
104bd8: e58d1008 str r1, [sp, #8]
} else if (type & SPACE) {
sign = ' ';
size--;
}
}
if (type & SPECIAL) {
104bdc: e21b0020 ands r0, fp, #32
104be0: e58d0010 str r0, [sp, #16]
104be4: 0a000005 beq 104c00 <number+0x7c>
if (base == 16)
104be8: e3580010 cmp r8, #16
104bec: 0a0000ee beq 104fac <number+0x428>
size -= 2;
else if (base == 8)
104bf0: e3580008 cmp r8, #8
size--;
104bf4: 059d008c ldreq r0, [sp, #140] ; 0x8c
104bf8: 02400001 subeq r0, r0, #1
104bfc: 058d008c streq r0, [sp, #140] ; 0x8c
}
i = 0;
if (num == 0)
104c00: e1921003 orrs r1, r2, r3
104c04: 13a06000 movne r6, #0
104c08: 128d901c addne r9, sp, #28
104c0c: 1a0000b3 bne 104ee0 <number+0x35c>
tmp[i++]='0';
104c10: e3a03030 mov r3, #48 ; 0x30
104c14: e5cd301c strb r3, [sp, #28]
104c18: e3a06001 mov r6, #1
104c1c: e3a03000 mov r3, #0
else while (num != 0)
104c20: e59d0090 ldr r0, [sp, #144] ; 0x90
tmp[i++] = digits[do_div(num,base)];
if (i > precision)
precision = i;
size -= precision;
104c24: e59d208c ldr r2, [sp, #140] ; 0x8c
size--;
}
i = 0;
if (num == 0)
tmp[i++]='0';
else while (num != 0)
104c28: e1560000 cmp r6, r0
104c2c: a1a0c006 movge ip, r6
104c30: b1a0c000 movlt ip, r0
tmp[i++] = digits[do_div(num,base)];
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
104c34: e31b0011 tst fp, #17
tmp[i++]='0';
else while (num != 0)
tmp[i++] = digits[do_div(num,base)];
if (i > precision)
precision = i;
size -= precision;
104c38: e06c1002 rsb r1, ip, r2
if (!(type&(ZEROPAD+LEFT))) {
104c3c: 1a000024 bne 104cd4 <number+0x150>
while(size-->0) {
104c40: e2412001 sub r2, r1, #1
104c44: e58d2004 str r2, [sp, #4]
104c48: e3510000 cmp r1, #0
104c4c: d59d1004 ldrle r1, [sp, #4]
104c50: da00001f ble 104cd4 <number+0x150>
104c54: e1e09005 mvn r9, r5
#define SPACE 8 /* space if plus */
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
104c58: e0854001 add r4, r5, r1
104c5c: e0840009 add r0, r4, r9
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
if (buf <= end)
104c60: e1570005 cmp r7, r5
#define SPACE 8 /* space if plus */
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
104c64: e58d1014 str r1, [sp, #20]
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
if (buf <= end)
*buf = ' ';
104c68: e3a09020 mov r9, #32
104c6c: e2000001 and r0, r0, #1
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
if (buf <= end)
104c70: 2a0000b7 bcs 104f54 <number+0x3d0>
*buf = ' ';
++buf;
104c74: e2852001 add r2, r5, #1
tmp[i++] = digits[do_div(num,base)];
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
104c78: e1520004 cmp r2, r4
104c7c: 0a000010 beq 104cc4 <number+0x140>
104c80: e3500000 cmp r0, #0
104c84: 0a000004 beq 104c9c <number+0x118>
if (buf <= end)
104c88: e1570002 cmp r7, r2
*buf = ' ';
104c8c: 25c29000 strbcs r9, [r2]
++buf;
104c90: e2822001 add r2, r2, #1
tmp[i++] = digits[do_div(num,base)];
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
104c94: e1520004 cmp r2, r4
104c98: 0a000009 beq 104cc4 <number+0x140>
104c9c: e1a00001 mov r0, r1
if (buf <= end)
104ca0: e1570002 cmp r7, r2
*buf = ' ';
++buf;
104ca4: e2821001 add r1, r2, #1
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
if (buf <= end)
*buf = ' ';
104ca8: 25c29000 strbcs r9, [r2]
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
if (buf <= end)
104cac: e1570001 cmp r7, r1
*buf = ' ';
104cb0: 25c29001 strbcs r9, [r2, #1]
++buf;
104cb4: e2812001 add r2, r1, #1
tmp[i++] = digits[do_div(num,base)];
if (i > precision)
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
104cb8: e1520004 cmp r2, r4
104cbc: 1afffff7 bne 104ca0 <number+0x11c>
104cc0: e1a01000 mov r1, r0
104cc4: e59d0004 ldr r0, [sp, #4]
104cc8: e59d2014 ldr r2, [sp, #20]
104ccc: e0611000 rsb r1, r1, r0
104cd0: e0855002 add r5, r5, r2
if (buf <= end)
*buf = ' ';
++buf;
}
}
if (sign) {
104cd4: e59d2008 ldr r2, [sp, #8]
104cd8: e3520000 cmp r2, #0
104cdc: 0a000002 beq 104cec <number+0x168>
if (buf <= end)
104ce0: e1550007 cmp r5, r7
*buf = sign;
104ce4: 95c52000 strbls r2, [r5]
++buf;
104ce8: e2855001 add r5, r5, #1
}
if (type & SPECIAL) {
104cec: e59d0010 ldr r0, [sp, #16]
104cf0: e3500000 cmp r0, #0
104cf4: 0a000003 beq 104d08 <number+0x184>
if (base==8) {
104cf8: e3580008 cmp r8, #8
104cfc: 0a0000a5 beq 104f98 <number+0x414>
if (buf <= end)
*buf = '0';
++buf;
} else if (base==16) {
104d00: e3580010 cmp r8, #16
104d04: 0a00009a beq 104f74 <number+0x3f0>
if (buf <= end)
*buf = digits[33];
++buf;
}
}
if (!(type & LEFT)) {
104d08: e31b0010 tst fp, #16
104d0c: 1a00001f bne 104d90 <number+0x20c>
while (size-- > 0) {
104d10: e3510000 cmp r1, #0
104d14: e2412001 sub r2, r1, #1
104d18: d1a01002 movle r1, r2
104d1c: da00001b ble 104d90 <number+0x20c>
#define SPACE 8 /* space if plus */
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
104d20: e0851001 add r1, r5, r1
104d24: e1e02005 mvn r2, r5
104d28: e0812002 add r2, r1, r2
++buf;
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
if (buf <= end)
104d2c: e1570005 cmp r7, r5
104d30: e2022001 and r2, r2, #1
104d34: 2a000083 bcs 104f48 <number+0x3c4>
*buf = c;
++buf;
104d38: e2855001 add r5, r5, #1
*buf = digits[33];
++buf;
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
104d3c: e1550001 cmp r5, r1
104d40: 0a000010 beq 104d88 <number+0x204>
104d44: e3520000 cmp r2, #0
104d48: 0a000005 beq 104d64 <number+0x1e0>
if (buf <= end)
104d4c: e1570005 cmp r7, r5
*buf = c;
104d50: 259d200c ldrcs r2, [sp, #12]
104d54: 25c52000 strbcs r2, [r5]
++buf;
104d58: e2855001 add r5, r5, #1
*buf = digits[33];
++buf;
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
104d5c: e1550001 cmp r5, r1
104d60: 0a000008 beq 104d88 <number+0x204>
104d64: e59d000c ldr r0, [sp, #12]
if (buf <= end)
104d68: e1570005 cmp r7, r5
*buf = c;
++buf;
104d6c: e2852001 add r2, r5, #1
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
if (buf <= end)
*buf = c;
104d70: 25c50000 strbcs r0, [r5]
++buf;
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
if (buf <= end)
104d74: e1570002 cmp r7, r2
*buf = c;
104d78: 25c50001 strbcs r0, [r5, #1]
++buf;
104d7c: e2825001 add r5, r2, #1
*buf = digits[33];
++buf;
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
104d80: e1550001 cmp r5, r1
104d84: 1afffff7 bne 104d68 <number+0x1e4>
104d88: e1a05001 mov r5, r1
104d8c: e3e01000 mvn r1, #0
if (buf <= end)
*buf = c;
++buf;
}
}
while (i < precision--) {
104d90: e15c0006 cmp ip, r6
104d94: da00001a ble 104e04 <number+0x280>
#define SPACE 8 /* space if plus */
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
104d98: e066000c rsb r0, r6, ip
104d9c: e0850000 add r0, r5, r0
104da0: e1e0c005 mvn ip, r5
104da4: e080200c add r2, r0, ip
*buf = c;
++buf;
}
}
while (i < precision--) {
if (buf <= end)
104da8: e1570005 cmp r7, r5
*buf = '0';
104dac: e3a0c030 mov ip, #48 ; 0x30
104db0: e2022001 and r2, r2, #1
104db4: 25c5c000 strbcs ip, [r5]
++buf;
104db8: e2855001 add r5, r5, #1
if (buf <= end)
*buf = c;
++buf;
}
}
while (i < precision--) {
104dbc: e1550000 cmp r5, r0
104dc0: 0a00000e beq 104e00 <number+0x27c>
104dc4: e3520000 cmp r2, #0
104dc8: 0a000004 beq 104de0 <number+0x25c>
if (buf <= end)
104dcc: e1570005 cmp r7, r5
*buf = '0';
104dd0: 25c5c000 strbcs ip, [r5]
++buf;
104dd4: e2855001 add r5, r5, #1
if (buf <= end)
*buf = c;
++buf;
}
}
while (i < precision--) {
104dd8: e1550000 cmp r5, r0
104ddc: 0a000007 beq 104e00 <number+0x27c>
if (buf <= end)
104de0: e1570005 cmp r7, r5
*buf = '0';
++buf;
104de4: e2852001 add r2, r5, #1
++buf;
}
}
while (i < precision--) {
if (buf <= end)
*buf = '0';
104de8: 25c5c000 strbcs ip, [r5]
*buf = c;
++buf;
}
}
while (i < precision--) {
if (buf <= end)
104dec: e1570002 cmp r7, r2
*buf = '0';
104df0: 25c5c001 strbcs ip, [r5, #1]
++buf;
104df4: e2825001 add r5, r2, #1
if (buf <= end)
*buf = c;
++buf;
}
}
while (i < precision--) {
104df8: e1550000 cmp r5, r0
104dfc: 1afffff7 bne 104de0 <number+0x25c>
104e00: e1a05000 mov r5, r0
104e04: e3130001 tst r3, #1
104e08: 0a00000d beq 104e44 <number+0x2c0>
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
if (buf <= end)
104e0c: e1550007 cmp r5, r7
*buf = tmp[i];
104e10: 928d201c addls r2, sp, #28
104e14: 97d22003 ldrbls r2, [r2, r3]
while (i < precision--) {
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
104e18: e2433001 sub r3, r3, #1
if (buf <= end)
*buf = tmp[i];
104e1c: 95c52000 strbls r2, [r5]
++buf;
104e20: e2855001 add r5, r5, #1
104e24: ea000006 b 104e44 <number+0x2c0>
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
if (buf <= end)
104e28: e1520007 cmp r2, r7
while (i < precision--) {
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
104e2c: e2433001 sub r3, r3, #1
if (buf <= end)
*buf = tmp[i];
104e30: 928d501c addls r5, sp, #28
104e34: 97d50003 ldrbls r0, [r5, r3]
104e38: 95c20000 strbls r0, [r2]
++buf;
104e3c: e2825001 add r5, r2, #1
while (i < precision--) {
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
104e40: e2433001 sub r3, r3, #1
if (buf <= end)
104e44: e1550007 cmp r5, r7
*buf = tmp[i];
104e48: 928d001c addls r0, sp, #28
104e4c: 97d00003 ldrbls r0, [r0, r3]
++buf;
104e50: e2852001 add r2, r5, #1
*buf = '0';
++buf;
}
while (i-- > 0) {
if (buf <= end)
*buf = tmp[i];
104e54: 95c50000 strbls r0, [r5]
while (i < precision--) {
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
104e58: e3530000 cmp r3, #0
if (buf <= end)
*buf = tmp[i];
++buf;
104e5c: e1a00002 mov r0, r2
while (i < precision--) {
if (buf <= end)
*buf = '0';
++buf;
}
while (i-- > 0) {
104e60: 1afffff0 bne 104e28 <number+0x2a4>
if (buf <= end)
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
104e64: e3510000 cmp r1, #0
104e68: da000019 ble 104ed4 <number+0x350>
104e6c: e1e04002 mvn r4, r2
#define SPACE 8 /* space if plus */
#define LEFT 16 /* left justified */
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static char * number(char * buf, char * end, unsigned long long num, int base, int size, int precision, int type)
104e70: e082c001 add ip, r2, r1
104e74: e08c3004 add r3, ip, r4
if (buf <= end)
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
if (buf <= end)
104e78: e1570002 cmp r7, r2
*buf = ' ';
104e7c: e3a04020 mov r4, #32
104e80: e2030001 and r0, r3, #1
104e84: 25c24000 strbcs r4, [r2]
++buf;
104e88: e2823001 add r3, r2, #1
while (i-- > 0) {
if (buf <= end)
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
104e8c: e153000c cmp r3, ip
104e90: 0a00000e beq 104ed0 <number+0x34c>
104e94: e3500000 cmp r0, #0
104e98: 0a000004 beq 104eb0 <number+0x32c>
if (buf <= end)
104e9c: e1570003 cmp r7, r3
*buf = ' ';
104ea0: 25c34000 strbcs r4, [r3]
++buf;
104ea4: e2833001 add r3, r3, #1
while (i-- > 0) {
if (buf <= end)
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
104ea8: e153000c cmp r3, ip
104eac: 0a000007 beq 104ed0 <number+0x34c>
if (buf <= end)
104eb0: e1570003 cmp r7, r3
*buf = ' ';
++buf;
104eb4: e2830001 add r0, r3, #1
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
if (buf <= end)
*buf = ' ';
104eb8: 25c34000 strbcs r4, [r3]
if (buf <= end)
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
if (buf <= end)
104ebc: e1570000 cmp r7, r0
*buf = ' ';
104ec0: 25c34001 strbcs r4, [r3, #1]
++buf;
104ec4: e2803001 add r3, r0, #1
while (i-- > 0) {
if (buf <= end)
*buf = tmp[i];
++buf;
}
while (size-- > 0) {
104ec8: e153000c cmp r3, ip
104ecc: 1afffff7 bne 104eb0 <number+0x32c>
104ed0: e0820001 add r0, r2, r1
if (buf <= end)
*buf = ' ';
++buf;
}
return buf;
}
104ed4: e28dd064 add sp, sp, #100 ; 0x64
104ed8: e8bd4ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, lr}
104edc: e12fff1e bx lr
}
i = 0;
if (num == 0)
tmp[i++]='0';
else while (num != 0)
tmp[i++] = digits[do_div(num,base)];
104ee0: e1a00002 mov r0, r2
104ee4: e1a01003 mov r1, r3
104ee8: e1a04008 mov r4, r8
104eec: ebfffd5a bl 10445c <__do_div64>
104ef0: e7da1001 ldrb r1, [sl, r1]
size--;
}
i = 0;
if (num == 0)
tmp[i++]='0';
else while (num != 0)
104ef4: e1920003 orrs r0, r2, r3
tmp[i++] = digits[do_div(num,base)];
104ef8: e7c91006 strb r1, [r9, r6]
104efc: e2866001 add r6, r6, #1
size--;
}
i = 0;
if (num == 0)
tmp[i++]='0';
else while (num != 0)
104f00: 1afffff6 bne 104ee0 <number+0x35c>
104f04: e2463001 sub r3, r6, #1
104f08: eaffff44 b 104c20 <number+0x9c>
if (base < 2 || base > 36)
return NULL;
c = (type & ZEROPAD) ? '0' : ' ';
sign = 0;
if (type & SIGN) {
if ((signed long long) num < 0) {
104f0c: e3520000 cmp r2, #0
104f10: e2d31000 sbcs r1, r3, #0
104f14: ba000028 blt 104fbc <number+0x438>
sign = '-';
num = - (signed long long) num;
size--;
} else if (type & PLUS) {
104f18: e31b0004 tst fp, #4
104f1c: 1a00000e bne 104f5c <number+0x3d8>
sign = '+';
size--;
} else if (type & SPACE) {
104f20: e21b1008 ands r1, fp, #8
104f24: 0affff2b beq 104bd8 <number+0x54>
sign = ' ';
size--;
104f28: e59d008c ldr r0, [sp, #140] ; 0x8c
size--;
} else if (type & PLUS) {
sign = '+';
size--;
} else if (type & SPACE) {
sign = ' ';
104f2c: e3a01020 mov r1, #32
size--;
104f30: e240c001 sub ip, r0, #1
104f34: e58dc08c str ip, [sp, #140] ; 0x8c
size--;
} else if (type & PLUS) {
sign = '+';
size--;
} else if (type & SPACE) {
sign = ' ';
104f38: e58d1008 str r1, [sp, #8]
104f3c: eaffff26 b 104bdc <number+0x58>
digits = (type & LARGE) ? large_digits : small_digits;
if (type & LEFT)
type &= ~ZEROPAD;
if (base < 2 || base > 36)
return NULL;
104f40: e3a00000 mov r0, #0
104f44: eaffffe2 b 104ed4 <number+0x350>
}
}
if (!(type & LEFT)) {
while (size-- > 0) {
if (buf <= end)
*buf = c;
104f48: e59d000c ldr r0, [sp, #12]
104f4c: e5c50000 strb r0, [r5]
104f50: eaffff78 b 104d38 <number+0x1b4>
precision = i;
size -= precision;
if (!(type&(ZEROPAD+LEFT))) {
while(size-->0) {
if (buf <= end)
*buf = ' ';
104f54: e5c59000 strb r9, [r5]
104f58: eaffff45 b 104c74 <number+0xf0>
sign = '-';
num = - (signed long long) num;
size--;
} else if (type & PLUS) {
sign = '+';
size--;
104f5c: e59d008c ldr r0, [sp, #140] ; 0x8c
if ((signed long long) num < 0) {
sign = '-';
num = - (signed long long) num;
size--;
} else if (type & PLUS) {
sign = '+';
104f60: e3a0102b mov r1, #43 ; 0x2b
size--;
104f64: e240c001 sub ip, r0, #1
104f68: e58dc08c str ip, [sp, #140] ; 0x8c
if ((signed long long) num < 0) {
sign = '-';
num = - (signed long long) num;
size--;
} else if (type & PLUS) {
sign = '+';
104f6c: e58d1008 str r1, [sp, #8]
104f70: eaffff19 b 104bdc <number+0x58>
if (base==8) {
if (buf <= end)
*buf = '0';
++buf;
} else if (base==16) {
if (buf <= end)
104f74: e1550007 cmp r5, r7
*buf = '0';
104f78: 93a02030 movls r2, #48 ; 0x30
104f7c: 95c52000 strbls r2, [r5]
++buf;
104f80: e2852001 add r2, r5, #1
if (buf <= end)
104f84: e1570002 cmp r7, r2
*buf = digits[33];
104f88: 25da0021 ldrbcs r0, [sl, #33] ; 0x21
104f8c: 25c50001 strbcs r0, [r5, #1]
++buf;
104f90: e2825001 add r5, r2, #1
104f94: eaffff5b b 104d08 <number+0x184>
*buf = sign;
++buf;
}
if (type & SPECIAL) {
if (base==8) {
if (buf <= end)
104f98: e1550007 cmp r5, r7
*buf = '0';
104f9c: 93a02030 movls r2, #48 ; 0x30
104fa0: 95c52000 strbls r2, [r5]
++buf;
104fa4: e2855001 add r5, r5, #1
104fa8: eaffff56 b 104d08 <number+0x184>
size--;
}
}
if (type & SPECIAL) {
if (base == 16)
size -= 2;
104fac: e59dc08c ldr ip, [sp, #140] ; 0x8c
104fb0: e24c1002 sub r1, ip, #2
104fb4: e58d108c str r1, [sp, #140] ; 0x8c
104fb8: eaffff10 b 104c00 <number+0x7c>
sign = 0;
if (type & SIGN) {
if ((signed long long) num < 0) {
sign = '-';
num = - (signed long long) num;
size--;
104fbc: e59d008c ldr r0, [sp, #140] ; 0x8c
return NULL;
c = (type & ZEROPAD) ? '0' : ' ';
sign = 0;
if (type & SIGN) {
if ((signed long long) num < 0) {
sign = '-';
104fc0: e3a0102d mov r1, #45 ; 0x2d
num = - (signed long long) num;
size--;
104fc4: e240c001 sub ip, r0, #1
c = (type & ZEROPAD) ? '0' : ' ';
sign = 0;
if (type & SIGN) {
if ((signed long long) num < 0) {
sign = '-';
num = - (signed long long) num;
104fc8: e2722000 rsbs r2, r2, #0
104fcc: e2e33000 rsc r3, r3, #0
size--;
104fd0: e58dc08c str ip, [sp, #140] ; 0x8c
return NULL;
c = (type & ZEROPAD) ? '0' : ' ';
sign = 0;
if (type & SIGN) {
if ((signed long long) num < 0) {
sign = '-';
104fd4: e58d1008 str r1, [sp, #8]
104fd8: eafffeff b 104bdc <number+0x58>
104fdc: 0010a5d8 .word 0x0010a5d8
00104fe0 <simple_strtoul>:
*/
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
{
unsigned long result = 0,value;
if (!base) {
104fe0: e3520000 cmp r2, #0
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
{
104fe4: e92d00f0 push {r4, r5, r6, r7}
104fe8: e1a03000 mov r3, r0
unsigned long result = 0,value;
if (!base) {
104fec: 1a000007 bne 105010 <simple_strtoul+0x30>
base = 10;
if (*cp == '0') {
104ff0: e5d0c000 ldrb ip, [r0]
104ff4: e35c0030 cmp ip, #48 ; 0x30
104ff8: 0a00002b beq 1050ac <simple_strtoul+0xcc>
104ffc: e59f7138 ldr r7, [pc, #312] ; 10513c <simple_strtoul+0x15c>
105000: e1a0500c mov r5, ip
105004: e7d7400c ldrb r4, [r7, ip]
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
{
unsigned long result = 0,value;
if (!base) {
base = 10;
105008: e3a0200a mov r2, #10
10500c: ea000005 b 105028 <simple_strtoul+0x48>
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
cp++;
base = 16;
}
}
} else if (base == 16) {
105010: e3520010 cmp r2, #16
105014: 0a00001d beq 105090 <simple_strtoul+0xb0>
105018: e5d0c000 ldrb ip, [r0]
10501c: e59f7118 ldr r7, [pc, #280] ; 10513c <simple_strtoul+0x15c>
105020: e7d7400c ldrb r4, [r7, ip]
105024: e1a0500c mov r5, ip
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) &&
105028: e2140044 ands r0, r4, #68 ; 0x44
10502c: 0a000013 beq 105080 <simple_strtoul+0xa0>
(value = isdigit(*cp) ? *cp-'0' : toupper(*cp)-'A'+10) < base) {
result = result*base + value;
cp++;
}
if (endp)
*endp = (char *)cp;
105030: e1a06003 mov r6, r3
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
{
unsigned long result = 0,value;
if (!base) {
base = 10;
105034: e3a00000 mov r0, #0
105038: ea000007 b 10505c <simple_strtoul+0x7c>
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) &&
10503c: e5d6c001 ldrb ip, [r6, #1]
105040: e7d7400c ldrb r4, [r7, ip]
105044: e3140044 tst r4, #68 ; 0x44
(value = isdigit(*cp) ? *cp-'0' : toupper(*cp)-'A'+10) < base) {
result = result*base + value;
105048: e0205092 mla r0, r2, r0, r5
* simple_strtoul - convert a string to an unsigned long
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
10504c: e2833001 add r3, r3, #1
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) &&
105050: e1a0500c mov r5, ip
105054: 0a000009 beq 105080 <simple_strtoul+0xa0>
105058: e1a06003 mov r6, r3
(value = isdigit(*cp) ? *cp-'0' : toupper(*cp)-'A'+10) < base) {
10505c: e3140004 tst r4, #4
105060: 12455030 subne r5, r5, #48 ; 0x30
105064: 1a000003 bne 105078 <simple_strtoul+0x98>
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
105068: e3140002 tst r4, #2
c -= 'a'-'A';
10506c: 124cc020 subne ip, ip, #32
105070: 120cc0ff andne ip, ip, #255 ; 0xff
105074: e24c5037 sub r5, ip, #55 ; 0x37
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) &&
105078: e1550002 cmp r5, r2
10507c: 3affffee bcc 10503c <simple_strtoul+0x5c>
(value = isdigit(*cp) ? *cp-'0' : toupper(*cp)-'A'+10) < base) {
result = result*base + value;
cp++;
}
if (endp)
105080: e3510000 cmp r1, #0
*endp = (char *)cp;
105084: 15813000 strne r3, [r1]
return result;
}
105088: e8bd00f0 pop {r4, r5, r6, r7}
10508c: e12fff1e bx lr
cp++;
base = 16;
}
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
105090: e5d0c000 ldrb ip, [r0]
105094: e35c0030 cmp ip, #48 ; 0x30
105098: 0a00001a beq 105108 <simple_strtoul+0x128>
10509c: e59f7098 ldr r7, [pc, #152] ; 10513c <simple_strtoul+0x15c>
1050a0: e1a0500c mov r5, ip
1050a4: e7d7400c ldrb r4, [r7, ip]
1050a8: eaffffde b 105028 <simple_strtoul+0x48>
if (!base) {
base = 10;
if (*cp == '0') {
base = 8;
cp++;
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
1050ac: e5f3c001 ldrb ip, [r3, #1]!
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
1050b0: e59f7084 ldr r7, [pc, #132] ; 10513c <simple_strtoul+0x15c>
1050b4: e7d7400c ldrb r4, [r7, ip]
1050b8: e3140002 tst r4, #2
c -= 'a'-'A';
1050bc: 124c2020 subne r2, ip, #32
1050c0: 120220ff andne r2, r2, #255 ; 0xff
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
1050c4: 01a0200c moveq r2, ip
1050c8: e3520058 cmp r2, #88 ; 0x58
1050cc: e1a0500c mov r5, ip
1050d0: 0a000001 beq 1050dc <simple_strtoul+0xfc>
unsigned long result = 0,value;
if (!base) {
base = 10;
if (*cp == '0') {
base = 8;
1050d4: e3a02008 mov r2, #8
1050d8: eaffffd2 b 105028 <simple_strtoul+0x48>
cp++;
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
1050dc: e5d30001 ldrb r0, [r3, #1]
1050e0: e7d72000 ldrb r2, [r7, r0]
1050e4: e3120044 tst r2, #68 ; 0x44
1050e8: e2836001 add r6, r3, #1
1050ec: 0afffff8 beq 1050d4 <simple_strtoul+0xf4>
1050f0: e1a04002 mov r4, r2
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) &&
1050f4: e1a05000 mov r5, r0
1050f8: e1a0c000 mov ip, r0
if (!base) {
base = 10;
if (*cp == '0') {
base = 8;
cp++;
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
1050fc: e1a03006 mov r3, r6
cp++;
base = 16;
105100: e3a02010 mov r2, #16
105104: eaffffc9 b 105030 <simple_strtoul+0x50>
}
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
105108: e5d00001 ldrb r0, [r0, #1]
10510c: e59f7028 ldr r7, [pc, #40] ; 10513c <simple_strtoul+0x15c>
105110: e7d74000 ldrb r4, [r7, r0]
105114: e3140002 tst r4, #2
c -= 'a'-'A';
105118: 12400020 subne r0, r0, #32
10511c: 120000ff andne r0, r0, #255 ; 0xff
105120: e3500058 cmp r0, #88 ; 0x58
cp += 2;
105124: 05f3c002 ldrbeq ip, [r3, #2]!
cp++;
base = 16;
}
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
105128: 15d74030 ldrbne r4, [r7, #48] ; 0x30
10512c: 13a05030 movne r5, #48 ; 0x30
cp += 2;
105130: 01a0500c moveq r5, ip
105134: 07d7400c ldrbeq r4, [r7, ip]
105138: eaffffba b 105028 <simple_strtoul+0x48>
10513c: 0020020c .word 0x0020020c
00105140 <simple_strtol>:
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
long simple_strtol(const char *cp,char **endp,unsigned int base)
{
105140: e92d4010 push {r4, lr}
if(*cp=='-')
105144: e5d0c000 ldrb ip, [r0]
105148: e35c002d cmp ip, #45 ; 0x2d
10514c: 0a000001 beq 105158 <simple_strtol+0x18>
return -simple_strtoul(cp+1,endp,base);
return simple_strtoul(cp,endp,base);
}
105150: e8bd4010 pop {r4, lr}
*/
long simple_strtol(const char *cp,char **endp,unsigned int base)
{
if(*cp=='-')
return -simple_strtoul(cp+1,endp,base);
return simple_strtoul(cp,endp,base);
105154: eaffffa1 b 104fe0 <simple_strtoul>
* @base: The number base to use
*/
long simple_strtol(const char *cp,char **endp,unsigned int base)
{
if(*cp=='-')
return -simple_strtoul(cp+1,endp,base);
105158: e2800001 add r0, r0, #1
10515c: ebffff9f bl 104fe0 <simple_strtoul>
return simple_strtoul(cp,endp,base);
}
105160: e2600000 rsb r0, r0, #0
105164: e8bd4010 pop {r4, lr}
105168: e12fff1e bx lr
0010516c <simple_strtoull>:
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base)
{
10516c: e92d0ff0 push {r4, r5, r6, r7, r8, r9, sl, fp}
unsigned long long result = 0,value;
if (!base) {
105170: e3520000 cmp r2, #0
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base)
{
105174: e24dd008 sub sp, sp, #8
105178: e58d1004 str r1, [sp, #4]
unsigned long long result = 0,value;
if (!base) {
10517c: 1a000007 bne 1051a0 <simple_strtoull+0x34>
base = 10;
if (*cp == '0') {
105180: e5d07000 ldrb r7, [r0]
105184: e3570030 cmp r7, #48 ; 0x30
105188: 0a000039 beq 105274 <simple_strtoull+0x108>
10518c: e59fb180 ldr fp, [pc, #384] ; 105314 <simple_strtoull+0x1a8>
105190: e1a08007 mov r8, r7
105194: e7dbc007 ldrb ip, [fp, r7]
unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base)
{
unsigned long long result = 0,value;
if (!base) {
base = 10;
105198: e3a0200a mov r2, #10
10519c: ea000005 b 1051b8 <simple_strtoull+0x4c>
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
cp++;
base = 16;
}
}
} else if (base == 16) {
1051a0: e3520010 cmp r2, #16
1051a4: 0a00002b beq 105258 <simple_strtoull+0xec>
1051a8: e5d07000 ldrb r7, [r0]
1051ac: e59fb160 ldr fp, [pc, #352] ; 105314 <simple_strtoull+0x1a8>
1051b0: e7dbc007 ldrb ip, [fp, r7]
1051b4: e1a08007 mov r8, r7
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
1051b8: e31c0044 tst ip, #68 ; 0x44
1051bc: 11a01002 movne r1, r2
1051c0: 13a02000 movne r2, #0
1051c4: 0a000042 beq 1052d4 <simple_strtoull+0x168>
? toupper(*cp) : *cp)-'A'+10) < base) {
result = result*base + value;
cp++;
}
if (endp)
*endp = (char *)cp;
1051c8: e1a0a000 mov sl, r0
unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base)
{
unsigned long long result = 0,value;
if (!base) {
base = 10;
1051cc: e3a03000 mov r3, #0
1051d0: e3a04000 mov r4, #0
1051d4: ea00000c b 10520c <simple_strtoull+0xa0>
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
? toupper(*cp) : *cp)-'A'+10) < base) {
result = result*base + value;
1051d8: e00c0293 mul ip, r3, r2
1051dc: e0865193 umull r5, r6, r3, r1
1051e0: e023c491 mla r3, r1, r4, ip
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
1051e4: e5da7001 ldrb r7, [sl, #1]
1051e8: e7dbc007 ldrb ip, [fp, r7]
? toupper(*cp) : *cp)-'A'+10) < base) {
result = result*base + value;
1051ec: e0836006 add r6, r3, r6
1051f0: e0983005 adds r3, r8, r5
1051f4: e0a94006 adc r4, r9, r6
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
1051f8: e31c0044 tst ip, #68 ; 0x44
* simple_strtoull - convert a string to an unsigned long long
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base)
1051fc: e2800001 add r0, r0, #1
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
105200: e1a08007 mov r8, r7
105204: 0a00000b beq 105238 <simple_strtoull+0xcc>
105208: e1a0a000 mov sl, r0
10520c: e31c0004 tst ip, #4
105210: 12488030 subne r8, r8, #48 ; 0x30
105214: 1a000003 bne 105228 <simple_strtoull+0xbc>
105218: e31c0002 tst ip, #2
10521c: 12478020 subne r8, r7, #32
? toupper(*cp) : *cp)-'A'+10) < base) {
105220: 120880ff andne r8, r8, #255 ; 0xff
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
105224: e2488037 sub r8, r8, #55 ; 0x37
105228: e1a09fc8 asr r9, r8, #31
10522c: e1590002 cmp r9, r2
105230: 01580001 cmpeq r8, r1
105234: 3affffe7 bcc 1051d8 <simple_strtoull+0x6c>
? toupper(*cp) : *cp)-'A'+10) < base) {
result = result*base + value;
cp++;
}
if (endp)
105238: e59d2004 ldr r2, [sp, #4]
10523c: e3520000 cmp r2, #0
*endp = (char *)cp;
105240: 15820000 strne r0, [r2]
return result;
}
105244: e1a01004 mov r1, r4
105248: e1a00003 mov r0, r3
10524c: e28dd008 add sp, sp, #8
105250: e8bd0ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp}
105254: e12fff1e bx lr
cp++;
base = 16;
}
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
105258: e5d07000 ldrb r7, [r0]
10525c: e3570030 cmp r7, #48 ; 0x30
105260: 0a00001e beq 1052e0 <simple_strtoull+0x174>
105264: e59fb0a8 ldr fp, [pc, #168] ; 105314 <simple_strtoull+0x1a8>
105268: e1a08007 mov r8, r7
10526c: e7dbc007 ldrb ip, [fp, r7]
105270: eaffffd0 b 1051b8 <simple_strtoull+0x4c>
if (!base) {
base = 10;
if (*cp == '0') {
base = 8;
cp++;
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
105274: e5f07001 ldrb r7, [r0, #1]!
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
105278: e59fb094 ldr fp, [pc, #148] ; 105314 <simple_strtoull+0x1a8>
10527c: e7dbc007 ldrb ip, [fp, r7]
105280: e31c0002 tst ip, #2
c -= 'a'-'A';
105284: 12473020 subne r3, r7, #32
105288: 120330ff andne r3, r3, #255 ; 0xff
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
10528c: 01a03007 moveq r3, r7
105290: e3530058 cmp r3, #88 ; 0x58
105294: e1a08007 mov r8, r7
105298: 0a000001 beq 1052a4 <simple_strtoull+0x138>
unsigned long long result = 0,value;
if (!base) {
base = 10;
if (*cp == '0') {
base = 8;
10529c: e3a02008 mov r2, #8
1052a0: eaffffc4 b 1051b8 <simple_strtoull+0x4c>
cp++;
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
1052a4: e5d02001 ldrb r2, [r0, #1]
1052a8: e7db3002 ldrb r3, [fp, r2]
1052ac: e3130044 tst r3, #68 ; 0x44
1052b0: e2801001 add r1, r0, #1
1052b4: 0afffff8 beq 10529c <simple_strtoull+0x130>
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
1052b8: e1a08002 mov r8, r2
1052bc: e1a07002 mov r7, r2
if (!base) {
base = 10;
if (*cp == '0') {
base = 8;
cp++;
if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
1052c0: e1a00001 mov r0, r1
1052c4: e1a0c003 mov ip, r3
1052c8: e3a01010 mov r1, #16
1052cc: e3a02000 mov r2, #0
1052d0: eaffffbc b 1051c8 <simple_strtoull+0x5c>
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
cp += 2;
}
while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
1052d4: e3a03000 mov r3, #0
1052d8: e3a04000 mov r4, #0
1052dc: eaffffd5 b 105238 <simple_strtoull+0xcc>
cp++;
base = 16;
}
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
1052e0: e5d03001 ldrb r3, [r0, #1]
1052e4: e59fb028 ldr fp, [pc, #40] ; 105314 <simple_strtoull+0x1a8>
1052e8: e7db1003 ldrb r1, [fp, r3]
1052ec: e3110002 tst r1, #2
c -= 'a'-'A';
1052f0: 12433020 subne r3, r3, #32
1052f4: 120330ff andne r3, r3, #255 ; 0xff
1052f8: e3530058 cmp r3, #88 ; 0x58
cp += 2;
1052fc: 05f07002 ldrbeq r7, [r0, #2]!
cp++;
base = 16;
}
}
} else if (base == 16) {
if (cp[0] == '0' && toupper(cp[1]) == 'X')
105300: 15dbc030 ldrbne ip, [fp, #48] ; 0x30
105304: 13a08030 movne r8, #48 ; 0x30
cp += 2;
105308: 01a08007 moveq r8, r7
10530c: 07dbc007 ldrbeq ip, [fp, r7]
105310: eaffffa8 b 1051b8 <simple_strtoull+0x4c>
105314: 0020020c .word 0x0020020c
00105318 <simple_strtoll>:
* @cp: The start of the string
* @endp: A pointer to the end of the parsed string will be placed here
* @base: The number base to use
*/
long long simple_strtoll(const char *cp,char **endp,unsigned int base)
{
105318: e92d4010 push {r4, lr}
if(*cp=='-')
10531c: e5d0c000 ldrb ip, [r0]
105320: e35c002d cmp ip, #45 ; 0x2d
105324: 0a000001 beq 105330 <simple_strtoll+0x18>
return -simple_strtoull(cp+1,endp,base);
return simple_strtoull(cp,endp,base);
}
105328: e8bd4010 pop {r4, lr}
*/
long long simple_strtoll(const char *cp,char **endp,unsigned int base)
{
if(*cp=='-')
return -simple_strtoull(cp+1,endp,base);
return simple_strtoull(cp,endp,base);
10532c: eaffff8e b 10516c <simple_strtoull>
* @base: The number base to use
*/
long long simple_strtoll(const char *cp,char **endp,unsigned int base)
{
if(*cp=='-')
return -simple_strtoull(cp+1,endp,base);
105330: e2800001 add r0, r0, #1
105334: ebffff8c bl 10516c <simple_strtoull>
105338: e2703000 rsbs r3, r0, #0
10533c: e2e14000 rsc r4, r1, #0
return simple_strtoull(cp,endp,base);
}
105340: e1a00003 mov r0, r3
105344: e1a01004 mov r1, r4
105348: e8bd4010 pop {r4, lr}
10534c: e12fff1e bx lr
00105350 <vsnprintf>:
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
{
105350: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
/* 'z' support added 23/7/1999 S.H. */
/* 'z' changed to 'Z' --davidm 1/25/99 */
/* 't' added for ptrdiff_t */
/* Reject out-of-range values early */
if ((int) size < 0) {
105354: e3510000 cmp r1, #0
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
{
105358: e24dd02c sub sp, sp, #44 ; 0x2c
10535c: e1a0b000 mov fp, r0
/* 'z' support added 23/7/1999 S.H. */
/* 'z' changed to 'Z' --davidm 1/25/99 */
/* 't' added for ptrdiff_t */
/* Reject out-of-range values early */
if ((int) size < 0) {
105360: e58d1020 str r1, [sp, #32]
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
{
105364: e1a04002 mov r4, r2
105368: e1a0a003 mov sl, r3
/* 'z' changed to 'Z' --davidm 1/25/99 */
/* 't' added for ptrdiff_t */
/* Reject out-of-range values early */
if ((int) size < 0) {
return 0;
10536c: b3a00000 movlt r0, #0
/* 'z' support added 23/7/1999 S.H. */
/* 'z' changed to 'Z' --davidm 1/25/99 */
/* 't' added for ptrdiff_t */
/* Reject out-of-range values early */
if ((int) size < 0) {
105370: ba00001f blt 1053f4 <vsnprintf+0xa4>
return 0;
}
str = buf;
end = buf + size - 1;
105374: e2417001 sub r7, r1, #1
105378: e0807007 add r7, r0, r7
if (end < buf - 1) {
10537c: e2403001 sub r3, r0, #1
105380: e1570003 cmp r7, r3
end = ((void *) -1);
size = end - buf + 1;
105384: 32600000 rsbcc r0, r0, #0
105388: 358d0020 strcc r0, [sp, #32]
}
for (; *fmt ; ++fmt) {
10538c: e5d20000 ldrb r0, [r2]
str = buf;
end = buf + size - 1;
if (end < buf - 1) {
end = ((void *) -1);
105390: 33e07000 mvncc r7, #0
size = end - buf + 1;
}
for (; *fmt ; ++fmt) {
105394: e3500000 cmp r0, #0
105398: 01a0900b moveq r9, fp
10539c: 0a00000c beq 1053d4 <vsnprintf+0x84>
case '0': flags |= ZEROPAD; goto repeat;
}
/* get field width */
field_width = -1;
if (isdigit(*fmt))
1053a0: e59f8808 ldr r8, [pc, #2056] ; 105bb0 <vsnprintf+0x860>
if (end < buf - 1) {
end = ((void *) -1);
size = end - buf + 1;
}
for (; *fmt ; ++fmt) {
1053a4: e1a0900b mov r9, fp
if (*fmt != '%') {
1053a8: e3500025 cmp r0, #37 ; 0x25
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1053ac: 02843001 addeq r3, r4, #1
1053b0: 03a06000 moveq r6, #0
end = ((void *) -1);
size = end - buf + 1;
}
for (; *fmt ; ++fmt) {
if (*fmt != '%') {
1053b4: 0a000012 beq 105404 <vsnprintf+0xb4>
if (str <= end)
1053b8: e1590007 cmp r9, r7
*str = *fmt;
1053bc: 95c90000 strbls r0, [r9]
*str = '%';
++str;
if (*fmt) {
if (str <= end)
*str = *fmt;
++str;
1053c0: e2899001 add r9, r9, #1
if (end < buf - 1) {
end = ((void *) -1);
size = end - buf + 1;
}
for (; *fmt ; ++fmt) {
1053c4: e5f40001 ldrb r0, [r4, #1]!
1053c8: e3500000 cmp r0, #0
1053cc: 1afffff5 bne 1053a8 <vsnprintf+0x58>
1053d0: e06b0009 rsb r0, fp, r9
num = (signed int) num;
}
str = number(str, end, num, base,
field_width, precision, flags);
}
if (str <= end)
1053d4: e1590007 cmp r9, r7
*str = '\0';
1053d8: 93a03000 movls r3, #0
1053dc: 95c93000 strbls r3, [r9]
num = (signed int) num;
}
str = number(str, end, num, base,
field_width, precision, flags);
}
if (str <= end)
1053e0: 9a000003 bls 1053f4 <vsnprintf+0xa4>
*str = '\0';
else if (size > 0)
1053e4: e59dc020 ldr ip, [sp, #32]
1053e8: e35c0000 cmp ip, #0
/* don't write out a null byte if the buf size is zero */
*end = '\0';
1053ec: 13a03000 movne r3, #0
1053f0: 15c73000 strbne r3, [r7]
/* the trailing null byte doesn't count towards the total
* ++str;
*/
return str-buf;
}
1053f4: e28dd02c add sp, sp, #44 ; 0x2c
1053f8: e8bd4ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, lr}
1053fc: e12fff1e bx lr
++fmt; /* this also skips first '%' */
switch (*fmt) {
case '-': flags |= LEFT; goto repeat;
case '+': flags |= PLUS; goto repeat;
case ' ': flags |= SPACE; goto repeat;
case '#': flags |= SPECIAL; goto repeat;
105400: e3866020 orr r6, r6, #32
for (; *fmt ; ++fmt) {
if (*fmt != '%') {
if (str <= end)
*str = *fmt;
++str;
continue;
105404: e1a04003 mov r4, r3
/* process flags */
flags = 0;
repeat:
++fmt; /* this also skips first '%' */
switch (*fmt) {
105408: e4d32001 ldrb r2, [r3], #1
10540c: e2421020 sub r1, r2, #32
105410: e3510010 cmp r1, #16
105414: 979ff101 ldrls pc, [pc, r1, lsl #2]
105418: ea000018 b 105480 <vsnprintf+0x130>
10541c: 00105478 .word 0x00105478
105420: 00105480 .word 0x00105480
105424: 00105480 .word 0x00105480
105428: 00105400 .word 0x00105400
10542c: 00105480 .word 0x00105480
105430: 00105480 .word 0x00105480
105434: 00105480 .word 0x00105480
105438: 00105480 .word 0x00105480
10543c: 00105480 .word 0x00105480
105440: 00105480 .word 0x00105480
105444: 00105480 .word 0x00105480
105448: 00105470 .word 0x00105470
10544c: 00105480 .word 0x00105480
105450: 00105468 .word 0x00105468
105454: 00105480 .word 0x00105480
105458: 00105480 .word 0x00105480
10545c: 00105460 .word 0x00105460
case '-': flags |= LEFT; goto repeat;
case '+': flags |= PLUS; goto repeat;
case ' ': flags |= SPACE; goto repeat;
case '#': flags |= SPECIAL; goto repeat;
case '0': flags |= ZEROPAD; goto repeat;
105460: e3866001 orr r6, r6, #1
105464: eaffffe6 b 105404 <vsnprintf+0xb4>
/* process flags */
flags = 0;
repeat:
++fmt; /* this also skips first '%' */
switch (*fmt) {
case '-': flags |= LEFT; goto repeat;
105468: e3866010 orr r6, r6, #16
10546c: eaffffe4 b 105404 <vsnprintf+0xb4>
case '+': flags |= PLUS; goto repeat;
105470: e3866004 orr r6, r6, #4
105474: eaffffe2 b 105404 <vsnprintf+0xb4>
case ' ': flags |= SPACE; goto repeat;
105478: e3866008 orr r6, r6, #8
10547c: eaffffe0 b 105404 <vsnprintf+0xb4>
case '0': flags |= ZEROPAD; goto repeat;
}
/* get field width */
field_width = -1;
if (isdigit(*fmt))
105480: e7d83002 ldrb r3, [r8, r2]
105484: e3130004 tst r3, #4
105488: 0a000077 beq 10566c <vsnprintf+0x31c>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
10548c: e2843001 add r3, r4, #1
105490: e3a05000 mov r5, #0
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
i = i*10 + *((*s)++) - '0';
105494: e2421030 sub r1, r2, #48 ; 0x30
105498: e1a04003 mov r4, r3
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
10549c: e4d32001 ldrb r2, [r3], #1
1054a0: e7d80002 ldrb r0, [r8, r2]
i = i*10 + *((*s)++) - '0';
1054a4: e0855105 add r5, r5, r5, lsl #2
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
1054a8: e3100004 tst r0, #4
i = i*10 + *((*s)++) - '0';
1054ac: e0815085 add r5, r1, r5, lsl #1
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
1054b0: 1afffff7 bne 105494 <vsnprintf+0x144>
}
}
/* get the precision */
precision = -1;
if (*fmt == '.') {
1054b4: e352002e cmp r2, #46 ; 0x2e
flags |= LEFT;
}
}
/* get the precision */
precision = -1;
1054b8: 13e0c000 mvnne ip, #0
if (*fmt == '.') {
1054bc: 0a000077 beq 1056a0 <vsnprintf+0x350>
precision = 0;
}
/* get the conversion qualifier */
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
1054c0: e3520068 cmp r2, #104 ; 0x68
1054c4: 1352006c cmpne r2, #108 ; 0x6c
1054c8: 0a00000a beq 1054f8 <vsnprintf+0x1a8>
1054cc: e352005a cmp r2, #90 ; 0x5a
1054d0: 0a000008 beq 1054f8 <vsnprintf+0x1a8>
1054d4: 9a000005 bls 1054f0 <vsnprintf+0x1a0>
1054d8: e3520074 cmp r2, #116 ; 0x74
1054dc: 0a000005 beq 1054f8 <vsnprintf+0x1a8>
1054e0: e352007a cmp r2, #122 ; 0x7a
1054e4: 0a000003 beq 1054f8 <vsnprintf+0x1a8>
if (precision < 0)
precision = 0;
}
/* get the conversion qualifier */
qualifier = -1;
1054e8: e3e03000 mvn r3, #0
1054ec: ea000006 b 10550c <vsnprintf+0x1bc>
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
1054f0: e352004c cmp r2, #76 ; 0x4c
1054f4: 1afffffb bne 1054e8 <vsnprintf+0x198>
*fmt =='Z' || *fmt == 'z' || *fmt == 't') {
qualifier = *fmt;
++fmt;
if (qualifier == 'l' && *fmt == 'l') {
1054f8: e352006c cmp r2, #108 ; 0x6c
/* get the conversion qualifier */
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt =='Z' || *fmt == 'z' || *fmt == 't') {
qualifier = *fmt;
++fmt;
1054fc: e2844001 add r4, r4, #1
/* get the conversion qualifier */
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt =='Z' || *fmt == 'z' || *fmt == 't') {
qualifier = *fmt;
105500: e1a03002 mov r3, r2
++fmt;
if (qualifier == 'l' && *fmt == 'l') {
105504: 15d42000 ldrbne r2, [r4]
105508: 0a000079 beq 1056f4 <vsnprintf+0x3a4>
}
/* default base */
base = 10;
switch (*fmt) {
10550c: e2421025 sub r1, r2, #37 ; 0x25
105510: e3510053 cmp r1, #83 ; 0x53
105514: 979ff101 ldrls pc, [pc, r1, lsl #2]
105518: ea00011d b 105994 <vsnprintf+0x644>
10551c: 001059cc .word 0x001059cc
105520: 00105994 .word 0x00105994
105524: 00105994 .word 0x00105994
105528: 00105994 .word 0x00105994
10552c: 00105994 .word 0x00105994
105530: 00105994 .word 0x00105994
105534: 00105994 .word 0x00105994
105538: 00105994 .word 0x00105994
10553c: 00105994 .word 0x00105994
105540: 00105994 .word 0x00105994
105544: 00105994 .word 0x00105994
105548: 00105994 .word 0x00105994
10554c: 00105994 .word 0x00105994
105550: 00105994 .word 0x00105994
105554: 00105994 .word 0x00105994
105558: 00105994 .word 0x00105994
10555c: 00105994 .word 0x00105994
105560: 00105994 .word 0x00105994
105564: 00105994 .word 0x00105994
105568: 00105994 .word 0x00105994
10556c: 00105994 .word 0x00105994
105570: 00105994 .word 0x00105994
105574: 00105994 .word 0x00105994
105578: 00105994 .word 0x00105994
10557c: 00105994 .word 0x00105994
105580: 00105994 .word 0x00105994
105584: 00105994 .word 0x00105994
105588: 00105994 .word 0x00105994
10558c: 00105994 .word 0x00105994
105590: 00105994 .word 0x00105994
105594: 00105994 .word 0x00105994
105598: 00105994 .word 0x00105994
10559c: 00105994 .word 0x00105994
1055a0: 00105994 .word 0x00105994
1055a4: 00105994 .word 0x00105994
1055a8: 00105994 .word 0x00105994
1055ac: 00105994 .word 0x00105994
1055b0: 00105994 .word 0x00105994
1055b4: 00105994 .word 0x00105994
1055b8: 00105994 .word 0x00105994
1055bc: 00105994 .word 0x00105994
1055c0: 00105994 .word 0x00105994
1055c4: 00105994 .word 0x00105994
1055c8: 00105994 .word 0x00105994
1055cc: 00105994 .word 0x00105994
1055d0: 00105994 .word 0x00105994
1055d4: 00105994 .word 0x00105994
1055d8: 00105994 .word 0x00105994
1055dc: 00105994 .word 0x00105994
1055e0: 00105994 .word 0x00105994
1055e4: 00105994 .word 0x00105994
1055e8: 001059c0 .word 0x001059c0
1055ec: 00105994 .word 0x00105994
1055f0: 00105994 .word 0x00105994
1055f4: 00105994 .word 0x00105994
1055f8: 00105994 .word 0x00105994
1055fc: 00105994 .word 0x00105994
105600: 00105994 .word 0x00105994
105604: 00105994 .word 0x00105994
105608: 00105994 .word 0x00105994
10560c: 00105994 .word 0x00105994
105610: 00105994 .word 0x00105994
105614: 00105a04 .word 0x00105a04
105618: 001059f8 .word 0x001059f8
10561c: 00105994 .word 0x00105994
105620: 00105994 .word 0x00105994
105624: 00105994 .word 0x00105994
105628: 00105994 .word 0x00105994
10562c: 001059f8 .word 0x001059f8
105630: 00105994 .word 0x00105994
105634: 00105994 .word 0x00105994
105638: 00105994 .word 0x00105994
10563c: 00105994 .word 0x00105994
105640: 001059e4 .word 0x001059e4
105644: 001059dc .word 0x001059dc
105648: 0010596c .word 0x0010596c
10564c: 00105994 .word 0x00105994
105650: 00105994 .word 0x00105994
105654: 00105794 .word 0x00105794
105658: 00105994 .word 0x00105994
10565c: 00105774 .word 0x00105774
105660: 00105994 .word 0x00105994
105664: 00105994 .word 0x00105994
105668: 00105724 .word 0x00105724
/* get field width */
field_width = -1;
if (isdigit(*fmt))
field_width = skip_atoi(&fmt);
else if (*fmt == '*') {
10566c: e352002a cmp r2, #42 ; 0x2a
case '#': flags |= SPECIAL; goto repeat;
case '0': flags |= ZEROPAD; goto repeat;
}
/* get field width */
field_width = -1;
105670: 13e05000 mvnne r5, #0
if (isdigit(*fmt))
field_width = skip_atoi(&fmt);
else if (*fmt == '*') {
105674: 1affff8e bne 1054b4 <vsnprintf+0x164>
++fmt;
/* it's the next argument */
field_width = va_arg(args, int);
105678: e59a5000 ldr r5, [sl]
/* get field width */
field_width = -1;
if (isdigit(*fmt))
field_width = skip_atoi(&fmt);
else if (*fmt == '*') {
++fmt;
10567c: e2844001 add r4, r4, #1
/* it's the next argument */
field_width = va_arg(args, int);
if (field_width < 0) {
field_width = -field_width;
flags |= LEFT;
105680: e5d42000 ldrb r2, [r4]
field_width = skip_atoi(&fmt);
else if (*fmt == '*') {
++fmt;
/* it's the next argument */
field_width = va_arg(args, int);
if (field_width < 0) {
105684: e3550000 cmp r5, #0
field_width = -field_width;
105688: b2655000 rsblt r5, r5, #0
flags |= LEFT;
10568c: b3866010 orrlt r6, r6, #16
}
}
/* get the precision */
precision = -1;
if (*fmt == '.') {
105690: e352002e cmp r2, #46 ; 0x2e
if (isdigit(*fmt))
field_width = skip_atoi(&fmt);
else if (*fmt == '*') {
++fmt;
/* it's the next argument */
field_width = va_arg(args, int);
105694: e28aa004 add sl, sl, #4
flags |= LEFT;
}
}
/* get the precision */
precision = -1;
105698: 13e0c000 mvnne ip, #0
if (*fmt == '.') {
10569c: 1affff87 bne 1054c0 <vsnprintf+0x170>
++fmt;
if (isdigit(*fmt))
1056a0: e5d43001 ldrb r3, [r4, #1]
1056a4: e7d8c003 ldrb ip, [r8, r3]
1056a8: e21cc004 ands ip, ip, #4
}
/* get the precision */
precision = -1;
if (*fmt == '.') {
++fmt;
1056ac: e2841001 add r1, r4, #1
if (isdigit(*fmt))
1056b0: e1a02003 mov r2, r3
1056b4: 0a000013 beq 105708 <vsnprintf+0x3b8>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1056b8: e2842002 add r2, r4, #2
1056bc: e3a0c000 mov ip, #0
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
i = i*10 + *((*s)++) - '0';
1056c0: e1a04002 mov r4, r2
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
1056c4: e4d20001 ldrb r0, [r2], #1
i = i*10 + *((*s)++) - '0';
1056c8: e2431030 sub r1, r3, #48 ; 0x30
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
1056cc: e1a03000 mov r3, r0
1056d0: e7d80000 ldrb r0, [r8, r0]
i = i*10 + *((*s)++) - '0';
1056d4: e08cc10c add ip, ip, ip, lsl #2
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
1056d8: e3100004 tst r0, #4
i = i*10 + *((*s)++) - '0';
1056dc: e081c08c add ip, r1, ip, lsl #1
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
1056e0: 1afffff6 bne 1056c0 <vsnprintf+0x370>
else if (*fmt == '*') {
++fmt;
/* it's the next argument */
precision = va_arg(args, int);
}
if (precision < 0)
1056e4: e35c0000 cmp ip, #0
1056e8: e5d42000 ldrb r2, [r4]
precision = 0;
1056ec: b3a0c000 movlt ip, #0
1056f0: eaffff72 b 1054c0 <vsnprintf+0x170>
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt =='Z' || *fmt == 'z' || *fmt == 't') {
qualifier = *fmt;
++fmt;
if (qualifier == 'l' && *fmt == 'l') {
1056f4: e5d42000 ldrb r2, [r4]
1056f8: e352006c cmp r2, #108 ; 0x6c
qualifier = 'L';
++fmt;
1056fc: 05f42001 ldrbeq r2, [r4, #1]!
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt =='Z' || *fmt == 'z' || *fmt == 't') {
qualifier = *fmt;
++fmt;
if (qualifier == 'l' && *fmt == 'l') {
qualifier = 'L';
105700: 03a0304c moveq r3, #76 ; 0x4c
105704: eaffff80 b 10550c <vsnprintf+0x1bc>
precision = -1;
if (*fmt == '.') {
++fmt;
if (isdigit(*fmt))
precision = skip_atoi(&fmt);
else if (*fmt == '*') {
105708: e353002a cmp r3, #42 ; 0x2a
10570c: 11a04001 movne r4, r1
105710: 1affff6a bne 1054c0 <vsnprintf+0x170>
++fmt;
/* it's the next argument */
precision = va_arg(args, int);
105714: e59ac000 ldr ip, [sl]
if (*fmt == '.') {
++fmt;
if (isdigit(*fmt))
precision = skip_atoi(&fmt);
else if (*fmt == '*') {
++fmt;
105718: e2814001 add r4, r1, #1
/* it's the next argument */
precision = va_arg(args, int);
10571c: e28aa004 add sl, sl, #4
105720: eaffffef b 1056e4 <vsnprintf+0x394>
break;
case 'X':
flags |= LARGE;
case 'x':
base = 16;
105724: e3a0e010 mov lr, #16
} else {
--fmt;
}
continue;
}
if (qualifier == 'L')
105728: e353004c cmp r3, #76 ; 0x4c
10572c: 0a000013 beq 105780 <vsnprintf+0x430>
num = va_arg(args, long long);
else if (qualifier == 'l') {
105730: e353006c cmp r3, #108 ; 0x6c
105734: 0a0000ff beq 105b38 <vsnprintf+0x7e8>
num = va_arg(args, unsigned long);
if (flags & SIGN)
num = (signed long) num;
} else if (qualifier == 'Z' || qualifier == 'z') {
105738: e353005a cmp r3, #90 ; 0x5a
10573c: 1353007a cmpne r3, #122 ; 0x7a
105740: 1a000103 bne 105b54 <vsnprintf+0x804>
num = va_arg(args, size_t);
105744: e59a3000 ldr r3, [sl]
105748: e28aa004 add sl, sl, #4
10574c: e1a02003 mov r2, r3
105750: e3a03000 mov r3, #0
} else {
num = va_arg(args, unsigned int);
if (flags & SIGN)
num = (signed int) num;
}
str = number(str, end, num, base,
105754: e1a00009 mov r0, r9
105758: e1a01007 mov r1, r7
10575c: e58de000 str lr, [sp]
105760: e98d1020 stmib sp, {r5, ip}
105764: e58d600c str r6, [sp, #12]
105768: ebfffd05 bl 104b84 <number>
10576c: e1a09000 mov r9, r0
105770: eaffff13 b 1053c4 <vsnprintf+0x74>
} else {
--fmt;
}
continue;
}
if (qualifier == 'L')
105774: e353004c cmp r3, #76 ; 0x4c
++fmt;
}
}
/* default base */
base = 10;
105778: e3a0e00a mov lr, #10
} else {
--fmt;
}
continue;
}
if (qualifier == 'L')
10577c: 1affffeb bne 105730 <vsnprintf+0x3e0>
num = va_arg(args, long long);
105780: e28aa007 add sl, sl, #7
105784: e3ca1007 bic r1, sl, #7
105788: e281a008 add sl, r1, #8
10578c: e891000c ldm r1, {r2, r3}
105790: eaffffef b 105754 <vsnprintf+0x404>
++str;
}
continue;
case 's':
s = va_arg(args, char *);
105794: e59ae000 ldr lr, [sl]
len = strnlen(s, precision);
105798: e1a0100c mov r1, ip
10579c: e1a0000e mov r0, lr
1057a0: e58de01c str lr, [sp, #28]
1057a4: eb000349 bl 1064d0 <strnlen>
if (!(flags & LEFT)) {
1057a8: e3160010 tst r6, #16
++str;
}
continue;
case 's':
s = va_arg(args, char *);
1057ac: e28aa004 add sl, sl, #4
len = strnlen(s, precision);
if (!(flags & LEFT)) {
1057b0: e59d301c ldr r3, [sp, #28]
1057b4: 1a000029 bne 105860 <vsnprintf+0x510>
while (len < field_width--) {
1057b8: e1550000 cmp r5, r0
1057bc: e2456001 sub r6, r5, #1
1057c0: d1a05006 movle r5, r6
1057c4: da000025 ble 105860 <vsnprintf+0x510>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1057c8: e089c005 add ip, r9, r5
1057cc: e060c00c rsb ip, r0, ip
1057d0: e1e02009 mvn r2, r9
1057d4: e08c1002 add r1, ip, r2
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
if (str <= end)
1057d8: e1570009 cmp r7, r9
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1057dc: e58d5024 str r5, [sp, #36] ; 0x24
1057e0: e2011001 and r1, r1, #1
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
if (str <= end)
1057e4: 2a0000eb bcs 105b98 <vsnprintf+0x848>
*str = ' ';
++str;
1057e8: e2892001 add r2, r9, #1
s = va_arg(args, char *);
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
1057ec: e152000c cmp r2, ip
1057f0: 0a000013 beq 105844 <vsnprintf+0x4f4>
1057f4: e3510000 cmp r1, #0
1057f8: 0a000005 beq 105814 <vsnprintf+0x4c4>
if (str <= end)
1057fc: e1570002 cmp r7, r2
*str = ' ';
105800: 23a01020 movcs r1, #32
105804: 25c21000 strbcs r1, [r2]
++str;
105808: e2822001 add r2, r2, #1
s = va_arg(args, char *);
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
10580c: e152000c cmp r2, ip
105810: 0a00000b beq 105844 <vsnprintf+0x4f4>
105814: e58d3014 str r3, [sp, #20]
if (str <= end)
105818: e1570002 cmp r7, r2
*str = ' ';
10581c: 23a03020 movcs r3, #32
++str;
105820: e2821001 add r1, r2, #1
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
if (str <= end)
*str = ' ';
105824: 25c23000 strbcs r3, [r2]
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
if (str <= end)
105828: e1570001 cmp r7, r1
*str = ' ';
10582c: 23a03020 movcs r3, #32
105830: 25c23001 strbcs r3, [r2, #1]
++str;
105834: e2812001 add r2, r1, #1
s = va_arg(args, char *);
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
105838: e152000c cmp r2, ip
10583c: 1afffff5 bne 105818 <vsnprintf+0x4c8>
105840: e59d3014 ldr r3, [sp, #20]
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
105844: e59dc024 ldr ip, [sp, #36] ; 0x24
105848: e2655001 rsb r5, r5, #1
10584c: e2466001 sub r6, r6, #1
105850: e0851000 add r1, r5, r0
105854: e060e00c rsb lr, r0, ip
105858: e0865001 add r5, r6, r1
10585c: e089900e add r9, r9, lr
if (str <= end)
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
105860: e3500000 cmp r0, #0
105864: da00001f ble 1058e8 <vsnprintf+0x598>
105868: e2401001 sub r1, r0, #1
if (str <= end)
10586c: e1570009 cmp r7, r9
105870: e2011001 and r1, r1, #1
*str = *s;
105874: 25d3e000 ldrbcs lr, [r3]
105878: 25c9e000 strbcs lr, [r9]
if (str <= end)
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
10587c: e3a02001 mov r2, #1
105880: e1500002 cmp r0, r2
105884: 0a000016 beq 1058e4 <vsnprintf+0x594>
105888: e3510000 cmp r1, #0
10588c: 0a000006 beq 1058ac <vsnprintf+0x55c>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
105890: e0891002 add r1, r9, r2
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
if (str <= end)
105894: e1570001 cmp r7, r1
*str = *s;
105898: 25d31001 ldrbcs r1, [r3, #1]
if (str <= end)
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
10589c: e2822001 add r2, r2, #1
if (str <= end)
*str = *s;
1058a0: 25c91001 strbcs r1, [r9, #1]
if (str <= end)
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
1058a4: e1500002 cmp r0, r2
1058a8: 0a00000d beq 1058e4 <vsnprintf+0x594>
1058ac: e1a06005 mov r6, r5
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1058b0: e089e002 add lr, r9, r2
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
if (str <= end)
1058b4: e157000e cmp r7, lr
*str = *s;
1058b8: 27d3e002 ldrbcs lr, [r3, r2]
if (str <= end)
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
1058bc: e2821001 add r1, r2, #1
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1058c0: e089c001 add ip, r9, r1
++str;
}
}
for (i = 0; i < len; ++i) {
if (str <= end)
*str = *s;
1058c4: 27c9e002 strbcs lr, [r9, r2]
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
if (str <= end)
1058c8: e157000c cmp r7, ip
*str = *s;
1058cc: 27d35001 ldrbcs r5, [r3, r1]
1058d0: 27c95001 strbcs r5, [r9, r1]
if (str <= end)
*str = ' ';
++str;
}
}
for (i = 0; i < len; ++i) {
1058d4: e2812001 add r2, r1, #1
1058d8: e1500002 cmp r0, r2
1058dc: 1afffff3 bne 1058b0 <vsnprintf+0x560>
1058e0: e1a05006 mov r5, r6
1058e4: e0899000 add r9, r9, r0
if (str <= end)
*str = *s;
++str; ++s;
}
while (len < field_width--) {
1058e8: e1550000 cmp r5, r0
1058ec: dafffeb4 ble 1053c4 <vsnprintf+0x74>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
1058f0: e0602005 rsb r2, r0, r5
1058f4: e0892002 add r2, r9, r2
1058f8: e1e0e009 mvn lr, r9
1058fc: e082300e add r3, r2, lr
if (str <= end)
*str = *s;
++str; ++s;
}
while (len < field_width--) {
if (str <= end)
105900: e1570009 cmp r7, r9
105904: e2033001 and r3, r3, #1
*str = ' ';
105908: 23a00020 movcs r0, #32
10590c: 25c90000 strbcs r0, [r9]
++str;
105910: e2899001 add r9, r9, #1
for (i = 0; i < len; ++i) {
if (str <= end)
*str = *s;
++str; ++s;
}
while (len < field_width--) {
105914: e1590002 cmp r9, r2
105918: 0a000011 beq 105964 <vsnprintf+0x614>
10591c: e3530000 cmp r3, #0
105920: 0a000005 beq 10593c <vsnprintf+0x5ec>
if (str <= end)
105924: e1570009 cmp r7, r9
*str = ' ';
105928: 23a01020 movcs r1, #32
10592c: 25c91000 strbcs r1, [r9]
++str;
105930: e2899001 add r9, r9, #1
for (i = 0; i < len; ++i) {
if (str <= end)
*str = *s;
++str; ++s;
}
while (len < field_width--) {
105934: e1590002 cmp r9, r2
105938: 0a000009 beq 105964 <vsnprintf+0x614>
if (str <= end)
10593c: e1570009 cmp r7, r9
*str = ' ';
105940: 23a00020 movcs r0, #32
++str;
105944: e2893001 add r3, r9, #1
*str = *s;
++str; ++s;
}
while (len < field_width--) {
if (str <= end)
*str = ' ';
105948: 25c90000 strbcs r0, [r9]
if (str <= end)
*str = *s;
++str; ++s;
}
while (len < field_width--) {
if (str <= end)
10594c: e1570003 cmp r7, r3
*str = ' ';
105950: 23a0c020 movcs ip, #32
105954: 25c9c001 strbcs ip, [r9, #1]
++str;
105958: e2839001 add r9, r3, #1
for (i = 0; i < len; ++i) {
if (str <= end)
*str = *s;
++str; ++s;
}
while (len < field_width--) {
10595c: e1590002 cmp r9, r2
105960: 1afffff5 bne 10593c <vsnprintf+0x5ec>
105964: e1a09002 mov r9, r2
105968: eafffe95 b 1053c4 <vsnprintf+0x74>
++str;
}
continue;
case 'p':
if (field_width == -1) {
10596c: e3750001 cmn r5, #1
field_width = 2*sizeof(void *);
flags |= ZEROPAD;
}
str = number(str, end,
105970: e59a2000 ldr r2, [sl]
continue;
case 'p':
if (field_width == -1) {
field_width = 2*sizeof(void *);
flags |= ZEROPAD;
105974: 03866001 orreq r6, r6, #1
}
continue;
case 'p':
if (field_width == -1) {
field_width = 2*sizeof(void *);
105978: 03a05008 moveq r5, #8
flags |= ZEROPAD;
}
str = number(str, end,
(unsigned long) va_arg(args, void *),
10597c: e28aa004 add sl, sl, #4
case 'p':
if (field_width == -1) {
field_width = 2*sizeof(void *);
flags |= ZEROPAD;
}
str = number(str, end,
105980: e1a00009 mov r0, r9
105984: e1a01007 mov r1, r7
105988: e3a03000 mov r3, #0
10598c: e3a0e010 mov lr, #16
105990: eaffff71 b 10575c <vsnprintf+0x40c>
flags |= SIGN;
case 'u':
break;
default:
if (str <= end)
105994: e1590007 cmp r9, r7
*str = '%';
105998: 93a03025 movls r3, #37 ; 0x25
10599c: 95c93000 strbls r3, [r9]
1059a0: 95d42000 ldrbls r2, [r4]
++str;
if (*fmt) {
1059a4: e3520000 cmp r2, #0
break;
default:
if (str <= end)
*str = '%';
++str;
1059a8: e2899001 add r9, r9, #1
if (*fmt) {
if (str <= end)
*str = *fmt;
++str;
} else {
--fmt;
1059ac: 02444001 subeq r4, r4, #1
default:
if (str <= end)
*str = '%';
++str;
if (*fmt) {
1059b0: 0afffe83 beq 1053c4 <vsnprintf+0x74>
if (str <= end)
1059b4: e1590007 cmp r9, r7
*str = *fmt;
1059b8: 95c92000 strbls r2, [r9]
1059bc: eafffe7f b 1053c0 <vsnprintf+0x70>
case 'o':
base = 8;
break;
case 'X':
flags |= LARGE;
1059c0: e3866040 orr r6, r6, #64 ; 0x40
case 'x':
base = 16;
1059c4: e3a0e010 mov lr, #16
1059c8: eaffff56 b 105728 <vsnprintf+0x3d8>
*ip = (str - buf);
}
continue;
case '%':
if (str <= end)
1059cc: e1590007 cmp r9, r7
*str = '%';
1059d0: 93a03025 movls r3, #37 ; 0x25
1059d4: 95c93000 strbls r3, [r9]
1059d8: eafffe78 b 1053c0 <vsnprintf+0x70>
++str;
continue;
/* integer number formats - set up the flags and "break" */
case 'o':
base = 8;
1059dc: e3a0e008 mov lr, #8
break;
1059e0: eaffff50 b 105728 <vsnprintf+0x3d8>
} else if (qualifier == 'Z' || qualifier == 'z') {
size_t * ip = va_arg(args, size_t *);
*ip = (str - buf);
} else {
int * ip = va_arg(args, int *);
*ip = (str - buf);
1059e4: e59a3000 ldr r3, [sl]
1059e8: e06b0009 rsb r0, fp, r9
1059ec: e5830000 str r0, [r3]
*ip = (str - buf);
} else if (qualifier == 'Z' || qualifier == 'z') {
size_t * ip = va_arg(args, size_t *);
*ip = (str - buf);
} else {
int * ip = va_arg(args, int *);
1059f0: e28aa004 add sl, sl, #4
1059f4: eafffe72 b 1053c4 <vsnprintf+0x74>
base = 16;
break;
case 'd':
case 'i':
flags |= SIGN;
1059f8: e3866002 orr r6, r6, #2
++fmt;
}
}
/* default base */
base = 10;
1059fc: e3a0e00a mov lr, #10
105a00: eaffff48 b 105728 <vsnprintf+0x3d8>
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
105a04: e3160010 tst r6, #16
105a08: 1a000021 bne 105a94 <vsnprintf+0x744>
while (--field_width > 0) {
105a0c: e2451001 sub r1, r5, #1
105a10: e3510000 cmp r1, #0
105a14: d1a05001 movle r5, r1
105a18: da00001d ble 105a94 <vsnprintf+0x744>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
105a1c: e2490001 sub r0, r9, #1
105a20: e0805005 add r5, r0, r5
105a24: e1e03009 mvn r3, r9
105a28: e0852003 add r2, r5, r3
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
if (str <= end)
105a2c: e1570009 cmp r7, r9
105a30: e2022001 and r2, r2, #1
105a34: 2a00005a bcs 105ba4 <vsnprintf+0x854>
*str = ' ';
++str;
105a38: e2893001 add r3, r9, #1
base = 10;
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
105a3c: e1530005 cmp r3, r5
105a40: 0a000011 beq 105a8c <vsnprintf+0x73c>
105a44: e3520000 cmp r2, #0
105a48: 0a000005 beq 105a64 <vsnprintf+0x714>
if (str <= end)
105a4c: e1570003 cmp r7, r3
*str = ' ';
105a50: 23a02020 movcs r2, #32
105a54: 25c32000 strbcs r2, [r3]
++str;
105a58: e2833001 add r3, r3, #1
base = 10;
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
105a5c: e1530005 cmp r3, r5
105a60: 0a000009 beq 105a8c <vsnprintf+0x73c>
if (str <= end)
105a64: e1570003 cmp r7, r3
*str = ' ';
105a68: 23a0c020 movcs ip, #32
++str;
105a6c: e2832001 add r2, r3, #1
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
if (str <= end)
*str = ' ';
105a70: 25c3c000 strbcs ip, [r3]
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
if (str <= end)
105a74: e1570002 cmp r7, r2
*str = ' ';
105a78: 23a0c020 movcs ip, #32
105a7c: 25c3c001 strbcs ip, [r3, #1]
++str;
105a80: e2823001 add r3, r2, #1
base = 10;
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
105a84: e1530005 cmp r3, r5
105a88: 1afffff5 bne 105a64 <vsnprintf+0x714>
105a8c: e0899001 add r9, r9, r1
105a90: e3a05000 mov r5, #0
if (str <= end)
*str = ' ';
++str;
}
}
c = (unsigned char) va_arg(args, int);
105a94: e59a3000 ldr r3, [sl]
if (str <= end)
105a98: e1590007 cmp r9, r7
if (str <= end)
*str = ' ';
++str;
}
}
c = (unsigned char) va_arg(args, int);
105a9c: 95c93000 strbls r3, [r9]
105aa0: e28a0004 add r0, sl, #4
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
105aa4: e3550001 cmp r5, #1
}
}
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
105aa8: e2891001 add r1, r9, #1
if (str <= end)
*str = ' ';
++str;
}
}
c = (unsigned char) va_arg(args, int);
105aac: d1a0a000 movle sl, r0
if (str <= end)
*str = c;
++str;
105ab0: d1a09001 movle r9, r1
while (--field_width > 0) {
105ab4: dafffe42 ble 1053c4 <vsnprintf+0x74>
105ab8: e1e02001 mvn r2, r1
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
105abc: e0899005 add r9, r9, r5
105ac0: e089a002 add sl, r9, r2
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
if (str <= end)
105ac4: e1570001 cmp r7, r1
105ac8: e20a2001 and r2, sl, #1
*str = ' ';
105acc: 23a0a020 movcs sl, #32
105ad0: 25c1a000 strbcs sl, [r1]
++str;
105ad4: e2813001 add r3, r1, #1
}
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
105ad8: e1530009 cmp r3, r9
105adc: 0a000011 beq 105b28 <vsnprintf+0x7d8>
105ae0: e3520000 cmp r2, #0
105ae4: 0a000005 beq 105b00 <vsnprintf+0x7b0>
if (str <= end)
105ae8: e1570003 cmp r7, r3
*str = ' ';
105aec: 23a0c020 movcs ip, #32
++str;
105af0: e2833001 add r3, r3, #1
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
if (str <= end)
*str = ' ';
105af4: 25c1c001 strbcs ip, [r1, #1]
}
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
105af8: e1530009 cmp r3, r9
105afc: 0a000009 beq 105b28 <vsnprintf+0x7d8>
if (str <= end)
105b00: e1570003 cmp r7, r3
*str = ' ';
105b04: 23a0c020 movcs ip, #32
++str;
105b08: e2832001 add r2, r3, #1
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
if (str <= end)
*str = ' ';
105b0c: 25c3c000 strbcs ip, [r3]
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
if (str <= end)
105b10: e1570002 cmp r7, r2
*str = ' ';
105b14: 23a0c020 movcs ip, #32
105b18: 25c3c001 strbcs ip, [r3, #1]
++str;
105b1c: e2823001 add r3, r2, #1
}
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
105b20: e1530009 cmp r3, r9
105b24: 1afffff5 bne 105b00 <vsnprintf+0x7b0>
* string is truncated.
*
* Call this function if you are already dealing with a va_list.
* You probably want snprintf instead.
*/
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
105b28: e2455001 sub r5, r5, #1
}
c = (unsigned char) va_arg(args, int);
if (str <= end)
*str = c;
++str;
while (--field_width > 0) {
105b2c: e0819005 add r9, r1, r5
if (str <= end)
*str = ' ';
++str;
}
}
c = (unsigned char) va_arg(args, int);
105b30: e1a0a000 mov sl, r0
105b34: eafffe22 b 1053c4 <vsnprintf+0x74>
} else if (qualifier == 'h') {
num = (unsigned short) va_arg(args, int);
if (flags & SIGN)
num = (signed short) num;
} else {
num = va_arg(args, unsigned int);
105b38: e59a1000 ldr r1, [sl]
if (flags & SIGN)
105b3c: e3160002 tst r6, #2
} else if (qualifier == 'h') {
num = (unsigned short) va_arg(args, int);
if (flags & SIGN)
num = (signed short) num;
} else {
num = va_arg(args, unsigned int);
105b40: e1a02001 mov r2, r1
105b44: e3a03000 mov r3, #0
105b48: e28aa004 add sl, sl, #4
if (flags & SIGN)
num = (signed int) num;
105b4c: 11a03fc2 asrne r3, r2, #31
105b50: eafffeff b 105754 <vsnprintf+0x404>
num = va_arg(args, unsigned long);
if (flags & SIGN)
num = (signed long) num;
} else if (qualifier == 'Z' || qualifier == 'z') {
num = va_arg(args, size_t);
} else if (qualifier == 't') {
105b54: e3530074 cmp r3, #116 ; 0x74
105b58: 0a00000a beq 105b88 <vsnprintf+0x838>
num = va_arg(args, ptrdiff_t);
} else if (qualifier == 'h') {
105b5c: e3530068 cmp r3, #104 ; 0x68
105b60: 1afffff4 bne 105b38 <vsnprintf+0x7e8>
num = (unsigned short) va_arg(args, int);
105b64: e1da00b0 ldrh r0, [sl]
if (flags & SIGN)
105b68: e3160002 tst r6, #2
} else if (qualifier == 'Z' || qualifier == 'z') {
num = va_arg(args, size_t);
} else if (qualifier == 't') {
num = va_arg(args, ptrdiff_t);
} else if (qualifier == 'h') {
num = (unsigned short) va_arg(args, int);
105b6c: e1a02000 mov r2, r0
105b70: e3a03000 mov r3, #0
if (flags & SIGN)
num = (signed short) num;
105b74: 11a02800 lslne r2, r0, #16
105b78: 11a02842 asrne r2, r2, #16
} else if (qualifier == 'Z' || qualifier == 'z') {
num = va_arg(args, size_t);
} else if (qualifier == 't') {
num = va_arg(args, ptrdiff_t);
} else if (qualifier == 'h') {
num = (unsigned short) va_arg(args, int);
105b7c: e28aa004 add sl, sl, #4
if (flags & SIGN)
num = (signed short) num;
105b80: 11a03fc2 asrne r3, r2, #31
105b84: eafffef2 b 105754 <vsnprintf+0x404>
if (flags & SIGN)
num = (signed long) num;
} else if (qualifier == 'Z' || qualifier == 'z') {
num = va_arg(args, size_t);
} else if (qualifier == 't') {
num = va_arg(args, ptrdiff_t);
105b88: e59a2000 ldr r2, [sl]
105b8c: e28aa004 add sl, sl, #4
105b90: e1a03fc2 asr r3, r2, #31
105b94: eafffeee b 105754 <vsnprintf+0x404>
len = strnlen(s, precision);
if (!(flags & LEFT)) {
while (len < field_width--) {
if (str <= end)
*str = ' ';
105b98: e3a02020 mov r2, #32
105b9c: e5c92000 strb r2, [r9]
105ba0: eaffff10 b 1057e8 <vsnprintf+0x498>
switch (*fmt) {
case 'c':
if (!(flags & LEFT)) {
while (--field_width > 0) {
if (str <= end)
*str = ' ';
105ba4: e3a03020 mov r3, #32
105ba8: e5c93000 strb r3, [r9]
105bac: eaffffa1 b 105a38 <vsnprintf+0x6e8>
105bb0: 0020020c .word 0x0020020c
00105bb4 <vscnprintf>:
*
* Call this function if you are already dealing with a va_list.
* You probably want scnprintf instead.
*/
int vscnprintf(char *buf, size_t size, const char *fmt, va_list args)
{
105bb4: e92d4010 push {r4, lr}
105bb8: e1a04001 mov r4, r1
unsigned int i;
i=vsnprintf(buf,size,fmt,args);
105bbc: ebfffde3 bl 105350 <vsnprintf>
return (i >= size) ? (size - 1) : i;
105bc0: e1540000 cmp r4, r0
105bc4: 92440001 subls r0, r4, #1
}
105bc8: e8bd4010 pop {r4, lr}
105bcc: e12fff1e bx lr
00105bd0 <snprintf>:
* generated for the given input, excluding the trailing null,
* as per ISO C99. If the return is greater than or equal to
* @size, the resulting string is truncated.
*/
int snprintf(char * buf, size_t size, const char *fmt, ...)
{
105bd0: e92d000c push {r2, r3}
105bd4: e52de004 push {lr} ; (str lr, [sp, #-4]!)
105bd8: e24dd00c sub sp, sp, #12
va_list args;
int i;
va_start(args, fmt);
105bdc: e28dc014 add ip, sp, #20
i=vsnprintf(buf,size,fmt,args);
105be0: e59d2010 ldr r2, [sp, #16]
105be4: e1a0300c mov r3, ip
int snprintf(char * buf, size_t size, const char *fmt, ...)
{
va_list args;
int i;
va_start(args, fmt);
105be8: e58dc004 str ip, [sp, #4]
i=vsnprintf(buf,size,fmt,args);
105bec: ebfffdd7 bl 105350 <vsnprintf>
va_end(args);
return i;
}
105bf0: e28dd00c add sp, sp, #12
105bf4: e49de004 pop {lr} ; (ldr lr, [sp], #4)
105bf8: e28dd008 add sp, sp, #8
105bfc: e12fff1e bx lr
00105c00 <scnprintf>:
* the trailing '\0'. If @size is <= 0 the function returns 0. If the return is
* greater than or equal to @size, the resulting string is truncated.
*/
int scnprintf(char * buf, size_t size, const char *fmt, ...)
{
105c00: e92d000c push {r2, r3}
105c04: e92d4010 push {r4, lr}
105c08: e24dd008 sub sp, sp, #8
va_list args;
unsigned int i;
va_start(args, fmt);
105c0c: e28dc014 add ip, sp, #20
i = vsnprintf(buf, size, fmt, args);
105c10: e59d2010 ldr r2, [sp, #16]
105c14: e1a0300c mov r3, ip
* the trailing '\0'. If @size is <= 0 the function returns 0. If the return is
* greater than or equal to @size, the resulting string is truncated.
*/
int scnprintf(char * buf, size_t size, const char *fmt, ...)
{
105c18: e1a04001 mov r4, r1
va_list args;
unsigned int i;
va_start(args, fmt);
105c1c: e58dc004 str ip, [sp, #4]
i = vsnprintf(buf, size, fmt, args);
105c20: ebfffdca bl 105350 <vsnprintf>
va_end(args);
return (i >= size) ? (size - 1) : i;
105c24: e1540000 cmp r4, r0
105c28: 92440001 subls r0, r4, #1
}
105c2c: e28dd008 add sp, sp, #8
105c30: e8bd4010 pop {r4, lr}
105c34: e28dd008 add sp, sp, #8
105c38: e12fff1e bx lr
00105c3c <vsprintf>:
*
* Call this function if you are already dealing with a va_list.
* You probably want sprintf instead.
*/
int vsprintf(char *buf, const char *fmt, va_list args)
{
105c3c: e1a0c001 mov ip, r1
105c40: e1a03002 mov r3, r2
return vsnprintf(buf, INT_MAX, fmt, args);
105c44: e3e01102 mvn r1, #-2147483648 ; 0x80000000
105c48: e1a0200c mov r2, ip
105c4c: eafffdbf b 105350 <vsnprintf>
00105c50 <sprintf>:
* The function returns the number of characters written
* into @buf. Use snprintf or scnprintf in order to avoid
* buffer overflows.
*/
int sprintf(char * buf, const char *fmt, ...)
{
105c50: e92d000e push {r1, r2, r3}
105c54: e52de004 push {lr} ; (str lr, [sp, #-4]!)
105c58: e24dd008 sub sp, sp, #8
va_list args;
int i;
va_start(args, fmt);
105c5c: e28dc010 add ip, sp, #16
i=vsnprintf(buf, INT_MAX, fmt, args);
105c60: e3e01102 mvn r1, #-2147483648 ; 0x80000000
105c64: e59d200c ldr r2, [sp, #12]
105c68: e1a0300c mov r3, ip
int sprintf(char * buf, const char *fmt, ...)
{
va_list args;
int i;
va_start(args, fmt);
105c6c: e58dc004 str ip, [sp, #4]
i=vsnprintf(buf, INT_MAX, fmt, args);
105c70: ebfffdb6 bl 105350 <vsnprintf>
va_end(args);
return i;
}
105c74: e28dd008 add sp, sp, #8
105c78: e49de004 pop {lr} ; (ldr lr, [sp], #4)
105c7c: e28dd00c add sp, sp, #12
105c80: e12fff1e bx lr
00105c84 <vsscanf>:
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
{
105c84: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
while(*fmt && *str) {
/* skip any white space in format */
/* white space in format matchs any amount of
* white space, including none, in the input.
*/
if (isspace(*fmt)) {
105c88: e59f580c ldr r5, [pc, #2060] ; 10649c <vsscanf+0x818>
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
{
105c8c: e1a03002 mov r3, r2
const char *str = buf;
char *next;
char digit;
int num = 0;
105c90: e5d12000 ldrb r2, [r1]
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
{
105c94: e24dd014 sub sp, sp, #20
105c98: e1a07000 mov r7, r0
105c9c: e1a04001 mov r4, r1
const char *str = buf;
char *next;
char digit;
int num = 0;
105ca0: e3a06000 mov r6, #0
/* skip any white space in format */
/* white space in format matchs any amount of
* white space, including none, in the input.
*/
if (isspace(*fmt)) {
while (isspace(*fmt))
105ca4: e1a08005 mov r8, r5
int qualifier;
int base;
int field_width;
int is_sign = 0;
while(*fmt && *str) {
105ca8: e3520000 cmp r2, #0
105cac: 0a00001d beq 105d28 <vsscanf+0xa4>
105cb0: e5d0c000 ldrb ip, [r0]
105cb4: e35c0000 cmp ip, #0
105cb8: 0a00001a beq 105d28 <vsscanf+0xa4>
/* skip any white space in format */
/* white space in format matchs any amount of
* white space, including none, in the input.
*/
if (isspace(*fmt)) {
105cbc: e7d51002 ldrb r1, [r5, r2]
105cc0: e3110020 tst r1, #32
105cc4: 0a00000f beq 105d08 <vsscanf+0x84>
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
105cc8: e2841001 add r1, r4, #1
/* skip any white space in format */
/* white space in format matchs any amount of
* white space, including none, in the input.
*/
if (isspace(*fmt)) {
while (isspace(*fmt))
105ccc: e5d12000 ldrb r2, [r1]
while(*fmt && *str) {
/* skip any white space in format */
/* white space in format matchs any amount of
* white space, including none, in the input.
*/
if (isspace(*fmt)) {
105cd0: e1a04001 mov r4, r1
while (isspace(*fmt))
105cd4: e7d51002 ldrb r1, [r5, r2]
105cd8: e3110020 tst r1, #32
105cdc: e2841001 add r1, r4, #1
105ce0: 1afffff9 bne 105ccc <vsscanf+0x48>
++fmt;
while (isspace(*str))
105ce4: e7d8c00c ldrb ip, [r8, ip]
105ce8: e31c0020 tst ip, #32
105cec: 0a000005 beq 105d08 <vsscanf+0x84>
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
105cf0: e2801001 add r1, r0, #1
* white space, including none, in the input.
*/
if (isspace(*fmt)) {
while (isspace(*fmt))
++fmt;
while (isspace(*str))
105cf4: e1a00001 mov r0, r1
105cf8: e4d1c001 ldrb ip, [r1], #1
105cfc: e7d5c00c ldrb ip, [r5, ip]
105d00: e31c0020 tst ip, #32
105d04: 1afffffa bne 105cf4 <vsscanf+0x70>
++str;
}
/* anything that is not a conversion must match exactly */
if (*fmt != '%' && *fmt) {
105d08: e3520000 cmp r2, #0
105d0c: 13520025 cmpne r2, #37 ; 0x25
105d10: 03a0c000 moveq ip, #0
105d14: 13a0c001 movne ip, #1
105d18: 0a000006 beq 105d38 <vsscanf+0xb4>
if (*fmt++ != *str++)
105d1c: e5d01000 ldrb r1, [r0]
105d20: e1510002 cmp r1, r2
105d24: 0a000088 beq 105f4c <vsscanf+0x2c8>
if (!next)
break;
str = next;
}
return num;
}
105d28: e1a00006 mov r0, r6
105d2c: e28dd014 add sp, sp, #20
105d30: e8bd4ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, lr}
105d34: e12fff1e bx lr
if (*fmt++ != *str++)
break;
continue;
}
if (!*fmt)
105d38: e3520000 cmp r2, #0
105d3c: 0afffff9 beq 105d28 <vsscanf+0xa4>
++fmt;
/* skip this conversion.
* advance both strings to next white space
*/
if (*fmt == '*') {
105d40: e5d42001 ldrb r2, [r4, #1]
105d44: e352002a cmp r2, #42 ; 0x2a
continue;
}
if (!*fmt)
break;
++fmt;
105d48: e284a001 add sl, r4, #1
/* skip this conversion.
* advance both strings to next white space
*/
if (*fmt == '*') {
105d4c: 0a000081 beq 105f58 <vsscanf+0x2d4>
continue;
}
/* get field width */
field_width = -1;
if (isdigit(*fmt))
105d50: e7d51002 ldrb r1, [r5, r2]
105d54: e3110004 tst r1, #4
str++;
continue;
}
/* get field width */
field_width = -1;
105d58: 03e0c000 mvneq ip, #0
if (isdigit(*fmt))
105d5c: 0a000008 beq 105d84 <vsscanf+0x100>
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
105d60: e2844002 add r4, r4, #2
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
i = i*10 + *((*s)++) - '0';
105d64: e2421030 sub r1, r2, #48 ; 0x30
105d68: e1a0a004 mov sl, r4
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
105d6c: e4d42001 ldrb r2, [r4], #1
105d70: e7d59002 ldrb r9, [r5, r2]
i = i*10 + *((*s)++) - '0';
105d74: e08cc10c add ip, ip, ip, lsl #2
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
105d78: e3190004 tst r9, #4
i = i*10 + *((*s)++) - '0';
105d7c: e081c08c add ip, r1, ip, lsl #1
static int skip_atoi(const char **s)
{
int i=0;
while (isdigit(**s))
105d80: 1afffff7 bne 105d64 <vsscanf+0xe0>
if (isdigit(*fmt))
field_width = skip_atoi(&fmt);
/* get conversion qualifier */
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
105d84: e3520068 cmp r2, #104 ; 0x68
105d88: 1352006c cmpne r2, #108 ; 0x6c
105d8c: 0a000064 beq 105f24 <vsscanf+0x2a0>
105d90: e352005a cmp r2, #90 ; 0x5a
105d94: 0a000062 beq 105f24 <vsscanf+0x2a0>
105d98: e352007a cmp r2, #122 ; 0x7a
105d9c: 0a000060 beq 105f24 <vsscanf+0x2a0>
105da0: e352004c cmp r2, #76 ; 0x4c
field_width = -1;
if (isdigit(*fmt))
field_width = skip_atoi(&fmt);
/* get conversion qualifier */
qualifier = -1;
105da4: 13e09000 mvnne r9, #0
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
105da8: 0a00005d beq 105f24 <vsscanf+0x2a0>
}
}
base = 10;
is_sign = 0;
if (!*fmt || !*str)
105dac: e3520000 cmp r2, #0
105db0: 0affffdc beq 105d28 <vsscanf+0xa4>
105db4: e5d01000 ldrb r1, [r0]
105db8: e3510000 cmp r1, #0
105dbc: 0affffd9 beq 105d28 <vsscanf+0xa4>
break;
switch(*fmt++) {
105dc0: e2422025 sub r2, r2, #37 ; 0x25
105dc4: e28a4001 add r4, sl, #1
105dc8: e3520053 cmp r2, #83 ; 0x53
105dcc: 979ff102 ldrls pc, [pc, r2, lsl #2]
105dd0: eaffffd4 b 105d28 <vsscanf+0xa4>
105dd4: 00105fcc .word 0x00105fcc
105dd8: 00105d28 .word 0x00105d28
105ddc: 00105d28 .word 0x00105d28
105de0: 00105d28 .word 0x00105d28
105de4: 00105d28 .word 0x00105d28
105de8: 00105d28 .word 0x00105d28
105dec: 00105d28 .word 0x00105d28
105df0: 00105d28 .word 0x00105d28
105df4: 00105d28 .word 0x00105d28
105df8: 00105d28 .word 0x00105d28
105dfc: 00105d28 .word 0x00105d28
105e00: 00105d28 .word 0x00105d28
105e04: 00105d28 .word 0x00105d28
105e08: 00105d28 .word 0x00105d28
105e0c: 00105d28 .word 0x00105d28
105e10: 00105d28 .word 0x00105d28
105e14: 00105d28 .word 0x00105d28
105e18: 00105d28 .word 0x00105d28
105e1c: 00105d28 .word 0x00105d28
105e20: 00105d28 .word 0x00105d28
105e24: 00105d28 .word 0x00105d28
105e28: 00105d28 .word 0x00105d28
105e2c: 00105d28 .word 0x00105d28
105e30: 00105d28 .word 0x00105d28
105e34: 00105d28 .word 0x00105d28
105e38: 00105d28 .word 0x00105d28
105e3c: 00105d28 .word 0x00105d28
105e40: 00105d28 .word 0x00105d28
105e44: 00105d28 .word 0x00105d28
105e48: 00105d28 .word 0x00105d28
105e4c: 00105d28 .word 0x00105d28
105e50: 00105d28 .word 0x00105d28
105e54: 00105d28 .word 0x00105d28
105e58: 00105d28 .word 0x00105d28
105e5c: 00105d28 .word 0x00105d28
105e60: 00105d28 .word 0x00105d28
105e64: 00105d28 .word 0x00105d28
105e68: 00105d28 .word 0x00105d28
105e6c: 00105d28 .word 0x00105d28
105e70: 00105d28 .word 0x00105d28
105e74: 00105d28 .word 0x00105d28
105e78: 00105d28 .word 0x00105d28
105e7c: 00105d28 .word 0x00105d28
105e80: 00105d28 .word 0x00105d28
105e84: 00105d28 .word 0x00105d28
105e88: 00105d28 .word 0x00105d28
105e8c: 00105d28 .word 0x00105d28
105e90: 00105d28 .word 0x00105d28
105e94: 00105d28 .word 0x00105d28
105e98: 00105d28 .word 0x00105d28
105e9c: 00105d28 .word 0x00105d28
105ea0: 0010615c .word 0x0010615c
105ea4: 00105d28 .word 0x00105d28
105ea8: 00105d28 .word 0x00105d28
105eac: 00105d28 .word 0x00105d28
105eb0: 00105d28 .word 0x00105d28
105eb4: 00105d28 .word 0x00105d28
105eb8: 00105d28 .word 0x00105d28
105ebc: 00105d28 .word 0x00105d28
105ec0: 00105d28 .word 0x00105d28
105ec4: 00105d28 .word 0x00105d28
105ec8: 00105d28 .word 0x00105d28
105ecc: 0010616c .word 0x0010616c
105ed0: 00105fe0 .word 0x00105fe0
105ed4: 00105d28 .word 0x00105d28
105ed8: 00105d28 .word 0x00105d28
105edc: 00105d28 .word 0x00105d28
105ee0: 00105d28 .word 0x00105d28
105ee4: 0010614c .word 0x0010614c
105ee8: 00105d28 .word 0x00105d28
105eec: 00105d28 .word 0x00105d28
105ef0: 00105d28 .word 0x00105d28
105ef4: 00105d28 .word 0x00105d28
105ef8: 001061dc .word 0x001061dc
105efc: 001062e8 .word 0x001062e8
105f00: 00105d28 .word 0x00105d28
105f04: 00105d28 .word 0x00105d28
105f08: 00105d28 .word 0x00105d28
105f0c: 001061f4 .word 0x001061f4
105f10: 00105d28 .word 0x00105d28
105f14: 001062d8 .word 0x001062d8
105f18: 00105d28 .word 0x00105d28
105f1c: 00105d28 .word 0x00105d28
105f20: 0010615c .word 0x0010615c
/* get conversion qualifier */
qualifier = -1;
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt == 'Z' || *fmt == 'z') {
qualifier = *fmt++;
105f24: e1a09002 mov r9, r2
if (qualifier == *fmt) {
105f28: e5fa2001 ldrb r2, [sl, #1]!
105f2c: e1520009 cmp r2, r9
105f30: 1affff9d bne 105dac <vsscanf+0x128>
if (qualifier == 'h') {
105f34: e3520068 cmp r2, #104 ; 0x68
105f38: 0a000154 beq 106490 <vsscanf+0x80c>
qualifier = 'H';
fmt++;
} else if (qualifier == 'l') {
105f3c: e352006c cmp r2, #108 ; 0x6c
qualifier = 'L';
fmt++;
105f40: 05fa2001 ldrbeq r2, [sl, #1]!
if (qualifier == *fmt) {
if (qualifier == 'h') {
qualifier = 'H';
fmt++;
} else if (qualifier == 'l') {
qualifier = 'L';
105f44: 03a0904c moveq r9, #76 ; 0x4c
105f48: eaffff97 b 105dac <vsscanf+0x128>
++str;
}
/* anything that is not a conversion must match exactly */
if (*fmt != '%' && *fmt) {
if (*fmt++ != *str++)
105f4c: e2800001 add r0, r0, #1
105f50: e5f42001 ldrb r2, [r4, #1]!
105f54: eaffff53 b 105ca8 <vsscanf+0x24>
/* skip this conversion.
* advance both strings to next white space
*/
if (*fmt == '*') {
while (!isspace(*fmt) && *fmt)
105f58: e5d5c02a ldrb ip, [r5, #42] ; 0x2a
105f5c: e31c0020 tst ip, #32
105f60: 11a0400a movne r4, sl
105f64: 1a000008 bne 105f8c <vsscanf+0x308>
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
105f68: e2841002 add r1, r4, #2
105f6c: ea000001 b 105f78 <vsscanf+0x2f4>
/* skip this conversion.
* advance both strings to next white space
*/
if (*fmt == '*') {
while (!isspace(*fmt) && *fmt)
105f70: e3520000 cmp r2, #0
105f74: 0a000004 beq 105f8c <vsscanf+0x308>
105f78: e1a04001 mov r4, r1
105f7c: e4d12001 ldrb r2, [r1], #1
105f80: e7d5c002 ldrb ip, [r5, r2]
105f84: e31c0020 tst ip, #32
105f88: 0afffff8 beq 105f70 <vsscanf+0x2ec>
fmt++;
while (!isspace(*str) && *str)
105f8c: e5d01000 ldrb r1, [r0]
105f90: e7d5c001 ldrb ip, [r5, r1]
105f94: e31c0020 tst ip, #32
105f98: 1affff42 bne 105ca8 <vsscanf+0x24>
105f9c: e3510000 cmp r1, #0
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
105fa0: 12801001 addne r1, r0, #1
* advance both strings to next white space
*/
if (*fmt == '*') {
while (!isspace(*fmt) && *fmt)
fmt++;
while (!isspace(*str) && *str)
105fa4: 1a000002 bne 105fb4 <vsscanf+0x330>
105fa8: eaffff3e b 105ca8 <vsscanf+0x24>
105fac: e35c0000 cmp ip, #0
105fb0: 0affff3c beq 105ca8 <vsscanf+0x24>
/* skip this conversion.
* advance both strings to next white space
*/
if (*fmt == '*') {
while (!isspace(*fmt) && *fmt)
105fb4: e1a00001 mov r0, r1
fmt++;
while (!isspace(*str) && *str)
105fb8: e4d1c001 ldrb ip, [r1], #1
105fbc: e7d5a00c ldrb sl, [r5, ip]
105fc0: e31a0020 tst sl, #32
105fc4: 0afffff8 beq 105fac <vsscanf+0x328>
105fc8: eaffff36 b 105ca8 <vsscanf+0x24>
is_sign = 1;
case 'u':
break;
case '%':
/* looking for '%' in str */
if (*str++ != '%')
105fcc: e3510025 cmp r1, #37 ; 0x25
105fd0: 1affff54 bne 105d28 <vsscanf+0xa4>
105fd4: e2800001 add r0, r0, #1
105fd8: e5d42000 ldrb r2, [r4]
105fdc: eaffff31 b 105ca8 <vsscanf+0x24>
is_sign = 0;
if (!*fmt || !*str)
break;
switch(*fmt++) {
105fe0: e3a0b001 mov fp, #1
base = 16;
break;
case 'i':
base = 0;
case 'd':
is_sign = 1;
105fe4: e58db004 str fp, [sp, #4]
qualifier = 'L';
fmt++;
}
}
}
base = 10;
105fe8: e3a0200a mov r2, #10
}
/* have some sort of integer conversion.
* first, skip white space in buffer.
*/
while (isspace(*str))
105fec: e7d5c001 ldrb ip, [r5, r1]
105ff0: e31c0020 tst ip, #32
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
105ff4: 1280c001 addne ip, r0, #1
105ff8: 11a0a006 movne sl, r6
}
/* have some sort of integer conversion.
* first, skip white space in buffer.
*/
while (isspace(*str))
105ffc: 0a000005 beq 106018 <vsscanf+0x394>
is_sign = 1;
case 'u':
break;
case '%':
/* looking for '%' in str */
if (*str++ != '%')
106000: e1a0000c mov r0, ip
}
/* have some sort of integer conversion.
* first, skip white space in buffer.
*/
while (isspace(*str))
106004: e4dc1001 ldrb r1, [ip], #1
106008: e7d56001 ldrb r6, [r5, r1]
10600c: e3160020 tst r6, #32
106010: 1afffffa bne 106000 <vsscanf+0x37c>
106014: e1a0600a mov r6, sl
str++;
digit = *str;
if (is_sign && digit == '-')
106018: e351002d cmp r1, #45 ; 0x2d
10601c: 13a0b000 movne fp, #0
106020: 020bb001 andeq fp, fp, #1
106024: e35b0000 cmp fp, #0
digit = *(str + 1);
106028: 15d01001 ldrbne r1, [r0, #1]
if (!digit
10602c: e3510000 cmp r1, #0
106030: 0affff3c beq 105d28 <vsscanf+0xa4>
|| (base == 16 && !isxdigit(digit))
106034: e3520010 cmp r2, #16
106038: 0a0000f4 beq 106410 <vsscanf+0x78c>
|| (base == 10 && !isdigit(digit))
10603c: e352000a cmp r2, #10
106040: 0a0000ee beq 106400 <vsscanf+0x77c>
|| (base == 8 && (!isdigit(digit) || digit > '7'))
106044: e3520008 cmp r2, #8
106048: 1a0000ea bne 1063f8 <vsscanf+0x774>
10604c: e7d5c001 ldrb ip, [r5, r1]
106050: e31c0004 tst ip, #4
106054: 13a0c000 movne ip, #0
106058: 03a0c001 moveq ip, #1
10605c: e3510037 cmp r1, #55 ; 0x37
106060: 91a0100c movls r1, ip
106064: 838c1001 orrhi r1, ip, #1
106068: e3510000 cmp r1, #0
10606c: 1affff2d bne 105d28 <vsscanf+0xa4>
|| (base == 0 && !isdigit(digit)))
break;
switch(qualifier) {
106070: e249e048 sub lr, r9, #72 ; 0x48
106074: e35e0032 cmp lr, #50 ; 0x32
106078: 979ff10e ldrls pc, [pc, lr, lsl #2]
10607c: ea0000b6 b 10635c <vsscanf+0x6d8>
106080: 001063ac .word 0x001063ac
106084: 0010635c .word 0x0010635c
106088: 0010635c .word 0x0010635c
10608c: 0010635c .word 0x0010635c
106090: 00106384 .word 0x00106384
106094: 0010635c .word 0x0010635c
106098: 0010635c .word 0x0010635c
10609c: 0010635c .word 0x0010635c
1060a0: 0010635c .word 0x0010635c
1060a4: 0010635c .word 0x0010635c
1060a8: 0010635c .word 0x0010635c
1060ac: 0010635c .word 0x0010635c
1060b0: 0010635c .word 0x0010635c
1060b4: 0010635c .word 0x0010635c
1060b8: 0010635c .word 0x0010635c
1060bc: 0010635c .word 0x0010635c
1060c0: 0010635c .word 0x0010635c
1060c4: 0010635c .word 0x0010635c
1060c8: 00106304 .word 0x00106304
1060cc: 0010635c .word 0x0010635c
1060d0: 0010635c .word 0x0010635c
1060d4: 0010635c .word 0x0010635c
1060d8: 0010635c .word 0x0010635c
1060dc: 0010635c .word 0x0010635c
1060e0: 0010635c .word 0x0010635c
1060e4: 0010635c .word 0x0010635c
1060e8: 0010635c .word 0x0010635c
1060ec: 0010635c .word 0x0010635c
1060f0: 0010635c .word 0x0010635c
1060f4: 0010635c .word 0x0010635c
1060f8: 0010635c .word 0x0010635c
1060fc: 0010635c .word 0x0010635c
106100: 00106334 .word 0x00106334
106104: 0010635c .word 0x0010635c
106108: 0010635c .word 0x0010635c
10610c: 0010635c .word 0x0010635c
106110: 001062f8 .word 0x001062f8
106114: 0010635c .word 0x0010635c
106118: 0010635c .word 0x0010635c
10611c: 0010635c .word 0x0010635c
106120: 0010635c .word 0x0010635c
106124: 0010635c .word 0x0010635c
106128: 0010635c .word 0x0010635c
10612c: 0010635c .word 0x0010635c
106130: 0010635c .word 0x0010635c
106134: 0010635c .word 0x0010635c
106138: 0010635c .word 0x0010635c
10613c: 0010635c .word 0x0010635c
106140: 0010635c .word 0x0010635c
106144: 0010635c .word 0x0010635c
106148: 00106304 .word 0x00106304
10614c: e3a0b001 mov fp, #1
base = 16;
break;
case 'i':
base = 0;
case 'd':
is_sign = 1;
106150: e58db004 str fp, [sp, #4]
case 'x':
case 'X':
base = 16;
break;
case 'i':
base = 0;
106154: e3a02000 mov r2, #0
106158: eaffffa3 b 105fec <vsscanf+0x368>
base = 8;
break;
case 'x':
case 'X':
base = 16;
break;
10615c: e3a0b000 mov fp, #0
fmt++;
}
}
}
base = 10;
is_sign = 0;
106160: e58db004 str fp, [sp, #4]
case 'o':
base = 8;
break;
case 'x':
case 'X':
base = 16;
106164: e3a02010 mov r2, #16
break;
106168: eaffff9f b 105fec <vsscanf+0x368>
switch(*fmt++) {
case 'c':
{
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
10616c: e37c0001 cmn ip, #1
106170: 03a0c001 moveq ip, #1
106174: e24c2001 sub r2, ip, #1
106178: e3120001 tst r2, #1
break;
switch(*fmt++) {
case 'c':
{
char *s = (char *) va_arg(args,char*);
10617c: e283a004 add sl, r3, #4
106180: e5939000 ldr r9, [r3]
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
106184: e2803001 add r3, r0, #1
106188: 1a000091 bne 1063d4 <vsscanf+0x750>
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
do {
*s++ = *str++;
} while (--field_width > 0 && *str);
10618c: e24cc001 sub ip, ip, #1
106190: e35c0000 cmp ip, #0
106194: e1a02003 mov r2, r3
{
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
do {
*s++ = *str++;
106198: e4c91001 strb r1, [r9], #1
10619c: e1a00003 mov r0, r3
} while (--field_width > 0 && *str);
1061a0: da000009 ble 1061cc <vsscanf+0x548>
1061a4: e4d21001 ldrb r1, [r2], #1
1061a8: e3510000 cmp r1, #0
1061ac: 0a000006 beq 1061cc <vsscanf+0x548>
{
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
do {
*s++ = *str++;
1061b0: e4c91001 strb r1, [r9], #1
} while (--field_width > 0 && *str);
1061b4: e5d31001 ldrb r1, [r3, #1]
1061b8: e3510000 cmp r1, #0
{
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
do {
*s++ = *str++;
1061bc: e1a00002 mov r0, r2
} while (--field_width > 0 && *str);
1061c0: e24cc001 sub ip, ip, #1
1061c4: e2823001 add r3, r2, #1
1061c8: 1affffef bne 10618c <vsscanf+0x508>
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
*s++ = *str++;
}
*s = '\0';
num++;
1061cc: e2866001 add r6, r6, #1
1061d0: e5d42000 ldrb r2, [r4]
num++;
}
continue;
case 's':
{
char *s = (char *) va_arg(args, char *);
1061d4: e1a0300a mov r3, sl
*s++ = *str++;
}
*s = '\0';
num++;
}
continue;
1061d8: eafffeb2 b 105ca8 <vsscanf+0x24>
case 'n':
/* return number of characters read so far */
{
int *i = (int *)va_arg(args,int*);
*i = str - buf;
1061dc: e5932000 ldr r2, [r3]
1061e0: e0671000 rsb r1, r7, r0
1061e4: e5821000 str r1, [r2]
}
continue;
case 'n':
/* return number of characters read so far */
{
int *i = (int *)va_arg(args,int*);
1061e8: e2833004 add r3, r3, #4
*i = str - buf;
1061ec: e5da2001 ldrb r2, [sl, #1]
}
continue;
1061f0: eafffeac b 105ca8 <vsscanf+0x24>
{
char *s = (char *) va_arg(args, char *);
if(field_width == -1)
field_width = INT_MAX;
/* first, skip leading white space in buffer */
while (isspace(*str))
1061f4: e7d5a001 ldrb sl, [r5, r1]
continue;
case 's':
{
char *s = (char *) va_arg(args, char *);
if(field_width == -1)
field_width = INT_MAX;
1061f8: e37c0001 cmn ip, #1
1061fc: 03e0c102 mvneq ip, #-2147483648 ; 0x80000000
/* first, skip leading white space in buffer */
while (isspace(*str))
106200: e31a0020 tst sl, #32
num++;
}
continue;
case 's':
{
char *s = (char *) va_arg(args, char *);
106204: e283a004 add sl, r3, #4
106208: e5933000 ldr r3, [r3]
if(field_width == -1)
field_width = INT_MAX;
/* first, skip leading white space in buffer */
while (isspace(*str))
10620c: 0a000008 beq 106234 <vsscanf+0x5b0>
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
106210: e2802001 add r2, r0, #1
{
char *s = (char *) va_arg(args, char *);
if(field_width == -1)
field_width = INT_MAX;
/* first, skip leading white space in buffer */
while (isspace(*str))
106214: e5d21000 ldrb r1, [r2]
106218: e1a00002 mov r0, r2
10621c: e7d52001 ldrb r2, [r5, r1]
106220: e3120020 tst r2, #32
106224: e2802001 add r2, r0, #1
106228: 1afffff9 bne 106214 <vsscanf+0x590>
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
10622c: e3510000 cmp r1, #0
106230: 0a000025 beq 1062cc <vsscanf+0x648>
106234: e35c0000 cmp ip, #0
106238: 0a000023 beq 1062cc <vsscanf+0x648>
* vsscanf - Unformat a buffer into a list of arguments
* @buf: input buffer
* @fmt: format of buffer
* @args: arguments
*/
int vsscanf(const char * buf, const char * fmt, va_list args)
10623c: e083c00c add ip, r3, ip
106240: e1e09003 mvn r9, r3
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
*s++ = *str++;
106244: e4c31001 strb r1, [r3], #1
/* first, skip leading white space in buffer */
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
106248: e1a01000 mov r1, r0
10624c: e5f12001 ldrb r2, [r1, #1]!
106250: e08c9009 add r9, ip, r9
106254: e3520000 cmp r2, #0
106258: e209b001 and fp, r9, #1
*s++ = *str++;
10625c: e2800001 add r0, r0, #1
/* first, skip leading white space in buffer */
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
106260: 0a000019 beq 1062cc <vsscanf+0x648>
106264: e7d59002 ldrb r9, [r5, r2]
106268: e3190020 tst r9, #32
10626c: 1a000016 bne 1062cc <vsscanf+0x648>
106270: e153000c cmp r3, ip
106274: 0a000014 beq 1062cc <vsscanf+0x648>
106278: e35b0000 cmp fp, #0
10627c: 0a000005 beq 106298 <vsscanf+0x614>
106280: ea00000c b 1062b8 <vsscanf+0x634>
106284: e7d59002 ldrb r9, [r5, r2]
106288: e3190020 tst r9, #32
10628c: 1a00000e bne 1062cc <vsscanf+0x648>
106290: e153000c cmp r3, ip
106294: 0a00000c beq 1062cc <vsscanf+0x648>
*s++ = *str++;
106298: e4c32001 strb r2, [r3], #1
/* first, skip leading white space in buffer */
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
10629c: e5f12001 ldrb r2, [r1, #1]!
1062a0: e3520000 cmp r2, #0
*s++ = *str++;
1062a4: e2800001 add r0, r0, #1
/* first, skip leading white space in buffer */
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
1062a8: 0a000007 beq 1062cc <vsscanf+0x648>
1062ac: e7d59002 ldrb r9, [r5, r2]
1062b0: e3190020 tst r9, #32
1062b4: 1a000004 bne 1062cc <vsscanf+0x648>
*s++ = *str++;
1062b8: e4c32001 strb r2, [r3], #1
/* first, skip leading white space in buffer */
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
1062bc: e5f12001 ldrb r2, [r1, #1]!
1062c0: e3520000 cmp r2, #0
*s++ = *str++;
1062c4: e2800001 add r0, r0, #1
/* first, skip leading white space in buffer */
while (isspace(*str))
str++;
/* now copy until next white space */
while (*str && !isspace(*str) && field_width--) {
1062c8: 1affffed bne 106284 <vsscanf+0x600>
*s++ = *str++;
}
*s = '\0';
1062cc: e3a0c000 mov ip, #0
1062d0: e5c3c000 strb ip, [r3]
1062d4: eaffffbc b 1061cc <vsscanf+0x548>
is_sign = 0;
if (!*fmt || !*str)
break;
switch(*fmt++) {
1062d8: e3a0b000 mov fp, #0
fmt++;
}
}
}
base = 10;
is_sign = 0;
1062dc: e58db004 str fp, [sp, #4]
qualifier = 'L';
fmt++;
}
}
}
base = 10;
1062e0: e3a0200a mov r2, #10
1062e4: eaffff40 b 105fec <vsscanf+0x368>
*i = str - buf;
}
continue;
case 'o':
base = 8;
break;
1062e8: e3a0b000 mov fp, #0
fmt++;
}
}
}
base = 10;
is_sign = 0;
1062ec: e58db004 str fp, [sp, #4]
int *i = (int *)va_arg(args,int*);
*i = str - buf;
}
continue;
case 'o':
base = 8;
1062f0: e3a02008 mov r2, #8
break;
1062f4: eaffff3c b 105fec <vsscanf+0x368>
unsigned short *s = (unsigned short *) va_arg(args, unsigned short *);
*s = (unsigned short) simple_strtoul(str, &next, base);
}
break;
case 'l':
if (is_sign) {
1062f8: e59dc004 ldr ip, [sp, #4]
1062fc: e35c0000 cmp ip, #0
106300: 1a000018 bne 106368 <vsscanf+0x6e4>
break;
case 'Z':
case 'z':
{
size_t *s = (size_t*) va_arg(args,size_t*);
*s = (size_t) simple_strtoul(str,&next,base);
106304: e28d100c add r1, sp, #12
}
break;
case 'Z':
case 'z':
{
size_t *s = (size_t*) va_arg(args,size_t*);
106308: e5939000 ldr r9, [r3]
10630c: e283a004 add sl, r3, #4
*s = (size_t) simple_strtoul(str,&next,base);
106310: ebfffb32 bl 104fe0 <simple_strtoul>
106314: e5890000 str r0, [r9]
}
break;
case 'Z':
case 'z':
{
size_t *s = (size_t*) va_arg(args,size_t*);
106318: e1a0300a mov r3, sl
}
break;
}
num++;
if (!next)
10631c: e59d000c ldr r0, [sp, #12]
106320: e3500000 cmp r0, #0
unsigned int *i = (unsigned int*) va_arg(args, unsigned int*);
*i = (unsigned int) simple_strtoul(str,&next,base);
}
break;
}
num++;
106324: e2866001 add r6, r6, #1
if (!next)
106328: 0afffe7e beq 105d28 <vsscanf+0xa4>
10632c: e5d42000 ldrb r2, [r4]
106330: eafffe5c b 105ca8 <vsscanf+0x24>
unsigned char *s = (unsigned char *) va_arg(args, unsigned char *);
*s = (unsigned char) simple_strtoul(str, &next, base);
}
break;
case 'h':
if (is_sign) {
106334: e59d9004 ldr r9, [sp, #4]
106338: e3590000 cmp r9, #0
10633c: 0a00004c beq 106474 <vsscanf+0x7f0>
short *s = (short *) va_arg(args,short *);
*s = (short) simple_strtol(str,&next,base);
106340: e28d100c add r1, sp, #12
*s = (unsigned char) simple_strtoul(str, &next, base);
}
break;
case 'h':
if (is_sign) {
short *s = (short *) va_arg(args,short *);
106344: e5939000 ldr r9, [r3]
106348: e283a004 add sl, r3, #4
*s = (short) simple_strtol(str,&next,base);
10634c: ebfffb7b bl 105140 <simple_strtol>
*s = (unsigned char) simple_strtoul(str, &next, base);
}
break;
case 'h':
if (is_sign) {
short *s = (short *) va_arg(args,short *);
106350: e1a0300a mov r3, sl
*s = (short) simple_strtol(str,&next,base);
106354: e1c900b0 strh r0, [r9]
106358: eaffffef b 10631c <vsscanf+0x698>
size_t *s = (size_t*) va_arg(args,size_t*);
*s = (size_t) simple_strtoul(str,&next,base);
}
break;
default:
if (is_sign) {
10635c: e59de004 ldr lr, [sp, #4]
106360: e35e0000 cmp lr, #0
106364: 0a00003b beq 106458 <vsscanf+0x7d4>
int *i = (int *) va_arg(args, int*);
*i = (int) simple_strtol(str,&next,base);
106368: e28d100c add r1, sp, #12
*s = (size_t) simple_strtoul(str,&next,base);
}
break;
default:
if (is_sign) {
int *i = (int *) va_arg(args, int*);
10636c: e5939000 ldr r9, [r3]
106370: e283a004 add sl, r3, #4
*i = (int) simple_strtol(str,&next,base);
106374: ebfffb71 bl 105140 <simple_strtol>
*s = (size_t) simple_strtoul(str,&next,base);
}
break;
default:
if (is_sign) {
int *i = (int *) va_arg(args, int*);
106378: e1a0300a mov r3, sl
*i = (int) simple_strtol(str,&next,base);
10637c: e5890000 str r0, [r9]
106380: eaffffe5 b 10631c <vsscanf+0x698>
unsigned long *l = (unsigned long*) va_arg(args,unsigned long*);
*l = simple_strtoul(str,&next,base);
}
break;
case 'L':
if (is_sign) {
106384: e59d1004 ldr r1, [sp, #4]
106388: e3510000 cmp r1, #0
10638c: 0a00002a beq 10643c <vsscanf+0x7b8>
long long *l = (long long*) va_arg(args,long long *);
*l = simple_strtoll(str,&next,base);
106390: e28d100c add r1, sp, #12
*l = simple_strtoul(str,&next,base);
}
break;
case 'L':
if (is_sign) {
long long *l = (long long*) va_arg(args,long long *);
106394: e5939000 ldr r9, [r3]
106398: e283a004 add sl, r3, #4
*l = simple_strtoll(str,&next,base);
10639c: ebfffbdd bl 105318 <simple_strtoll>
*l = simple_strtoul(str,&next,base);
}
break;
case 'L':
if (is_sign) {
long long *l = (long long*) va_arg(args,long long *);
1063a0: e1a0300a mov r3, sl
*l = simple_strtoll(str,&next,base);
1063a4: e8890003 stm r9, {r0, r1}
1063a8: eaffffdb b 10631c <vsscanf+0x698>
|| (base == 0 && !isdigit(digit)))
break;
switch(qualifier) {
case 'H': /* that's 'hh' in format */
if (is_sign) {
1063ac: e59da004 ldr sl, [sp, #4]
1063b0: e35a0000 cmp sl, #0
1063b4: 0a000019 beq 106420 <vsscanf+0x79c>
signed char *s = (signed char *) va_arg(args,signed char *);
*s = (signed char) simple_strtol(str,&next,base);
1063b8: e28d100c add r1, sp, #12
break;
switch(qualifier) {
case 'H': /* that's 'hh' in format */
if (is_sign) {
signed char *s = (signed char *) va_arg(args,signed char *);
1063bc: e5939000 ldr r9, [r3]
1063c0: e283a004 add sl, r3, #4
*s = (signed char) simple_strtol(str,&next,base);
1063c4: ebfffb5d bl 105140 <simple_strtol>
break;
switch(qualifier) {
case 'H': /* that's 'hh' in format */
if (is_sign) {
signed char *s = (signed char *) va_arg(args,signed char *);
1063c8: e1a0300a mov r3, sl
*s = (signed char) simple_strtol(str,&next,base);
1063cc: e5c90000 strb r0, [r9]
1063d0: eaffffd1 b 10631c <vsscanf+0x698>
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
do {
*s++ = *str++;
} while (--field_width > 0 && *str);
1063d4: e252c000 subs ip, r2, #0
{
char *s = (char *) va_arg(args,char*);
if (field_width == -1)
field_width = 1;
do {
*s++ = *str++;
1063d8: e4c91001 strb r1, [r9], #1
1063dc: e1a00003 mov r0, r3
} while (--field_width > 0 && *str);
1063e0: daffff79 ble 1061cc <vsscanf+0x548>
1063e4: e5d31000 ldrb r1, [r3]
1063e8: e3510000 cmp r1, #0
1063ec: e2833001 add r3, r3, #1
1063f0: 1affff65 bne 10618c <vsscanf+0x508>
1063f4: eaffff74 b 1061cc <vsscanf+0x548>
if (!digit
|| (base == 16 && !isxdigit(digit))
|| (base == 10 && !isdigit(digit))
|| (base == 8 && (!isdigit(digit) || digit > '7'))
|| (base == 0 && !isdigit(digit)))
1063f8: e3520000 cmp r2, #0
1063fc: 1affff1b bne 106070 <vsscanf+0x3ec>
106400: e7d51001 ldrb r1, [r5, r1]
106404: e3110004 tst r1, #4
106408: 1affff18 bne 106070 <vsscanf+0x3ec>
10640c: eafffe45 b 105d28 <vsscanf+0xa4>
digit = *str;
if (is_sign && digit == '-')
digit = *(str + 1);
if (!digit
|| (base == 16 && !isxdigit(digit))
106410: e7d5c001 ldrb ip, [r5, r1]
106414: e31c0044 tst ip, #68 ; 0x44
106418: 1affff14 bne 106070 <vsscanf+0x3ec>
10641c: eafffe41 b 105d28 <vsscanf+0xa4>
if (is_sign) {
signed char *s = (signed char *) va_arg(args,signed char *);
*s = (signed char) simple_strtol(str,&next,base);
} else {
unsigned char *s = (unsigned char *) va_arg(args, unsigned char *);
*s = (unsigned char) simple_strtoul(str, &next, base);
106420: e28d100c add r1, sp, #12
case 'H': /* that's 'hh' in format */
if (is_sign) {
signed char *s = (signed char *) va_arg(args,signed char *);
*s = (signed char) simple_strtol(str,&next,base);
} else {
unsigned char *s = (unsigned char *) va_arg(args, unsigned char *);
106424: e5939000 ldr r9, [r3]
106428: e283a004 add sl, r3, #4
*s = (unsigned char) simple_strtoul(str, &next, base);
10642c: ebfffaeb bl 104fe0 <simple_strtoul>
case 'H': /* that's 'hh' in format */
if (is_sign) {
signed char *s = (signed char *) va_arg(args,signed char *);
*s = (signed char) simple_strtol(str,&next,base);
} else {
unsigned char *s = (unsigned char *) va_arg(args, unsigned char *);
106430: e1a0300a mov r3, sl
*s = (unsigned char) simple_strtoul(str, &next, base);
106434: e5c90000 strb r0, [r9]
106438: eaffffb7 b 10631c <vsscanf+0x698>
if (is_sign) {
long long *l = (long long*) va_arg(args,long long *);
*l = simple_strtoll(str,&next,base);
} else {
unsigned long long *l = (unsigned long long*) va_arg(args,unsigned long long*);
*l = simple_strtoull(str,&next,base);
10643c: e28d100c add r1, sp, #12
case 'L':
if (is_sign) {
long long *l = (long long*) va_arg(args,long long *);
*l = simple_strtoll(str,&next,base);
} else {
unsigned long long *l = (unsigned long long*) va_arg(args,unsigned long long*);
106440: e5939000 ldr r9, [r3]
106444: e283a004 add sl, r3, #4
*l = simple_strtoull(str,&next,base);
106448: ebfffb47 bl 10516c <simple_strtoull>
case 'L':
if (is_sign) {
long long *l = (long long*) va_arg(args,long long *);
*l = simple_strtoll(str,&next,base);
} else {
unsigned long long *l = (unsigned long long*) va_arg(args,unsigned long long*);
10644c: e1a0300a mov r3, sl
*l = simple_strtoull(str,&next,base);
106450: e8890003 stm r9, {r0, r1}
106454: eaffffb0 b 10631c <vsscanf+0x698>
if (is_sign) {
int *i = (int *) va_arg(args, int*);
*i = (int) simple_strtol(str,&next,base);
} else {
unsigned int *i = (unsigned int*) va_arg(args, unsigned int*);
*i = (unsigned int) simple_strtoul(str,&next,base);
106458: e28d100c add r1, sp, #12
default:
if (is_sign) {
int *i = (int *) va_arg(args, int*);
*i = (int) simple_strtol(str,&next,base);
} else {
unsigned int *i = (unsigned int*) va_arg(args, unsigned int*);
10645c: e5939000 ldr r9, [r3]
106460: e283a004 add sl, r3, #4
*i = (unsigned int) simple_strtoul(str,&next,base);
106464: ebfffadd bl 104fe0 <simple_strtoul>
default:
if (is_sign) {
int *i = (int *) va_arg(args, int*);
*i = (int) simple_strtol(str,&next,base);
} else {
unsigned int *i = (unsigned int*) va_arg(args, unsigned int*);
106468: e1a0300a mov r3, sl
*i = (unsigned int) simple_strtoul(str,&next,base);
10646c: e5890000 str r0, [r9]
106470: eaffffa9 b 10631c <vsscanf+0x698>
if (is_sign) {
short *s = (short *) va_arg(args,short *);
*s = (short) simple_strtol(str,&next,base);
} else {
unsigned short *s = (unsigned short *) va_arg(args, unsigned short *);
*s = (unsigned short) simple_strtoul(str, &next, base);
106474: e28d100c add r1, sp, #12
case 'h':
if (is_sign) {
short *s = (short *) va_arg(args,short *);
*s = (short) simple_strtol(str,&next,base);
} else {
unsigned short *s = (unsigned short *) va_arg(args, unsigned short *);
106478: e5939000 ldr r9, [r3]
10647c: e283a004 add sl, r3, #4
*s = (unsigned short) simple_strtoul(str, &next, base);
106480: ebfffad6 bl 104fe0 <simple_strtoul>
case 'h':
if (is_sign) {
short *s = (short *) va_arg(args,short *);
*s = (short) simple_strtol(str,&next,base);
} else {
unsigned short *s = (unsigned short *) va_arg(args, unsigned short *);
106484: e1a0300a mov r3, sl
*s = (unsigned short) simple_strtoul(str, &next, base);
106488: e1c900b0 strh r0, [r9]
10648c: eaffffa2 b 10631c <vsscanf+0x698>
*fmt == 'Z' || *fmt == 'z') {
qualifier = *fmt++;
if (qualifier == *fmt) {
if (qualifier == 'h') {
qualifier = 'H';
fmt++;
106490: e5fa2001 ldrb r2, [sl, #1]!
if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
*fmt == 'Z' || *fmt == 'z') {
qualifier = *fmt++;
if (qualifier == *fmt) {
if (qualifier == 'h') {
qualifier = 'H';
106494: e3a09048 mov r9, #72 ; 0x48
106498: eafffe43 b 105dac <vsscanf+0x128>
10649c: 0020020c .word 0x0020020c
001064a0 <sscanf>:
* @buf: input buffer
* @fmt: formatting of buffer
* @...: resulting arguments
*/
int sscanf(const char * buf, const char * fmt, ...)
{
1064a0: e92d000e push {r1, r2, r3}
1064a4: e52de004 push {lr} ; (str lr, [sp, #-4]!)
1064a8: e24dd008 sub sp, sp, #8
va_list args;
int i;
va_start(args,fmt);
1064ac: e28d3010 add r3, sp, #16
i = vsscanf(buf,fmt,args);
1064b0: e59d100c ldr r1, [sp, #12]
1064b4: e1a02003 mov r2, r3
int sscanf(const char * buf, const char * fmt, ...)
{
va_list args;
int i;
va_start(args,fmt);
1064b8: e58d3004 str r3, [sp, #4]
i = vsscanf(buf,fmt,args);
1064bc: ebfffdf0 bl 105c84 <vsscanf>
va_end(args);
return i;
}
1064c0: e28dd008 add sp, sp, #8
1064c4: e49de004 pop {lr} ; (ldr lr, [sp], #4)
1064c8: e28dd00c add sp, sp, #12
1064cc: e12fff1e bx lr
001064d0 <strnlen>:
*/
size_t strnlen(const char *s, size_t count)
{
const char *sc;
for (sc = s; count-- && *sc != '\0'; ++sc)
1064d0: e3510000 cmp r1, #0
* strnlen - Find the length of a length-limited string
* @s: The string to be sized
* @count: The maximum number of bytes to search
*/
size_t strnlen(const char *s, size_t count)
{
1064d4: e52d4004 push {r4} ; (str r4, [sp, #-4]!)
const char *sc;
for (sc = s; count-- && *sc != '\0'; ++sc)
1064d8: 01a00001 moveq r0, r1
1064dc: 0a00000d beq 106518 <strnlen+0x48>
1064e0: e5d03000 ldrb r3, [r0]
1064e4: e3530000 cmp r3, #0
1064e8: 01a00003 moveq r0, r3
1064ec: 0a000009 beq 106518 <strnlen+0x48>
char *_EXFUN(_strndup_r,(struct _reent *, const char *, size_t));
char *_EXFUN(strerror_r,(int, char *, size_t));
size_t _EXFUN(strlcat,(char *, const char *, size_t));
size_t _EXFUN(strlcpy,(char *, const char *, size_t));
int _EXFUN(strncasecmp,(const char *, const char *, size_t));
size_t _EXFUN(strnlen,(const char *, size_t));
1064f0: e2803001 add r3, r0, #1
1064f4: e0801001 add r1, r0, r1
1064f8: e0632001 rsb r2, r3, r1
1064fc: e3120001 tst r2, #1
106500: 0a00000e beq 106540 <strnlen+0x70>
106504: e1a0c003 mov ip, r3
106508: e4d32001 ldrb r2, [r3], #1
10650c: e3520000 cmp r2, #0
106510: 1a00000a bne 106540 <strnlen+0x70>
106514: e060000c rsb r0, r0, ip
/* nothing */;
return sc - s;
}
106518: e49d4004 pop {r4} ; (ldr r4, [sp], #4)
10651c: e12fff1e bx lr
*/
size_t strnlen(const char *s, size_t count)
{
const char *sc;
for (sc = s; count-- && *sc != '\0'; ++sc)
106520: e4d24001 ldrb r4, [r2], #1
106524: e3540000 cmp r4, #0
106528: 0afffff9 beq 106514 <strnlen+0x44>
10652c: e5d34001 ldrb r4, [r3, #1]
106530: e3540000 cmp r4, #0
106534: e1a0c002 mov ip, r2
106538: e2823001 add r3, r2, #1
10653c: 0afffff4 beq 106514 <strnlen+0x44>
106540: e1530001 cmp r3, r1
106544: e1a02003 mov r2, r3
106548: e1a0c003 mov ip, r3
10654c: 1afffff3 bne 106520 <strnlen+0x50>
106550: e0600003 rsb r0, r0, r3
106554: eaffffef b 106518 <strnlen+0x48>
00106558 <udp_ep0_send_data>:
.state_pending = RCTX_STATE_UDP_EP3_PENDING },
};
/* Send Data through the control endpoint */
static void udp_ep0_send_data(const char *pData, u_int32_t length)
{
106558: e92d41f0 push {r4, r5, r6, r7, r8, lr}
10655c: e1a04000 mov r4, r0
106560: e24dd008 sub sp, sp, #8
AT91PS_UDP pUdp = AT91C_BASE_UDP;
u_int32_t cpt = 0;
AT91_REG csr;
DEBUGE("send_data: %u bytes ", length);
106564: e59f0158 ldr r0, [pc, #344] ; 1066c4 <udp_ep0_send_data+0x16c>
.state_pending = RCTX_STATE_UDP_EP3_PENDING },
};
/* Send Data through the control endpoint */
static void udp_ep0_send_data(const char *pData, u_int32_t length)
{
106568: e1a05001 mov r5, r1
AT91PS_UDP pUdp = AT91C_BASE_UDP;
u_int32_t cpt = 0;
AT91_REG csr;
DEBUGE("send_data: %u bytes ", length);
10656c: eb00062a bl 107e1c <debugp>
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
pUdp->UDP_FDR[0] = *pData++;
106570: e59f6150 ldr r6, [pc, #336] ; 1066c8 <udp_ep0_send_data+0x170>
AT91_REG csr;
DEBUGE("send_data: %u bytes ", length);
do {
cpt = MIN(length, 8);
106574: e3550008 cmp r5, #8
106578: 31a08005 movcc r8, r5
10657c: 23a08008 movcs r8, #8
length -= cpt;
DEBUGE("fifo_fill ");
106580: e59f0144 ldr r0, [pc, #324] ; 1066cc <udp_ep0_send_data+0x174>
106584: eb000624 bl 107e1c <debugp>
while (cpt--)
106588: e3580000 cmp r8, #0
10658c: 0a000017 beq 1065f0 <udp_ep0_send_data+0x98>
pUdp->UDP_FDR[0] = *pData++;
106590: e1a03004 mov r3, r4
106594: e4d32001 ldrb r2, [r3], #1
[3] = { .state_busy = RCTX_STATE_UDP_EP3_BUSY,
.state_pending = RCTX_STATE_UDP_EP3_PENDING },
};
/* Send Data through the control endpoint */
static void udp_ep0_send_data(const char *pData, u_int32_t length)
106598: e0841008 add r1, r4, r8
10659c: e1e00004 mvn r0, r4
1065a0: e0814000 add r4, r1, r0
do {
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
1065a4: e1530001 cmp r3, r1
1065a8: e2044001 and r4, r4, #1
pUdp->UDP_FDR[0] = *pData++;
1065ac: e50620af str r2, [r6, #-175] ; 0xffffff51
do {
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
1065b0: 0a00000d beq 1065ec <udp_ep0_send_data+0x94>
1065b4: e3540000 cmp r4, #0
1065b8: 0a000003 beq 1065cc <udp_ep0_send_data+0x74>
pUdp->UDP_FDR[0] = *pData++;
1065bc: e4d34001 ldrb r4, [r3], #1
do {
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
1065c0: e1530001 cmp r3, r1
pUdp->UDP_FDR[0] = *pData++;
1065c4: e50640af str r4, [r6, #-175] ; 0xffffff51
do {
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
1065c8: 0a000007 beq 1065ec <udp_ep0_send_data+0x94>
pUdp->UDP_FDR[0] = *pData++;
1065cc: e1a0c003 mov ip, r3
1065d0: e4dce001 ldrb lr, [ip], #1
1065d4: e506e0af str lr, [r6, #-175] ; 0xffffff51
1065d8: e5d37001 ldrb r7, [r3, #1]
1065dc: e28c3001 add r3, ip, #1
do {
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
1065e0: e1530001 cmp r3, r1
pUdp->UDP_FDR[0] = *pData++;
1065e4: e50670af str r7, [r6, #-175] ; 0xffffff51
do {
cpt = MIN(length, 8);
length -= cpt;
DEBUGE("fifo_fill ");
while (cpt--)
1065e8: 1afffff7 bne 1065cc <udp_ep0_send_data+0x74>
1065ec: e1a04001 mov r4, r1
pUdp->UDP_FDR[0] = *pData++;
if (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) {
1065f0: e51630cf ldr r3, [r6, #-207] ; 0xffffff31
1065f4: e3130001 tst r3, #1
1065f8: 1a000028 bne 1066a0 <udp_ep0_send_data+0x148>
DEBUGE("wait_txcomp_clear ");
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);
while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) ;
}
DEBUGE("set_txpktrdy ");
1065fc: e59f00cc ldr r0, [pc, #204] ; 1066d0 <udp_ep0_send_data+0x178>
106600: eb000605 bl 107e1c <debugp>
pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;
106604: e516c0cf ldr ip, [r6, #-207] ; 0xffffff31
106608: e38c7010 orr r7, ip, #16
DEBUGE("wait_txcomp ");
10660c: e59f00c0 ldr r0, [pc, #192] ; 1066d4 <udp_ep0_send_data+0x17c>
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);
while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) ;
}
DEBUGE("set_txpktrdy ");
pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;
106610: e50670cf str r7, [r6, #-207] ; 0xffffff31
DEBUGE("wait_txcomp ");
106614: eb000600 bl 107e1c <debugp>
106618: ea000002 b 106628 <udp_ep0_send_data+0xd0>
if (csr & AT91C_UDP_RX_DATA_BK0) {
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);
DEBUGE("stopped by status out ");
return;
}
} while (!(csr & AT91C_UDP_TXCOMP));
10661c: e59d0004 ldr r0, [sp, #4]
106620: e3100001 tst r0, #1
106624: 1a00000d bne 106660 <udp_ep0_send_data+0x108>
DEBUGE("set_txpktrdy ");
pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;
DEBUGE("wait_txcomp ");
do {
csr = pUdp->UDP_CSR[0];
106628: e51630cf ldr r3, [r6, #-207] ; 0xffffff31
10662c: e58d3004 str r3, [sp, #4]
/* Data IN stage has been stopped by a status OUT */
if (csr & AT91C_UDP_RX_DATA_BK0) {
106630: e59de004 ldr lr, [sp, #4]
106634: e31e0002 tst lr, #2
DEBUGE("set_txpktrdy ");
pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;
DEBUGE("wait_txcomp ");
do {
csr = pUdp->UDP_CSR[0];
106638: e59f7088 ldr r7, [pc, #136] ; 1066c8 <udp_ep0_send_data+0x170>
/* Data IN stage has been stopped by a status OUT */
if (csr & AT91C_UDP_RX_DATA_BK0) {
10663c: 0afffff6 beq 10661c <udp_ep0_send_data+0xc4>
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);
106640: e51720cf ldr r2, [r7, #-207] ; 0xffffff31
106644: e3c21002 bic r1, r2, #2
DEBUGE("stopped by status out ");
106648: e59f0088 ldr r0, [pc, #136] ; 1066d8 <udp_ep0_send_data+0x180>
do {
csr = pUdp->UDP_CSR[0];
/* Data IN stage has been stopped by a status OUT */
if (csr & AT91C_UDP_RX_DATA_BK0) {
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);
10664c: e50710cf str r1, [r7, #-207] ; 0xffffff31
DEBUGE("stopped by status out ");
106650: eb0005f1 bl 107e1c <debugp>
if (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) {
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);
while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) ;
}
DEBUGE("done ");
}
106654: e28dd008 add sp, sp, #8
106658: e8bd41f0 pop {r4, r5, r6, r7, r8, lr}
10665c: e12fff1e bx lr
DEBUGE("stopped by status out ");
return;
}
} while (!(csr & AT91C_UDP_TXCOMP));
} while (length);
106660: e0555008 subs r5, r5, r8
106664: 1affffc2 bne 106574 <udp_ep0_send_data+0x1c>
DEBUGE("clear_txcomp ");
106668: e59f006c ldr r0, [pc, #108] ; 1066dc <udp_ep0_send_data+0x184>
10666c: eb0005ea bl 107e1c <debugp>
if (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) {
106670: e517c0cf ldr ip, [r7, #-207] ; 0xffffff31
106674: e31c0001 tst ip, #1
106678: 0a000005 beq 106694 <udp_ep0_send_data+0x13c>
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);
10667c: e51730cf ldr r3, [r7, #-207] ; 0xffffff31
106680: e3c3e001 bic lr, r3, #1
106684: e507e0cf str lr, [r7, #-207] ; 0xffffff31
while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) ;
106688: e51710cf ldr r1, [r7, #-207] ; 0xffffff31
10668c: e3110001 tst r1, #1
106690: 1afffffc bne 106688 <udp_ep0_send_data+0x130>
}
DEBUGE("done ");
106694: e59f0044 ldr r0, [pc, #68] ; 1066e0 <udp_ep0_send_data+0x188>
106698: eb0005df bl 107e1c <debugp>
10669c: eaffffec b 106654 <udp_ep0_send_data+0xfc>
DEBUGE("fifo_fill ");
while (cpt--)
pUdp->UDP_FDR[0] = *pData++;
if (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) {
DEBUGE("wait_txcomp_clear ");
1066a0: e59f003c ldr r0, [pc, #60] ; 1066e4 <udp_ep0_send_data+0x18c>
1066a4: eb0005dc bl 107e1c <debugp>
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);
1066a8: e51620cf ldr r2, [r6, #-207] ; 0xffffff31
1066ac: e3c21001 bic r1, r2, #1
1066b0: e50610cf str r1, [r6, #-207] ; 0xffffff31
while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) ;
1066b4: e51600cf ldr r0, [r6, #-207] ; 0xffffff31
1066b8: e3100001 tst r0, #1
1066bc: 1afffffc bne 1066b4 <udp_ep0_send_data+0x15c>
1066c0: eaffffcd b 1065fc <udp_ep0_send_data+0xa4>
1066c4: 0010a67c .word 0x0010a67c
1066c8: fffb00ff .word 0xfffb00ff
1066cc: 0010a694 .word 0x0010a694
1066d0: 0010a6b4 .word 0x0010a6b4
1066d4: 0010a6c4 .word 0x0010a6c4
1066d8: 0010a6d4 .word 0x0010a6d4
1066dc: 0010a6ec .word 0x0010a6ec
1066e0: 0010a6fc .word 0x0010a6fc
1066e4: 0010a6a0 .word 0x0010a6a0
001066e8 <reset_ep>:
}
DEBUGE("done ");
}
static void reset_ep(unsigned int ep)
{
1066e8: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
AT91PS_UDP pUDP = upcd.pUdp;
1066ec: e59f8098 ldr r8, [pc, #152] ; 10678c <reset_ep+0xa4>
struct req_ctx *rctx;
//pUDP->UDP_CSR[ep] = AT91C_UDP_EPEDS;
atomic_set(&upcd.ep[ep].pkts_in_transit, 0);
1066f0: e1a09080 lsl r9, r0, #1
1066f4: e0891000 add r1, r9, r0
1066f8: e59fa090 ldr sl, [pc, #144] ; 106790 <reset_ep+0xa8>
1066fc: e0883101 add r3, r8, r1, lsl #2
106700: e3a02000 mov r2, #0
DEBUGE("done ");
}
static void reset_ep(unsigned int ep)
{
AT91PS_UDP pUDP = upcd.pUdp;
106704: e5987000 ldr r7, [r8]
struct req_ctx *rctx;
//pUDP->UDP_CSR[ep] = AT91C_UDP_EPEDS;
atomic_set(&upcd.ep[ep].pkts_in_transit, 0);
106708: e583200c str r2, [r3, #12]
10670c: e79a5180 ldr r5, [sl, r0, lsl #3]
106710: e59f407c ldr r4, [pc, #124] ; 106794 <reset_ep+0xac>
}
DEBUGE("done ");
}
static void reset_ep(unsigned int ep)
{
106714: e1a06000 mov r6, r0
//pUDP->UDP_CSR[ep] = AT91C_UDP_EPEDS;
atomic_set(&upcd.ep[ep].pkts_in_transit, 0);
/* free all currently transmitting contexts */
while ((rctx = req_ctx_find_get(0, epstate[ep].state_busy,
106718: e3a00000 mov r0, #0
10671c: e1a01005 mov r1, r5
106720: e3a020fe mov r2, #254 ; 0xfe
106724: e1a0e00f mov lr, pc
106728: e12fff14 bx r4
10672c: e3500000 cmp r0, #0
106730: 1afffff8 bne 106718 <reset_ep+0x30>
106734: e08aa186 add sl, sl, r6, lsl #3
106738: e59a5004 ldr r5, [sl, #4]
RCTX_STATE_FREE))) {}
/* free all currently pending contexts */
while ((rctx = req_ctx_find_get(0, epstate[ep].state_pending,
10673c: e3a00000 mov r0, #0
106740: e1a01005 mov r1, r5
106744: e3a020fe mov r2, #254 ; 0xfe
106748: e1a0e00f mov lr, pc
10674c: e12fff14 bx r4
106750: e3500000 cmp r0, #0
106754: 1afffff8 bne 10673c <reset_ep+0x54>
RCTX_STATE_FREE))) {}
pUDP->UDP_RSTEP |= (1 << ep);
106758: e3a0c001 mov ip, #1
10675c: e1a0e61c lsl lr, ip, r6
106760: e5971028 ldr r1, [r7, #40] ; 0x28
106764: e18e3001 orr r3, lr, r1
106768: e5873028 str r3, [r7, #40] ; 0x28
pUDP->UDP_RSTEP &= ~(1 << ep);
10676c: e5972028 ldr r2, [r7, #40] ; 0x28
upcd.ep[ep].incomplete.rctx = NULL;
106770: e0896006 add r6, r9, r6
/* free all currently pending contexts */
while ((rctx = req_ctx_find_get(0, epstate[ep].state_pending,
RCTX_STATE_FREE))) {}
pUDP->UDP_RSTEP |= (1 << ep);
pUDP->UDP_RSTEP &= ~(1 << ep);
106774: e1c2c00e bic ip, r2, lr
upcd.ep[ep].incomplete.rctx = NULL;
106778: e0888106 add r8, r8, r6, lsl #2
/* free all currently pending contexts */
while ((rctx = req_ctx_find_get(0, epstate[ep].state_pending,
RCTX_STATE_FREE))) {}
pUDP->UDP_RSTEP |= (1 << ep);
pUDP->UDP_RSTEP &= ~(1 << ep);
10677c: e587c028 str ip, [r7, #40] ; 0x28
upcd.ep[ep].incomplete.rctx = NULL;
106780: e5880010 str r0, [r8, #16]
}
106784: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
106788: e12fff1e bx lr
10678c: 0020030c .word 0x0020030c
106790: 0010a600 .word 0x0010a600
106794: 00200080 .word 0x00200080
00106798 <__udp_refill_ep>:
AT91PS_UDP pUDP = upcd.pUdp;
pUDP->UDP_IER = AT91C_UDP_EPINT1;
}
static int __udp_refill_ep(int ep)
{
106798: e92d4ff8 push {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
u_int16_t i;
AT91PS_UDP pUDP = upcd.pUdp;
10679c: e59f41c8 ldr r4, [pc, #456] ; 10696c <__udp_refill_ep+0x1d4>
struct req_ctx *rctx;
unsigned int start, end;
/* If we're not configured by the host yet, there is no point
* in trying to send data to it... */
if (!upcd.cur_config) {
1067a0: e5d43005 ldrb r3, [r4, #5]
1067a4: e3530000 cmp r3, #0
AT91PS_UDP pUDP = upcd.pUdp;
pUDP->UDP_IER = AT91C_UDP_EPINT1;
}
static int __udp_refill_ep(int ep)
{
1067a8: e1a06000 mov r6, r0
u_int16_t i;
AT91PS_UDP pUDP = upcd.pUdp;
1067ac: e5945000 ldr r5, [r4]
unsigned int start, end;
/* If we're not configured by the host yet, there is no point
* in trying to send data to it... */
if (!upcd.cur_config) {
return -ENXIO;
1067b0: 03e00005 mvneq r0, #5
struct req_ctx *rctx;
unsigned int start, end;
/* If we're not configured by the host yet, there is no point
* in trying to send data to it... */
if (!upcd.cur_config) {
1067b4: 1a000001 bne 1067c0 <__udp_refill_ep+0x28>
upcd.ep[ep].incomplete.bytes_sent += end - start;
DEBUGII("RCTX(ep=%u)_tx_cont ", ep);
}
return 1;
}
1067b8: e8bd4ff8 pop {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
1067bc: e12fff1e bx lr
return -ENXIO;
}
/* If there are already two packets in transit, the DPR of
* the SAM7 UDC doesn't have space for more data */
if (atomic_read(&upcd.ep[ep].pkts_in_transit) == 2) {
1067c0: e1a07080 lsl r7, r0, #1
1067c4: e0878000 add r8, r7, r0
1067c8: e0848108 add r8, r4, r8, lsl #2
1067cc: e598100c ldr r1, [r8, #12]
1067d0: e3510002 cmp r1, #2
return -EBUSY;
1067d4: 03e0000f mvneq r0, #15
return -ENXIO;
}
/* If there are already two packets in transit, the DPR of
* the SAM7 UDC doesn't have space for more data */
if (atomic_read(&upcd.ep[ep].pkts_in_transit) == 2) {
1067d8: 0afffff6 beq 1067b8 <__udp_refill_ep+0x20>
return -EBUSY;
}
/* If we have an incompletely-transmitted req_ctx (>EP size),
* we need to transmit the rest and finish the transaction */
if (upcd.ep[ep].incomplete.rctx) {
1067dc: e5980010 ldr r0, [r8, #16]
1067e0: e3500000 cmp r0, #0
1067e4: 0a000051 beq 106930 <__udp_refill_ep+0x198>
rctx = upcd.ep[ep].incomplete.rctx;
start = upcd.ep[ep].incomplete.bytes_sent;
1067e8: e5988014 ldr r8, [r8, #20]
1067ec: e1a09808 lsl r9, r8, #16
1067f0: e1a09829 lsr r9, r9, #16
1067f4: e1a01009 mov r1, r9
start = 0;
upcd.ep[ep].incomplete.bytes_sent = 0;
}
if (rctx->tot_len - start <= AT91C_EP_IN_SIZE)
1067f8: e1d020b6 ldrh r2, [r0, #6]
1067fc: e068a002 rsb sl, r8, r2
106800: e35a0040 cmp sl, #64 ; 0x40
end = rctx->tot_len;
else
end = start + AT91C_EP_IN_SIZE;
106804: 82882040 addhi r2, r8, #64 ; 0x40
106808: 83a0a040 movhi sl, #64 ; 0x40
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
10680c: e1520001 cmp r2, r1
106810: 9a00001e bls 106890 <__udp_refill_ep+0xf8>
106814: e289b001 add fp, r9, #1
106818: e590c008 ldr ip, [r0, #8]
10681c: e1a0380b lsl r3, fp, #16
106820: e1e09009 mvn r9, r9
pUDP->UDP_FDR[ep] = rctx->data[i];
106824: e7dcb001 ldrb fp, [ip, r1]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
106828: e1a03823 lsr r3, r3, #16
10682c: e2861014 add r1, r6, #20
106830: e0899002 add r9, r9, r2
106834: e1520003 cmp r2, r3
106838: e2099001 and r9, r9, #1
pUDP->UDP_FDR[ep] = rctx->data[i];
10683c: e785b101 str fp, [r5, r1, lsl #2]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
106840: 9a000012 bls 106890 <__udp_refill_ep+0xf8>
106844: e3590000 cmp r9, #0
106848: 0a000006 beq 106868 <__udp_refill_ep+0xd0>
10684c: e283b001 add fp, r3, #1
106850: e1a0980b lsl r9, fp, #16
pUDP->UDP_FDR[ep] = rctx->data[i];
106854: e7dcb003 ldrb fp, [ip, r3]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
106858: e1a03829 lsr r3, r9, #16
10685c: e1520003 cmp r2, r3
pUDP->UDP_FDR[ep] = rctx->data[i];
106860: e785b101 str fp, [r5, r1, lsl #2]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
106864: 9a000009 bls 106890 <__udp_refill_ep+0xf8>
pUDP->UDP_FDR[ep] = rctx->data[i];
106868: e7dcb003 ldrb fp, [ip, r3]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
10686c: e2833001 add r3, r3, #1
pUDP->UDP_FDR[ep] = rctx->data[i];
106870: e785b101 str fp, [r5, r1, lsl #2]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
106874: e1a09803 lsl r9, r3, #16
106878: e2893801 add r3, r9, #65536 ; 0x10000
10687c: e1a03823 lsr r3, r3, #16
pUDP->UDP_FDR[ep] = rctx->data[i];
106880: e7dc9829 ldrb r9, [ip, r9, lsr #16]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
106884: e1520003 cmp r2, r3
pUDP->UDP_FDR[ep] = rctx->data[i];
106888: e7859101 str r9, [r5, r1, lsl #2]
end = start + AT91C_EP_IN_SIZE;
/* fill FIFO/DPR */
DEBUGII("RCTX_tx(ep=%u,ctx=%u):%u ", ep, req_ctx_num(rctx),
end - start);
for (i = start; i < end; i++)
10688c: 8afffff5 bhi 106868 <__udp_refill_ep+0xd0>
static inline int atomic_add_return(int i, atomic_t *v)
{
unsigned long flags;
int val;
local_irq_save(flags);
106890: e10fc000 mrs ip, CPSR
106894: e38c3080 orr r3, ip, #128 ; 0x80
106898: e121f003 msr CPSR_c, r3
val = v->counter;
10689c: e0871006 add r1, r7, r6
1068a0: e0841101 add r1, r4, r1, lsl #2
1068a4: e591300c ldr r3, [r1, #12]
v->counter = val += i;
1068a8: e2833001 add r3, r3, #1
1068ac: e581300c str r3, [r1, #12]
local_irq_restore(flags);
1068b0: e121f00c msr CPSR_c, ip
pUDP->UDP_FDR[ep] = rctx->data[i];
if (atomic_inc_return(&upcd.ep[ep].pkts_in_transit) == 1) {
1068b4: e3530001 cmp r3, #1
/* not been transmitting before, start transmit */
pUDP->UDP_CSR[ep] |= AT91C_UDP_TXPKTRDY;
1068b8: 0286300c addeq r3, r6, #12
1068bc: 07951103 ldreq r1, [r5, r3, lsl #2]
1068c0: 03811010 orreq r1, r1, #16
1068c4: 07851103 streq r1, [r5, r3, lsl #2]
}
if ((end - start < AT91C_EP_OUT_SIZE) ||
1068c8: e35a003f cmp sl, #63 ; 0x3f
1068cc: 9a000010 bls 106914 <__udp_refill_ep+0x17c>
1068d0: e252c000 subs ip, r2, #0
1068d4: 13a0c001 movne ip, #1
1068d8: e1520008 cmp r2, r8
1068dc: 13a0c000 movne ip, #0
1068e0: e35c0000 cmp ip, #0
1068e4: 0a000002 beq 1068f4 <__udp_refill_ep+0x15c>
(((end - start) == 0) && end && (rctx->tot_len % AT91C_EP_OUT_SIZE) == 0)) {
1068e8: e1d020b6 ldrh r2, [r0, #6]
1068ec: e312003f tst r2, #63 ; 0x3f
1068f0: 0a000007 beq 106914 <__udp_refill_ep+0x17c>
/* CASE 2: mark transfer as incomplete, if
* - after data of transfer == AT91C_EP_OUT_SIZE
* - after data of transfer > AT91C_EP_OUT_SIZE
* - after last packet of transfer % AT91C_EP_OUT_SIZE == 0
*/
upcd.ep[ep].incomplete.rctx = rctx;
1068f4: e0876006 add r6, r7, r6
1068f8: e0844106 add r4, r4, r6, lsl #2
upcd.ep[ep].incomplete.bytes_sent += end - start;
1068fc: e5943014 ldr r3, [r4, #20]
106900: e08aa003 add sl, sl, r3
/* CASE 2: mark transfer as incomplete, if
* - after data of transfer == AT91C_EP_OUT_SIZE
* - after data of transfer > AT91C_EP_OUT_SIZE
* - after last packet of transfer % AT91C_EP_OUT_SIZE == 0
*/
upcd.ep[ep].incomplete.rctx = rctx;
106904: e5840010 str r0, [r4, #16]
upcd.ep[ep].incomplete.bytes_sent += end - start;
106908: e584a014 str sl, [r4, #20]
DEBUGII("RCTX(ep=%u)_tx_cont ", ep);
}
return 1;
10690c: e3a00001 mov r0, #1
106910: eaffffa8 b 1067b8 <__udp_refill_ep+0x20>
* - after ZLP of transfer == AT91C_EP_OUT_SIZE
* - after ZLP of transfer % AT91C_EP_OUT_SIZE == 0
* - after last packet of transfer % AT91C_EP_OUT_SIZE != 0
*/
DEBUGII("RCTX(ep=%u,ctx=%u)_tx_done ", ep, req_ctx_num(rctx));
upcd.ep[ep].incomplete.rctx = NULL;
106914: e0876006 add r6, r7, r6
106918: e3a0e000 mov lr, #0
10691c: e0844106 add r4, r4, r6, lsl #2
106920: e584e010 str lr, [r4, #16]
req_ctx_put(rctx);
106924: eb000598 bl 107f8c <req_ctx_put>
upcd.ep[ep].incomplete.rctx = rctx;
upcd.ep[ep].incomplete.bytes_sent += end - start;
DEBUGII("RCTX(ep=%u)_tx_cont ", ep);
}
return 1;
106928: e3a00001 mov r0, #1
* - after ZLP of transfer % AT91C_EP_OUT_SIZE == 0
* - after last packet of transfer % AT91C_EP_OUT_SIZE != 0
*/
DEBUGII("RCTX(ep=%u,ctx=%u)_tx_done ", ep, req_ctx_num(rctx));
upcd.ep[ep].incomplete.rctx = NULL;
req_ctx_put(rctx);
10692c: eaffffa1 b 1067b8 <__udp_refill_ep+0x20>
if (upcd.ep[ep].incomplete.rctx) {
rctx = upcd.ep[ep].incomplete.rctx;
start = upcd.ep[ep].incomplete.bytes_sent;
} else {
/* get pending rctx and start transmitting from zero */
rctx = req_ctx_find_get(0, epstate[ep].state_pending,
106930: e59fe038 ldr lr, [pc, #56] ; 106970 <__udp_refill_ep+0x1d8>
106934: e08e2186 add r2, lr, r6, lsl #3
106938: e5921004 ldr r1, [r2, #4]
10693c: e59fc030 ldr ip, [pc, #48] ; 106974 <__udp_refill_ep+0x1dc>
106940: e79e2186 ldr r2, [lr, r6, lsl #3]
106944: e1a0e00f mov lr, pc
106948: e12fff1c bx ip
epstate[ep].state_busy);
if (!rctx)
10694c: e3500000 cmp r0, #0
106950: 0affff98 beq 1067b8 <__udp_refill_ep+0x20>
return 0;
start = 0;
upcd.ep[ep].incomplete.bytes_sent = 0;
106954: e3a0a000 mov sl, #0
106958: e588a014 str sl, [r8, #20]
10695c: e1a0100a mov r1, sl
106960: e1a0900a mov r9, sl
/* get pending rctx and start transmitting from zero */
rctx = req_ctx_find_get(0, epstate[ep].state_pending,
epstate[ep].state_busy);
if (!rctx)
return 0;
start = 0;
106964: e1a0800a mov r8, sl
106968: eaffffa2 b 1067f8 <__udp_refill_ep+0x60>
10696c: 0020030c .word 0x0020030c
106970: 0010a600 .word 0x0010a600
106974: 00200080 .word 0x00200080
00106978 <udp_irq>:
return ret;
}
static void udp_irq(void)
{
106978: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
u_int32_t csr;
AT91PS_UDP pUDP = upcd.pUdp;
10697c: e59f5b10 ldr r5, [pc, #2832] ; 107494 <udp_irq+0xb1c>
106980: e5954000 ldr r4, [r5]
AT91_REG isr = pUDP->UDP_ISR;
106984: e594001c ldr r0, [r4, #28]
return ret;
}
static void udp_irq(void)
{
106988: e24dd014 sub sp, sp, #20
u_int32_t csr;
AT91PS_UDP pUDP = upcd.pUdp;
AT91_REG isr = pUDP->UDP_ISR;
10698c: e58d0008 str r0, [sp, #8]
DEBUGI("udp_irq(imr=0x%04x, isr=0x%04x, state=%d): ",
pUDP->UDP_IMR, isr, upcd.state);
if (isr & AT91C_UDP_ENDBUSRES) {
106990: e59d3008 ldr r3, [sp, #8]
106994: e3130a01 tst r3, #4096 ; 0x1000
106998: 1a000098 bne 106c00 <udp_irq+0x288>
goto out;
}
#endif
}
if (isr & AT91C_UDP_EPINT0) {
10699c: e59dc008 ldr ip, [sp, #8]
1069a0: e31c0001 tst ip, #1
1069a4: 1a0000b3 bne 106c78 <udp_irq+0x300>
DEBUGI("EP0INT(Control) ");
udp_ep0_handler();
}
if (isr & AT91C_UDP_EPINT1) {
1069a8: e59d0008 ldr r0, [sp, #8]
1069ac: e3100002 tst r0, #2
1069b0: 0a000046 beq 106ad0 <udp_irq+0x158>
u_int32_t cur_rcv_bank = upcd.cur_rcv_bank;
1069b4: e5956008 ldr r6, [r5, #8]
u_int16_t i, pkt_size;
struct req_ctx *rctx;
csr = pUDP->UDP_CSR[1];
1069b8: e5947034 ldr r7, [r4, #52] ; 0x34
if (csr & AT91C_UDP_RX_DATA_BK1)
DEBUGIO("BANK1 ");
if (csr & AT91C_UDP_RX_DATA_BK0)
DEBUGIO("BANK0 ");
if (!(csr & cur_rcv_bank))
1069bc: e1170006 tst r7, r6
1069c0: 0a000042 beq 106ad0 <udp_irq+0x158>
goto cont_ep2;
if (upcd.ep[1].incomplete.rctx) {
1069c4: e59fcac8 ldr ip, [pc, #2760] ; 107494 <udp_irq+0xb1c>
1069c8: e59c001c ldr r0, [ip, #28]
1069cc: e3500000 cmp r0, #0
u_int32_t cur_rcv_bank = upcd.cur_rcv_bank;
u_int16_t i, pkt_size;
struct req_ctx *rctx;
csr = pUDP->UDP_CSR[1];
pkt_size = csr >> 16;
1069d0: e1a07827 lsr r7, r7, #16
DEBUGIO("BANK0 ");
if (!(csr & cur_rcv_bank))
goto cont_ep2;
if (upcd.ep[1].incomplete.rctx) {
1069d4: 0a000133 beq 106ea8 <udp_irq+0x530>
1069d8: e1d020b6 ldrh r2, [r0, #6]
1069dc: e1a01002 mov r1, r2
}
rctx->tot_len = 0;
}
DEBUGIO("RCTX=%u ", req_ctx_num(rctx));
if (rctx->size - rctx->tot_len < pkt_size) {
1069e0: e1d030b4 ldrh r3, [r0, #4]
1069e4: e0611003 rsb r1, r1, r3
1069e8: e1510007 cmp r1, r7
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
1069ec: b0627003 rsblt r7, r2, r3
1069f0: b1a07807 lsllt r7, r7, #16
1069f4: b1a07827 lsrlt r7, r7, #16
}
for (i = 0; i < pkt_size; i++)
1069f8: e3570000 cmp r7, #0
1069fc: 0a000028 beq 106aa4 <udp_irq+0x12c>
local_irq_restore(flags);
return ret;
}
static void udp_irq(void)
106a00: e087c002 add ip, r7, r2
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a04: e2828001 add r8, r2, #1
local_irq_restore(flags);
return ret;
}
static void udp_irq(void)
106a08: e1a0a80c lsl sl, ip, #16
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a0c: e1a03808 lsl r3, r8, #16
local_irq_restore(flags);
return ret;
}
static void udp_irq(void)
106a10: e1a0a82a lsr sl, sl, #16
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a14: e5948054 ldr r8, [r4, #84] ; 0x54
106a18: e1a03823 lsr r3, r3, #16
106a1c: e1e01002 mvn r1, r2
106a20: e590c008 ldr ip, [r0, #8]
106a24: e081100a add r1, r1, sl
if (rctx->size - rctx->tot_len < pkt_size) {
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
106a28: e153000a cmp r3, sl
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a2c: e7cc8002 strb r8, [ip, r2]
106a30: e2011001 and r1, r1, #1
106a34: e1c030b6 strh r3, [r0, #6]
if (rctx->size - rctx->tot_len < pkt_size) {
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
106a38: 0a000019 beq 106aa4 <udp_irq+0x12c>
106a3c: e3510000 cmp r1, #0
106a40: 0a000008 beq 106a68 <udp_irq+0xf0>
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a44: e594c054 ldr ip, [r4, #84] ; 0x54
106a48: e2832001 add r2, r3, #1
106a4c: e5901008 ldr r1, [r0, #8]
106a50: e1a02802 lsl r2, r2, #16
106a54: e7c1c003 strb ip, [r1, r3]
106a58: e1a03822 lsr r3, r2, #16
if (rctx->size - rctx->tot_len < pkt_size) {
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
106a5c: e153000a cmp r3, sl
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a60: e1c030b6 strh r3, [r0, #6]
if (rctx->size - rctx->tot_len < pkt_size) {
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
106a64: 0a00000e beq 106aa4 <udp_irq+0x12c>
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a68: e2832001 add r2, r3, #1
106a6c: e5948054 ldr r8, [r4, #84] ; 0x54
106a70: e590c008 ldr ip, [r0, #8]
106a74: e1a02802 lsl r2, r2, #16
106a78: e1a01822 lsr r1, r2, #16
106a7c: e7cc8003 strb r8, [ip, r3]
106a80: e2818001 add r8, r1, #1
106a84: e1a03808 lsl r3, r8, #16
106a88: e1a03823 lsr r3, r3, #16
106a8c: e5948054 ldr r8, [r4, #84] ; 0x54
106a90: e5901008 ldr r1, [r0, #8]
if (rctx->size - rctx->tot_len < pkt_size) {
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
106a94: e153000a cmp r3, sl
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
106a98: e7c18822 strb r8, [r1, r2, lsr #16]
106a9c: e1c030b6 strh r3, [r0, #6]
if (rctx->size - rctx->tot_len < pkt_size) {
DEBUGIO("RCTX too small, truncating !!!\n");
pkt_size = rctx->size - rctx->tot_len;
}
for (i = 0; i < pkt_size; i++)
106aa0: 1afffff0 bne 106a68 <udp_irq+0xf0>
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
pUDP->UDP_CSR[1] &= ~cur_rcv_bank;
106aa4: e5941034 ldr r1, [r4, #52] ; 0x34
/* toggle current receive bank */
if (cur_rcv_bank == AT91C_UDP_RX_DATA_BK0)
cur_rcv_bank = AT91C_UDP_RX_DATA_BK1;
106aa8: e3560002 cmp r6, #2
}
for (i = 0; i < pkt_size; i++)
rctx->data[rctx->tot_len++] = pUDP->UDP_FDR[1];
pUDP->UDP_CSR[1] &= ~cur_rcv_bank;
106aac: e1c16006 bic r6, r1, r6
106ab0: e5846034 str r6, [r4, #52] ; 0x34
/* toggle current receive bank */
if (cur_rcv_bank == AT91C_UDP_RX_DATA_BK0)
cur_rcv_bank = AT91C_UDP_RX_DATA_BK1;
else
cur_rcv_bank = AT91C_UDP_RX_DATA_BK0;
upcd.cur_rcv_bank = cur_rcv_bank;
106ab4: e59f69d8 ldr r6, [pc, #2520] ; 107494 <udp_irq+0xb1c>
pUDP->UDP_CSR[1] &= ~cur_rcv_bank;
/* toggle current receive bank */
if (cur_rcv_bank == AT91C_UDP_RX_DATA_BK0)
cur_rcv_bank = AT91C_UDP_RX_DATA_BK1;
106ab8: 13a03002 movne r3, #2
106abc: 03a03040 moveq r3, #64 ; 0x40
DEBUGIO("rctxdump(%s) ", hexdump(rctx->data, rctx->tot_len));
/* if this is the last packet in transfer, hand rctx up the
* stack */
if (pkt_size < AT91C_EP_IN_SIZE) {
106ac0: e357003f cmp r7, #63 ; 0x3f
/* toggle current receive bank */
if (cur_rcv_bank == AT91C_UDP_RX_DATA_BK0)
cur_rcv_bank = AT91C_UDP_RX_DATA_BK1;
else
cur_rcv_bank = AT91C_UDP_RX_DATA_BK0;
upcd.cur_rcv_bank = cur_rcv_bank;
106ac4: e5853008 str r3, [r5, #8]
DEBUGIO("RCTX_rx_done ");
req_ctx_set_state(rctx, RCTX_STATE_UDP_RCV_DONE);
upcd.ep[1].incomplete.rctx = NULL;
} else {
DEBUGIO("RCTX_rx_cont ");
upcd.ep[1].incomplete.rctx = rctx;
106ac8: 8586001c strhi r0, [r6, #28]
DEBUGIO("rctxdump(%s) ", hexdump(rctx->data, rctx->tot_len));
/* if this is the last packet in transfer, hand rctx up the
* stack */
if (pkt_size < AT91C_EP_IN_SIZE) {
106acc: 9a0000cb bls 106e00 <udp_irq+0x488>
DEBUGIO("RCTX_rx_cont ");
upcd.ep[1].incomplete.rctx = rctx;
}
}
cont_ep2:
if (isr & AT91C_UDP_EPINT2) {
106ad0: e59d3008 ldr r3, [sp, #8]
106ad4: e3130004 tst r3, #4
106ad8: 0a000015 beq 106b34 <udp_irq+0x1bc>
csr = pUDP->UDP_CSR[2];
106adc: e594c038 ldr ip, [r4, #56] ; 0x38
DEBUGI("EP2INT(In, CSR=0x%08x) ", csr);
if (csr & AT91C_UDP_TXCOMP) {
106ae0: e31c0001 tst ip, #1
106ae4: 0a000012 beq 106b34 <udp_irq+0x1bc>
DEBUGII("ACK_TX_COMP ");
/* acknowledge TX completion */
pUDP->UDP_CSR[2] &= ~AT91C_UDP_TXCOMP;
106ae8: e5942038 ldr r2, [r4, #56] ; 0x38
106aec: e3c2e001 bic lr, r2, #1
106af0: e584e038 str lr, [r4, #56] ; 0x38
while (pUDP->UDP_CSR[2] & AT91C_UDP_TXCOMP) ;
106af4: e5941038 ldr r1, [r4, #56] ; 0x38
106af8: e3110001 tst r1, #1
106afc: 1afffffc bne 106af4 <udp_irq+0x17c>
static inline int atomic_sub_return(int i, atomic_t *v)
{
unsigned long flags;
int val;
local_irq_save(flags);
106b00: e10fc000 mrs ip, CPSR
106b04: e38c3080 orr r3, ip, #128 ; 0x80
106b08: e121f003 msr CPSR_c, r3
val = v->counter;
106b0c: e5953024 ldr r3, [r5, #36] ; 0x24
v->counter = val -= i;
106b10: e2430001 sub r0, r3, #1
106b14: e5850024 str r0, [r5, #36] ; 0x24
local_irq_restore(flags);
106b18: e121f00c msr CPSR_c, ip
/* if we already have another packet in DPR, send it */
if (atomic_dec_return(&upcd.ep[2].pkts_in_transit) == 1)
106b1c: e3500001 cmp r0, #1
pUDP->UDP_CSR[2] |= AT91C_UDP_TXPKTRDY;
106b20: 05940038 ldreq r0, [r4, #56] ; 0x38
106b24: 03800010 orreq r0, r0, #16
106b28: 05840038 streq r0, [r4, #56] ; 0x38
__udp_refill_ep(2);
106b2c: e3a00002 mov r0, #2
106b30: ebffff18 bl 106798 <__udp_refill_ep>
}
}
if (isr & AT91C_UDP_EPINT3) {
106b34: e59d2008 ldr r2, [sp, #8]
106b38: e3120008 tst r2, #8
106b3c: 0a000015 beq 106b98 <udp_irq+0x220>
csr = pUDP->UDP_CSR[3];
106b40: e594103c ldr r1, [r4, #60] ; 0x3c
DEBUGII("EP3INT(Interrupt, CSR=0x%08x) ", csr);
/* Transmit has completed, re-fill from pending rcts for EP3 */
if (csr & AT91C_UDP_TXCOMP) {
106b44: e3110001 tst r1, #1
106b48: 0a000012 beq 106b98 <udp_irq+0x220>
pUDP->UDP_CSR[3] &= ~AT91C_UDP_TXCOMP;
106b4c: e594003c ldr r0, [r4, #60] ; 0x3c
106b50: e3c0e001 bic lr, r0, #1
106b54: e584e03c str lr, [r4, #60] ; 0x3c
while (pUDP->UDP_CSR[3] & AT91C_UDP_TXCOMP) ;
106b58: e594c03c ldr ip, [r4, #60] ; 0x3c
106b5c: e31c0001 tst ip, #1
106b60: 1afffffc bne 106b58 <udp_irq+0x1e0>
static inline int atomic_sub_return(int i, atomic_t *v)
{
unsigned long flags;
int val;
local_irq_save(flags);
106b64: e10f2000 mrs r2, CPSR
106b68: e3823080 orr r3, r2, #128 ; 0x80
106b6c: e121f003 msr CPSR_c, r3
val = v->counter;
106b70: e5951030 ldr r1, [r5, #48] ; 0x30
v->counter = val -= i;
106b74: e2413001 sub r3, r1, #1
106b78: e5853030 str r3, [r5, #48] ; 0x30
local_irq_restore(flags);
106b7c: e121f002 msr CPSR_c, r2
/* if we already have another packet in DPR, send it */
if (atomic_dec_return(&upcd.ep[3].pkts_in_transit) == 1)
106b80: e3530001 cmp r3, #1
pUDP->UDP_CSR[3] |= AT91C_UDP_TXPKTRDY;
106b84: 0594303c ldreq r3, [r4, #60] ; 0x3c
106b88: 03833010 orreq r3, r3, #16
106b8c: 0584303c streq r3, [r4, #60] ; 0x3c
__udp_refill_ep(3);
106b90: e3a00003 mov r0, #3
106b94: ebfffeff bl 106798 <__udp_refill_ep>
}
}
if (isr & AT91C_UDP_RXSUSP) {
106b98: e59d1008 ldr r1, [sp, #8]
106b9c: e3110c01 tst r1, #256 ; 0x100
pUDP->UDP_ICR = AT91C_UDP_RXSUSP;
106ba0: 13a01c01 movne r1, #256 ; 0x100
106ba4: 15841020 strne r1, [r4, #32]
* involves saving the pre-suspend state, and calling back
* into the main application program to ask it to power down
* all peripherals, switching to slow clock, ... */
#endif
}
if (isr & AT91C_UDP_RXRSM) {
106ba8: e59d2008 ldr r2, [sp, #8]
106bac: e3120c02 tst r2, #512 ; 0x200
pUDP->UDP_ICR = AT91C_UDP_RXRSM;
106bb0: 13a02c02 movne r2, #512 ; 0x200
106bb4: 15842020 strne r2, [r4, #32]
if (upcd.state == USB_STATE_SUSPENDED)
upcd.state = USB_STATE_CONFIGURED;
/* FIXME: implement suspend/resume */
#endif
}
if (isr & AT91C_UDP_EXTRSM) {
106bb8: e59d3008 ldr r3, [sp, #8]
106bbc: e3130b01 tst r3, #1024 ; 0x400
pUDP->UDP_ICR = AT91C_UDP_EXTRSM;
106bc0: 13a03b01 movne r3, #1024 ; 0x400
106bc4: 15843020 strne r3, [r4, #32]
DEBUGI("EXTRSM ");
/* FIXME: implement suspend/resume */
}
if (isr & AT91C_UDP_SOFINT) {
106bc8: e59dc008 ldr ip, [sp, #8]
106bcc: e31c0b02 tst ip, #2048 ; 0x800
pUDP->UDP_ICR = AT91C_UDP_SOFINT;
106bd0: 13a0cb02 movne ip, #2048 ; 0x800
106bd4: 1584c020 strne ip, [r4, #32]
DEBUGI("SOFINT ");
}
if (isr & AT91C_UDP_WAKEUP) {
106bd8: e59d0008 ldr r0, [sp, #8]
106bdc: e3100a02 tst r0, #8192 ; 0x2000
pUDP->UDP_ICR = AT91C_UDP_WAKEUP;
106be0: 13a00a02 movne r0, #8192 ; 0x2000
106be4: 15840020 strne r0, [r4, #32]
static inline void AT91F_AIC_ClearIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id) // \arg interrupt number to initialize
{
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = (0x1 << irq_id);
106be8: e3a00b02 mov r0, #2048 ; 0x800
106bec: e3e0cc0f mvn ip, #3840 ; 0xf00
106bf0: e58c0029 str r0, [ip, #41] ; 0x29
DEBUGI("WAKEUP ");
}
out:
DEBUGI("END\r\n");
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_UDP);
}
106bf4: e28dd014 add sp, sp, #20
106bf8: e8bd4ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, lr}
106bfc: e12fff1e bx lr
pUDP->UDP_IMR, isr, upcd.state);
if (isr & AT91C_UDP_ENDBUSRES) {
DEBUGI("ENDBUSRES ");
pUDP->UDP_ICR = AT91C_UDP_ENDBUSRES;
pUDP->UDP_IER = AT91C_UDP_EPINT0;
106c00: e3a0e001 mov lr, #1
DEBUGI("udp_irq(imr=0x%04x, isr=0x%04x, state=%d): ",
pUDP->UDP_IMR, isr, upcd.state);
if (isr & AT91C_UDP_ENDBUSRES) {
DEBUGI("ENDBUSRES ");
pUDP->UDP_ICR = AT91C_UDP_ENDBUSRES;
106c04: e3a00a01 mov r0, #4096 ; 0x1000
106c08: e5840020 str r0, [r4, #32]
pUDP->UDP_IER = AT91C_UDP_EPINT0;
/* reset all endpoints */
pUDP->UDP_RSTEP = (unsigned int)-1;
pUDP->UDP_RSTEP = 0;
106c0c: e3a0c000 mov ip, #0
pUDP->UDP_IMR, isr, upcd.state);
if (isr & AT91C_UDP_ENDBUSRES) {
DEBUGI("ENDBUSRES ");
pUDP->UDP_ICR = AT91C_UDP_ENDBUSRES;
pUDP->UDP_IER = AT91C_UDP_EPINT0;
106c10: e584e010 str lr, [r4, #16]
/* reset all endpoints */
pUDP->UDP_RSTEP = (unsigned int)-1;
106c14: e3e02000 mvn r2, #0
pUDP->UDP_RSTEP = 0;
/* Enable the function */
pUDP->UDP_FADDR = AT91C_UDP_FEN;
106c18: e3a03c01 mov r3, #256 ; 0x100
/* Configure endpoint 0 */
pUDP->UDP_CSR[0] = (AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL);
upcd.cur_config = 0;
upcd.state = USB_STATE_DEFAULT;
reset_ep(1);
106c1c: e1a0000e mov r0, lr
pUDP->UDP_RSTEP = (unsigned int)-1;
pUDP->UDP_RSTEP = 0;
/* Enable the function */
pUDP->UDP_FADDR = AT91C_UDP_FEN;
/* Configure endpoint 0 */
pUDP->UDP_CSR[0] = (AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL);
106c20: e3a0e902 mov lr, #32768 ; 0x8000
if (isr & AT91C_UDP_ENDBUSRES) {
DEBUGI("ENDBUSRES ");
pUDP->UDP_ICR = AT91C_UDP_ENDBUSRES;
pUDP->UDP_IER = AT91C_UDP_EPINT0;
/* reset all endpoints */
pUDP->UDP_RSTEP = (unsigned int)-1;
106c24: e5842028 str r2, [r4, #40] ; 0x28
/* Enable the function */
pUDP->UDP_FADDR = AT91C_UDP_FEN;
/* Configure endpoint 0 */
pUDP->UDP_CSR[0] = (AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL);
upcd.cur_config = 0;
upcd.state = USB_STATE_DEFAULT;
106c28: e3a01005 mov r1, #5
DEBUGI("ENDBUSRES ");
pUDP->UDP_ICR = AT91C_UDP_ENDBUSRES;
pUDP->UDP_IER = AT91C_UDP_EPINT0;
/* reset all endpoints */
pUDP->UDP_RSTEP = (unsigned int)-1;
pUDP->UDP_RSTEP = 0;
106c2c: e584c028 str ip, [r4, #40] ; 0x28
/* Enable the function */
pUDP->UDP_FADDR = AT91C_UDP_FEN;
106c30: e5843008 str r3, [r4, #8]
/* Configure endpoint 0 */
pUDP->UDP_CSR[0] = (AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL);
106c34: e584e030 str lr, [r4, #48] ; 0x30
upcd.cur_config = 0;
106c38: e5c5c005 strb ip, [r5, #5]
upcd.state = USB_STATE_DEFAULT;
106c3c: e5c51004 strb r1, [r5, #4]
reset_ep(1);
106c40: ebfffea8 bl 1066e8 <reset_ep>
reset_ep(2);
106c44: e3a00002 mov r0, #2
106c48: ebfffea6 bl 1066e8 <reset_ep>
reset_ep(3);
106c4c: e3a00003 mov r0, #3
106c50: ebfffea4 bl 1066e8 <reset_ep>
#ifdef CONFIG_DFU
if (*dfu->dfu_state == DFU_STATE_appDETACH) {
106c54: e59f383c ldr r3, [pc, #2108] ; 107498 <udp_irq+0xb20>
106c58: e59320e8 ldr r2, [r3, #232] ; 0xe8
106c5c: e5922000 ldr r2, [r2]
106c60: e3520001 cmp r2, #1
106c64: 1affff4c bne 10699c <udp_irq+0x24>
DEBUGI("DFU_SWITCH ");
/* now we need to switch to DFU mode */
dfu->dfu_switch();
106c68: e593c0e4 ldr ip, [r3, #228] ; 0xe4
106c6c: e1a0e00f mov lr, pc
106c70: e12fff1c bx ip
goto out;
106c74: eaffffdb b 106be8 <udp_irq+0x270>
}
/* Handle requests on the USB Control Endpoint */
static void udp_ep0_handler(void)
{
AT91PS_UDP pUDP = upcd.pUdp;
106c78: e595a000 ldr sl, [r5]
u_int8_t bmRequestType, bRequest;
u_int16_t wValue, wIndex, wLength, wStatus;
u_int32_t csr = pUDP->UDP_CSR[0];
106c7c: e59a6030 ldr r6, [sl, #48] ; 0x30
DEBUGE("CSR=0x%04x ", csr);
106c80: e59f0814 ldr r0, [pc, #2068] ; 10749c <udp_irq+0xb24>
106c84: e1a01006 mov r1, r6
106c88: eb000463 bl 107e1c <debugp>
if (csr & AT91C_UDP_STALLSENT) {
106c8c: e3160008 tst r6, #8
106c90: 1a000065 bne 106e2c <udp_irq+0x4b4>
DEBUGE("ACK_STALLSENT ");
pUDP->UDP_CSR[0] = ~AT91C_UDP_STALLSENT;
}
if (csr & AT91C_UDP_RX_DATA_BK0) {
106c94: e3160002 tst r6, #2
106c98: 1a00005d bne 106e14 <udp_irq+0x49c>
DEBUGE("ACK_BANK0 ");
pUDP->UDP_CSR[0] &= ~AT91C_UDP_RX_DATA_BK0;
}
if (!(csr & AT91C_UDP_RXSETUP)) {
106c9c: e3160004 tst r6, #4
106ca0: 0a000053 beq 106df4 <udp_irq+0x47c>
DEBUGE("no setup packet ");
return;
}
DEBUGE("len=%d ", csr >> 16);
106ca4: e1a06826 lsr r6, r6, #16
106ca8: e59f07f0 ldr r0, [pc, #2032] ; 1074a0 <udp_irq+0xb28>
106cac: e1a01006 mov r1, r6
106cb0: eb000459 bl 107e1c <debugp>
if (csr >> 16 == 0) {
106cb4: e3560000 cmp r6, #0
106cb8: 0a000060 beq 106e40 <udp_irq+0x4c8>
DEBUGE("empty packet ");
return;
}
bmRequestType = pUDP->UDP_FDR[0];
106cbc: e59a6050 ldr r6, [sl, #80] ; 0x50
bRequest = pUDP->UDP_FDR[0];
106cc0: e59a7050 ldr r7, [sl, #80] ; 0x50
wValue = (pUDP->UDP_FDR[0] & 0xFF);
106cc4: e59a9050 ldr r9, [sl, #80] ; 0x50
wValue |= (pUDP->UDP_FDR[0] << 8);
106cc8: e59a8050 ldr r8, [sl, #80] ; 0x50
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
106ccc: e59a2050 ldr r2, [sl, #80] ; 0x50
wIndex |= (pUDP->UDP_FDR[0] << 8);
106cd0: e59ae050 ldr lr, [sl, #80] ; 0x50
wLength = (pUDP->UDP_FDR[0] & 0xFF);
106cd4: e59a0050 ldr r0, [sl, #80] ; 0x50
wLength |= (pUDP->UDP_FDR[0] << 8);
106cd8: e59a1050 ldr r1, [sl, #80] ; 0x50
bmRequestType = pUDP->UDP_FDR[0];
bRequest = pUDP->UDP_FDR[0];
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
106cdc: e202b0ff and fp, r2, #255 ; 0xff
wIndex |= (pUDP->UDP_FDR[0] << 8);
wLength = (pUDP->UDP_FDR[0] & 0xFF);
106ce0: e20030ff and r3, r0, #255 ; 0xff
bmRequestType = pUDP->UDP_FDR[0];
bRequest = pUDP->UDP_FDR[0];
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
wIndex |= (pUDP->UDP_FDR[0] << 8);
106ce4: e18b240e orr r2, fp, lr, lsl #8
wLength = (pUDP->UDP_FDR[0] & 0xFF);
wLength |= (pUDP->UDP_FDR[0] << 8);
106ce8: e1830401 orr r0, r3, r1, lsl #8
return;
}
bmRequestType = pUDP->UDP_FDR[0];
bRequest = pUDP->UDP_FDR[0];
wValue = (pUDP->UDP_FDR[0] & 0xFF);
106cec: e209c0ff and ip, r9, #255 ; 0xff
wValue |= (pUDP->UDP_FDR[0] << 8);
106cf0: e18c9408 orr r9, ip, r8, lsl #8
if (csr >> 16 == 0) {
DEBUGE("empty packet ");
return;
}
bmRequestType = pUDP->UDP_FDR[0];
106cf4: e20660ff and r6, r6, #255 ; 0xff
bRequest = pUDP->UDP_FDR[0];
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
wIndex |= (pUDP->UDP_FDR[0] << 8);
106cf8: e1a0c802 lsl ip, r2, #16
wLength = (pUDP->UDP_FDR[0] & 0xFF);
wLength |= (pUDP->UDP_FDR[0] << 8);
106cfc: e1a0b800 lsl fp, r0, #16
}
bmRequestType = pUDP->UDP_FDR[0];
bRequest = pUDP->UDP_FDR[0];
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
106d00: e1a08809 lsl r8, r9, #16
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
wIndex |= (pUDP->UDP_FDR[0] << 8);
106d04: e1a0e82c lsr lr, ip, #16
wLength = (pUDP->UDP_FDR[0] & 0xFF);
wLength |= (pUDP->UDP_FDR[0] << 8);
DEBUGE("bmRequestType=0x%2x ", bmRequestType);
106d08: e59f0794 ldr r0, [pc, #1940] ; 1074a4 <udp_irq+0xb2c>
106d0c: e1a01006 mov r1, r6
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
wIndex |= (pUDP->UDP_FDR[0] << 8);
wLength = (pUDP->UDP_FDR[0] & 0xFF);
wLength |= (pUDP->UDP_FDR[0] << 8);
106d10: e1a0982b lsr r9, fp, #16
bmRequestType = pUDP->UDP_FDR[0];
bRequest = pUDP->UDP_FDR[0];
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
wIndex = (pUDP->UDP_FDR[0] & 0xFF);
wIndex |= (pUDP->UDP_FDR[0] << 8);
106d14: e58de000 str lr, [sp]
wLength = (pUDP->UDP_FDR[0] & 0xFF);
wLength |= (pUDP->UDP_FDR[0] << 8);
106d18: e58d9004 str r9, [sp, #4]
DEBUGE("bmRequestType=0x%2x ", bmRequestType);
106d1c: eb00043e bl 107e1c <debugp>
if (bmRequestType & 0x80) {
106d20: e3160080 tst r6, #128 ; 0x80
DEBUGE("empty packet ");
return;
}
bmRequestType = pUDP->UDP_FDR[0];
bRequest = pUDP->UDP_FDR[0];
106d24: e20770ff and r7, r7, #255 ; 0xff
wValue = (pUDP->UDP_FDR[0] & 0xFF);
wValue |= (pUDP->UDP_FDR[0] << 8);
106d28: e1a08828 lsr r8, r8, #16
wLength = (pUDP->UDP_FDR[0] & 0xFF);
wLength |= (pUDP->UDP_FDR[0] << 8);
DEBUGE("bmRequestType=0x%2x ", bmRequestType);
if (bmRequestType & 0x80) {
106d2c: 1a00006d bne 106ee8 <udp_irq+0x570>
DEBUGE("DATA_IN=1 ");
pUDP->UDP_CSR[0] |= AT91C_UDP_DIR;
while (!(pUDP->UDP_CSR[0] & AT91C_UDP_DIR)) ;
}
pUDP->UDP_CSR[0] &= ~AT91C_UDP_RXSETUP;
106d30: e59ac030 ldr ip, [sl, #48] ; 0x30
106d34: e3cce004 bic lr, ip, #4
106d38: e58ae030 str lr, [sl, #48] ; 0x30
while ((pUDP->UDP_CSR[0] & AT91C_UDP_RXSETUP)) ;
106d3c: e59a0030 ldr r0, [sl, #48] ; 0x30
106d40: e2109004 ands r9, r0, #4
106d44: 1afffffc bne 106d3c <udp_irq+0x3c4>
DEBUGE("dfu_state = %u ", *dfu->dfu_state);
106d48: e59fb748 ldr fp, [pc, #1864] ; 107498 <udp_irq+0xb20>
106d4c: e59b30e8 ldr r3, [fp, #232] ; 0xe8
106d50: e59f0750 ldr r0, [pc, #1872] ; 1074a8 <udp_irq+0xb30>
106d54: e5931000 ldr r1, [r3]
106d58: eb00042f bl 107e1c <debugp>
/* Handle supported standard device request Cf Table 9-3 in USB
* speciication Rev 1.1 */
switch ((bRequest << 8) | bmRequestType) {
106d5c: e59f2748 ldr r2, [pc, #1864] ; 1074ac <udp_irq+0xb34>
106d60: e1863407 orr r3, r6, r7, lsl #8
106d64: e1530002 cmp r3, r2
106d68: 0a0000f8 beq 107150 <udp_irq+0x7d8>
106d6c: da000036 ble 106e4c <udp_irq+0x4d4>
106d70: e3530d22 cmp r3, #2176 ; 0x880
106d74: 0a000093 beq 106fc8 <udp_irq+0x650>
106d78: ca00006c bgt 106f30 <udp_irq+0x5b8>
106d7c: e3530c05 cmp r3, #1280 ; 0x500
106d80: 0a00016b beq 107334 <udp_irq+0x9bc>
106d84: e3530d1a cmp r3, #1664 ; 0x680
106d88: 0a0000fd beq 107184 <udp_irq+0x80c>
106d8c: e59fe71c ldr lr, [pc, #1820] ; 1074b0 <udp_irq+0xb38>
106d90: e153000e cmp r3, lr
106d94: 1a000035 bne 106e70 <udp_irq+0x4f8>
(wIndex & 0xff) != 0)
goto out_stall;
udp_ep0_send_zlp();
break;
case STD_SET_FEATURE_ENDPOINT:
DEBUGE("SET_FEATURE_ENDPOINT ");
106d98: e59f0714 ldr r0, [pc, #1812] ; 1074b4 <udp_irq+0xb3c>
106d9c: eb00041e bl 107e1c <debugp>
if (upcd.state == USB_STATE_ADDRESS &&
106da0: e5d53004 ldrb r3, [r5, #4]
106da4: e3530006 cmp r3, #6
106da8: 0a000178 beq 107390 <udp_irq+0xa18>
(wIndex & 0xff) != 0)
goto out_stall;
if (wValue != USB_ENDPOINT_HALT)
106dac: e3580000 cmp r8, #0
106db0: 1a000035 bne 106e8c <udp_irq+0x514>
goto out_stall;
udp_ep0_send_zlp();
106db4: e59f66dc ldr r6, [pc, #1756] ; 107498 <udp_irq+0xb20>
106db8: e596c0d8 ldr ip, [r6, #216] ; 0xd8
106dbc: e1a0e00f mov lr, pc
106dc0: e12fff1c bx ip
wIndex &= 0x0F;
if ((wValue == 0) && wIndex && (wIndex <= 3)) {
106dc4: e59d2000 ldr r2, [sp]
106dc8: e312000f tst r2, #15
106dcc: e202300f and r3, r2, #15
106dd0: 0a00002d beq 106e8c <udp_irq+0x514>
106dd4: e3530003 cmp r3, #3
106dd8: 8a00002b bhi 106e8c <udp_irq+0x514>
pUDP->UDP_CSR[wIndex] = 0;
106ddc: e283000c add r0, r3, #12
106de0: e78a8100 str r8, [sl, r0, lsl #2]
udp_ep0_send_zlp();
106de4: e596c0d8 ldr ip, [r6, #216] ; 0xd8
106de8: e1a0e00f mov lr, pc
106dec: e12fff1c bx ip
106df0: eafffeec b 1069a8 <udp_irq+0x30>
DEBUGE("ACK_BANK0 ");
pUDP->UDP_CSR[0] &= ~AT91C_UDP_RX_DATA_BK0;
}
if (!(csr & AT91C_UDP_RXSETUP)) {
DEBUGE("no setup packet ");
106df4: e59f06bc ldr r0, [pc, #1724] ; 1074b8 <udp_irq+0xb40>
106df8: eb000407 bl 107e1c <debugp>
106dfc: eafffee9 b 1069a8 <udp_irq+0x30>
/* if this is the last packet in transfer, hand rctx up the
* stack */
if (pkt_size < AT91C_EP_IN_SIZE) {
DEBUGIO("RCTX_rx_done ");
req_ctx_set_state(rctx, RCTX_STATE_UDP_RCV_DONE);
106e00: e3a01002 mov r1, #2
106e04: eb00045a bl 107f74 <req_ctx_set_state>
upcd.ep[1].incomplete.rctx = NULL;
106e08: e3a00000 mov r0, #0
106e0c: e586001c str r0, [r6, #28]
106e10: eaffff2e b 106ad0 <udp_irq+0x158>
DEBUGE("ACK_STALLSENT ");
pUDP->UDP_CSR[0] = ~AT91C_UDP_STALLSENT;
}
if (csr & AT91C_UDP_RX_DATA_BK0) {
DEBUGE("ACK_BANK0 ");
106e14: e59f06a0 ldr r0, [pc, #1696] ; 1074bc <udp_irq+0xb44>
106e18: eb0003ff bl 107e1c <debugp>
pUDP->UDP_CSR[0] &= ~AT91C_UDP_RX_DATA_BK0;
106e1c: e59a2030 ldr r2, [sl, #48] ; 0x30
106e20: e3c23002 bic r3, r2, #2
106e24: e58a3030 str r3, [sl, #48] ; 0x30
106e28: eaffff9b b 106c9c <udp_irq+0x324>
u_int32_t csr = pUDP->UDP_CSR[0];
DEBUGE("CSR=0x%04x ", csr);
if (csr & AT91C_UDP_STALLSENT) {
DEBUGE("ACK_STALLSENT ");
106e2c: e59f068c ldr r0, [pc, #1676] ; 1074c0 <udp_irq+0xb48>
106e30: eb0003f9 bl 107e1c <debugp>
pUDP->UDP_CSR[0] = ~AT91C_UDP_STALLSENT;
106e34: e3e01008 mvn r1, #8
106e38: e58a1030 str r1, [sl, #48] ; 0x30
106e3c: eaffff94 b 106c94 <udp_irq+0x31c>
return;
}
DEBUGE("len=%d ", csr >> 16);
if (csr >> 16 == 0) {
DEBUGE("empty packet ");
106e40: e59f067c ldr r0, [pc, #1660] ; 1074c4 <udp_irq+0xb4c>
106e44: eb0003f4 bl 107e1c <debugp>
106e48: eafffed6 b 1069a8 <udp_irq+0x30>
while ((pUDP->UDP_CSR[0] & AT91C_UDP_RXSETUP)) ;
DEBUGE("dfu_state = %u ", *dfu->dfu_state);
/* Handle supported standard device request Cf Table 9-3 in USB
* speciication Rev 1.1 */
switch ((bRequest << 8) | bmRequestType) {
106e4c: e3530c01 cmp r3, #256 ; 0x100
106e50: 0a00007e beq 107050 <udp_irq+0x6d8>
106e54: ca00002c bgt 106f0c <udp_irq+0x594>
106e58: e3530081 cmp r3, #129 ; 0x81
106e5c: 0a0000a3 beq 1070f0 <udp_irq+0x778>
106e60: e3530082 cmp r3, #130 ; 0x82
106e64: 0a00007c beq 10705c <udp_irq+0x6e4>
106e68: e3530080 cmp r3, #128 ; 0x80
106e6c: 0a0000b0 beq 107134 <udp_irq+0x7bc>
* the given interface, we shall respond with STALL in the
* status stage */
udp_ep0_send_stall();
break;
default:
DEBUGE("DEFAULT(req=0x%02x, type=0x%02x) ",
106e70: e59f0650 ldr r0, [pc, #1616] ; 1074c8 <udp_irq+0xb50>
106e74: e1a01007 mov r1, r7
106e78: e1a02006 mov r2, r6
106e7c: eb0003e6 bl 107e1c <debugp>
bRequest, bmRequestType);
#ifdef CONFIG_DFU
if ((bmRequestType & 0x3f) == USB_TYPE_DFU) {
106e80: e206c03f and ip, r6, #63 ; 0x3f
106e84: e35c0021 cmp ip, #33 ; 0x21
106e88: 0a00015c beq 107400 <udp_irq+0xa88>
goto out_stall;
break;
}
return;
out_stall:
DEBUGE("STALL!! ");
106e8c: e59f0638 ldr r0, [pc, #1592] ; 1074cc <udp_irq+0xb54>
106e90: eb0003e1 bl 107e1c <debugp>
udp_ep0_send_stall();
106e94: e59f35fc ldr r3, [pc, #1532] ; 107498 <udp_irq+0xb20>
106e98: e593c0dc ldr ip, [r3, #220] ; 0xdc
106e9c: e1a0e00f mov lr, pc
106ea0: e12fff1c bx ip
106ea4: eafffebf b 1069a8 <udp_irq+0x30>
} else {
/* allocate new req_ctx */
DEBUGIO("alloc_new_RCTX ");
/* whether to get a big or a small req_ctx */
if (pkt_size >= AT91C_EP_IN_SIZE)
106ea8: e357003f cmp r7, #63 ; 0x3f
rctx = req_ctx_find_get(1, RCTX_STATE_FREE,
106eac: 83a00001 movhi r0, #1
106eb0: 83a010fe movhi r1, #254 ; 0xfe
106eb4: 81a02000 movhi r2, r0
RCTX_STATE_UDP_RCV_BUSY);
else
rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
106eb8: 93a010fe movls r1, #254 ; 0xfe
106ebc: 93a02001 movls r2, #1
106ec0: e59f3608 ldr r3, [pc, #1544] ; 1074d0 <udp_irq+0xb58>
106ec4: e1a0e00f mov lr, pc
106ec8: e12fff13 bx r3
RCTX_STATE_UDP_RCV_BUSY);
if (!rctx) {
106ecc: e3500000 cmp r0, #0
106ed0: 0a000129 beq 10737c <udp_irq+0xa04>
/* disable interrupts for now */
pUDP->UDP_IDR = AT91C_UDP_EPINT1;
DEBUGP("NO_RCTX_AVAIL! ");
goto cont_ep2;
}
rctx->tot_len = 0;
106ed4: e3a02000 mov r2, #0
106ed8: e3a01000 mov r1, #0
106edc: e1c020b6 strh r2, [r0, #6]
106ee0: e1a02001 mov r2, r1
106ee4: eafffebd b 1069e0 <udp_irq+0x68>
wLength |= (pUDP->UDP_FDR[0] << 8);
DEBUGE("bmRequestType=0x%2x ", bmRequestType);
if (bmRequestType & 0x80) {
DEBUGE("DATA_IN=1 ");
106ee8: e59f05e4 ldr r0, [pc, #1508] ; 1074d4 <udp_irq+0xb5c>
106eec: eb0003ca bl 107e1c <debugp>
pUDP->UDP_CSR[0] |= AT91C_UDP_DIR;
106ef0: e59a1030 ldr r1, [sl, #48] ; 0x30
106ef4: e3813080 orr r3, r1, #128 ; 0x80
106ef8: e58a3030 str r3, [sl, #48] ; 0x30
while (!(pUDP->UDP_CSR[0] & AT91C_UDP_DIR)) ;
106efc: e59ab030 ldr fp, [sl, #48] ; 0x30
106f00: e31b0080 tst fp, #128 ; 0x80
106f04: 0afffffc beq 106efc <udp_irq+0x584>
106f08: eaffff88 b 106d30 <udp_irq+0x3b8>
while ((pUDP->UDP_CSR[0] & AT91C_UDP_RXSETUP)) ;
DEBUGE("dfu_state = %u ", *dfu->dfu_state);
/* Handle supported standard device request Cf Table 9-3 in USB
* speciication Rev 1.1 */
switch ((bRequest << 8) | bmRequestType) {
106f0c: e59f15c4 ldr r1, [pc, #1476] ; 1074d8 <udp_irq+0xb60>
106f10: e1530001 cmp r3, r1
106f14: 0a0000f6 beq 1072f4 <udp_irq+0x97c>
106f18: ba0000ef blt 1072dc <udp_irq+0x964>
106f1c: e3530c03 cmp r3, #768 ; 0x300
106f20: 1affffd2 bne 106e70 <udp_irq+0x4f8>
sizeof(wStatus));
} else
goto out_stall;
break;
case STD_SET_FEATURE_ZERO:
DEBUGE("SET_FEATURE_ZERO ");
106f24: e59f05b0 ldr r0, [pc, #1456] ; 1074dc <udp_irq+0xb64>
106f28: eb0003bb bl 107e1c <debugp>
106f2c: eaffffd6 b 106e8c <udp_irq+0x514>
while ((pUDP->UDP_CSR[0] & AT91C_UDP_RXSETUP)) ;
DEBUGE("dfu_state = %u ", *dfu->dfu_state);
/* Handle supported standard device request Cf Table 9-3 in USB
* speciication Rev 1.1 */
switch ((bRequest << 8) | bmRequestType) {
106f30: e59f25a8 ldr r2, [pc, #1448] ; 1074e0 <udp_irq+0xb68>
106f34: e1530002 cmp r3, r2
106f38: 0a00003b beq 10702c <udp_irq+0x6b4>
106f3c: e282c080 add ip, r2, #128 ; 0x80
106f40: e153000c cmp r3, ip
106f44: 0a000029 beq 106ff0 <udp_irq+0x678>
106f48: e3530c09 cmp r3, #2304 ; 0x900
106f4c: 1affffc7 bne 106e70 <udp_irq+0x4f8>
goto out_stall;
break;
}
break;
case STD_SET_CONFIGURATION:
DEBUGE("SET_CONFIG ");
106f50: e59f058c ldr r0, [pc, #1420] ; 1074e4 <udp_irq+0xb6c>
106f54: eb0003b0 bl 107e1c <debugp>
if (upcd.state != USB_STATE_ADDRESS &&
106f58: e5d5c004 ldrb ip, [r5, #4]
106f5c: e24c3006 sub r3, ip, #6
106f60: e3530001 cmp r3, #1
106f64: 8affffc8 bhi 106e8c <udp_irq+0x514>
upcd.state != USB_STATE_CONFIGURED) {
goto out_stall;
}
if ((wValue & 0xff) == 0) {
106f68: e21830ff ands r3, r8, #255 ; 0xff
106f6c: 0a000118 beq 1073d4 <udp_irq+0xa5c>
upcd.state = USB_STATE_ADDRESS;
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
pUDP->UDP_CSR[1] = 0;
pUDP->UDP_CSR[2] = 0;
pUDP->UDP_CSR[3] = 0;
} else if ((wValue & 0xff) <=
106f70: e3530001 cmp r3, #1
106f74: 1affffc4 bne 106e8c <udp_irq+0x514>
dev_descriptor.bNumConfigurations) {
DEBUGE("VALUE!=0 ");
106f78: e59f0568 ldr r0, [pc, #1384] ; 1074e8 <udp_irq+0xb70>
106f7c: eb0003a6 bl 107e1c <debugp>
upcd.state = USB_STATE_CONFIGURED;
pUDP->UDP_GLBSTATE = AT91C_UDP_CONFG;
pUDP->UDP_CSR[1] = AT91C_UDP_EPEDS |
106f80: e3a00c82 mov r0, #33280 ; 0x8200
AT91C_UDP_EPTYPE_BULK_OUT;
pUDP->UDP_CSR[2] = AT91C_UDP_EPEDS |
106f84: e280cb01 add ip, r0, #1024 ; 0x400
pUDP->UDP_CSR[2] = 0;
pUDP->UDP_CSR[3] = 0;
} else if ((wValue & 0xff) <=
dev_descriptor.bNumConfigurations) {
DEBUGE("VALUE!=0 ");
upcd.state = USB_STATE_CONFIGURED;
106f88: e3a01007 mov r1, #7
pUDP->UDP_GLBSTATE = AT91C_UDP_CONFG;
106f8c: e3a02002 mov r2, #2
pUDP->UDP_CSR[1] = AT91C_UDP_EPEDS |
AT91C_UDP_EPTYPE_BULK_OUT;
pUDP->UDP_CSR[2] = AT91C_UDP_EPEDS |
AT91C_UDP_EPTYPE_BULK_IN;
pUDP->UDP_CSR[3] = AT91C_UDP_EPEDS |
106f90: e28c3c01 add r3, ip, #256 ; 0x100
pUDP->UDP_CSR[2] = 0;
pUDP->UDP_CSR[3] = 0;
} else if ((wValue & 0xff) <=
dev_descriptor.bNumConfigurations) {
DEBUGE("VALUE!=0 ");
upcd.state = USB_STATE_CONFIGURED;
106f94: e5c51004 strb r1, [r5, #4]
pUDP->UDP_GLBSTATE = AT91C_UDP_CONFG;
106f98: e58a2004 str r2, [sl, #4]
pUDP->UDP_CSR[1] = AT91C_UDP_EPEDS |
106f9c: e58a0034 str r0, [sl, #52] ; 0x34
AT91C_UDP_EPTYPE_BULK_OUT;
pUDP->UDP_CSR[2] = AT91C_UDP_EPEDS |
106fa0: e58ac038 str ip, [sl, #56] ; 0x38
AT91C_UDP_EPTYPE_BULK_IN;
pUDP->UDP_CSR[3] = AT91C_UDP_EPEDS |
106fa4: e58a303c str r3, [sl, #60] ; 0x3c
} else {
/* invalid configuration */
goto out_stall;
break;
}
upcd.cur_config = wValue;
106fa8: e5c58005 strb r8, [r5, #5]
udp_ep0_send_zlp();
106fac: e59fc4e4 ldr ip, [pc, #1252] ; 107498 <udp_irq+0xb20>
106fb0: e59cc0d8 ldr ip, [ip, #216] ; 0xd8
106fb4: e1a0e00f mov lr, pc
106fb8: e12fff1c bx ip
pUDP->UDP_IER = (AT91C_UDP_EPINT0 | AT91C_UDP_EPINT1 |
106fbc: e3a0300f mov r3, #15
106fc0: e58a3010 str r3, [sl, #16]
106fc4: eafffe77 b 1069a8 <udp_irq+0x30>
AT91C_UDP_EPINT2 | AT91C_UDP_EPINT3);
break;
case STD_GET_CONFIGURATION:
DEBUGE("GET_CONFIG ");
106fc8: e59f051c ldr r0, [pc, #1308] ; 1074ec <udp_irq+0xb74>
106fcc: eb000392 bl 107e1c <debugp>
switch (upcd.state) {
106fd0: e5d52004 ldrb r2, [r5, #4]
106fd4: e2420006 sub r0, r2, #6
106fd8: e3500001 cmp r0, #1
106fdc: 8affffaa bhi 106e8c <udp_irq+0x514>
case USB_STATE_ADDRESS:
case USB_STATE_CONFIGURED:
udp_ep0_send_data((char *)&(upcd.cur_config),
106fe0: e59f0508 ldr r0, [pc, #1288] ; 1074f0 <udp_irq+0xb78>
106fe4: e3a01001 mov r1, #1
106fe8: ebfffd5a bl 106558 <udp_ep0_send_data>
106fec: eafffe6d b 1069a8 <udp_irq+0x30>
udp_ep0_send_zlp();
} else
goto out_stall;
break;
case STD_SET_INTERFACE:
DEBUGE("SET INTERFACE ");
106ff0: e59f04fc ldr r0, [pc, #1276] ; 1074f4 <udp_irq+0xb7c>
106ff4: eb000388 bl 107e1c <debugp>
if (upcd.state != USB_STATE_CONFIGURED)
106ff8: e5d51004 ldrb r1, [r5, #4]
106ffc: e3510007 cmp r1, #7
107000: e59f348c ldr r3, [pc, #1164] ; 107494 <udp_irq+0xb1c>
107004: 1affffa0 bne 106e8c <udp_irq+0x514>
goto out_stall;
if (wIndex > cfg_descriptor.ucfg.bNumInterfaces)
107008: e59d1000 ldr r1, [sp]
10700c: e3510003 cmp r1, #3
107010: 8affff9d bhi 106e8c <udp_irq+0x514>
goto out_stall;
upcd.cur_interface = wIndex;
107014: e5c31006 strb r1, [r3, #6]
upcd.cur_altsett = wValue;
107018: e5c38007 strb r8, [r3, #7]
/* USB spec mandates that if we only support one altsetting in
* the given interface, we shall respond with STALL in the
* status stage */
udp_ep0_send_stall();
10701c: e59bc0dc ldr ip, [fp, #220] ; 0xdc
107020: e1a0e00f mov lr, pc
107024: e12fff1c bx ip
107028: eafffe5e b 1069a8 <udp_irq+0x30>
goto out_stall;
break;
}
break;
case STD_GET_INTERFACE:
DEBUGE("GET_INTERFACE ");
10702c: e59f04c4 ldr r0, [pc, #1220] ; 1074f8 <udp_irq+0xb80>
107030: eb000379 bl 107e1c <debugp>
if (upcd.state != USB_STATE_CONFIGURED)
107034: e5d51004 ldrb r1, [r5, #4]
107038: e3510007 cmp r1, #7
10703c: 1affff92 bne 106e8c <udp_irq+0x514>
goto out_stall;
udp_ep0_send_data((char *)&(upcd.cur_altsett),
107040: e59f04b4 ldr r0, [pc, #1204] ; 1074fc <udp_irq+0xb84>
107044: e3a01001 mov r1, #1
107048: ebfffd42 bl 106558 <udp_ep0_send_data>
10704c: eafffe55 b 1069a8 <udp_irq+0x30>
udp_ep0_send_zlp();
} else
goto out_stall;
break;
case STD_CLEAR_FEATURE_ZERO:
DEBUGE("CLEAR_FEATURE_ZERO ");
107050: e59f04a8 ldr r0, [pc, #1192] ; 107500 <udp_irq+0xb88>
107054: eb000370 bl 107e1c <debugp>
107058: eaffff8b b 106e8c <udp_irq+0x514>
goto out_stall;
wStatus = 0;
udp_ep0_send_data((char *)&wStatus, sizeof(wStatus));
break;
case STD_GET_STATUS_ENDPOINT:
DEBUGE("GET_STATUS_ENDPOINT(EPidx=%u) ", wIndex&0x0f);
10705c: e59d6000 ldr r6, [sp]
107060: e206600f and r6, r6, #15
107064: e59f0498 ldr r0, [pc, #1176] ; 107504 <udp_irq+0xb8c>
107068: e1a01006 mov r1, r6
10706c: eb00036a bl 107e1c <debugp>
if (upcd.state == USB_STATE_DEFAULT ||
107070: e5d53004 ldrb r3, [r5, #4]
107074: e3530005 cmp r3, #5
107078: 0affff83 beq 106e8c <udp_irq+0x514>
10707c: e59dc000 ldr ip, [sp]
107080: e25c2000 subs r2, ip, #0
107084: 13a02001 movne r2, #1
107088: e3530006 cmp r3, #6
10708c: 13a02000 movne r2, #0
107090: e3520000 cmp r2, #0
107094: 1affff7c bne 106e8c <udp_irq+0x514>
(upcd.state == USB_STATE_ADDRESS && wIndex != 0))
goto out_stall;
wStatus = 0;
wIndex &= 0x0F;
if ((pUDP->UDP_GLBSTATE & AT91C_UDP_CONFG) && (wIndex <= 3)) {
107098: e59a3004 ldr r3, [sl, #4]
10709c: e3130002 tst r3, #2
case STD_GET_STATUS_ENDPOINT:
DEBUGE("GET_STATUS_ENDPOINT(EPidx=%u) ", wIndex&0x0f);
if (upcd.state == USB_STATE_DEFAULT ||
(upcd.state == USB_STATE_ADDRESS && wIndex != 0))
goto out_stall;
wStatus = 0;
1070a0: e1cd20be strh r2, [sp, #14]
wIndex &= 0x0F;
if ((pUDP->UDP_GLBSTATE & AT91C_UDP_CONFG) && (wIndex <= 3)) {
1070a4: 0a000003 beq 1070b8 <udp_irq+0x740>
1070a8: e3560003 cmp r6, #3
wStatus =
(pUDP->UDP_CSR[wIndex] & AT91C_UDP_EPEDS) ? 0 : 1;
1070ac: 9286600c addls r6, r6, #12
1070b0: 979a3106 ldrls r3, [sl, r6, lsl #2]
if (upcd.state == USB_STATE_DEFAULT ||
(upcd.state == USB_STATE_ADDRESS && wIndex != 0))
goto out_stall;
wStatus = 0;
wIndex &= 0x0F;
if ((pUDP->UDP_GLBSTATE & AT91C_UDP_CONFG) && (wIndex <= 3)) {
1070b4: 9a000005 bls 1070d0 <udp_irq+0x758>
wStatus =
(pUDP->UDP_CSR[wIndex] & AT91C_UDP_EPEDS) ? 0 : 1;
udp_ep0_send_data((char *)&wStatus,
sizeof(wStatus));
} else if ((pUDP->UDP_GLBSTATE & AT91C_UDP_FADDEN)
1070b8: e59a3004 ldr r3, [sl, #4]
1070bc: e3130001 tst r3, #1
1070c0: 0affff71 beq 106e8c <udp_irq+0x514>
&& (wIndex == 0)) {
1070c4: e3560000 cmp r6, #0
1070c8: 1affff6f bne 106e8c <udp_irq+0x514>
wStatus =
(pUDP->UDP_CSR[wIndex] & AT91C_UDP_EPEDS) ? 0 : 1;
1070cc: e59a3030 ldr r3, [sl, #48] ; 0x30
1070d0: e3130902 tst r3, #32768 ; 0x8000
1070d4: e28d0010 add r0, sp, #16
1070d8: 13a02000 movne r2, #0
1070dc: 03a02001 moveq r2, #1
1070e0: e16020b2 strh r2, [r0, #-2]!
udp_ep0_send_data((char *)&wStatus,
1070e4: e3a01002 mov r1, #2
1070e8: ebfffd1a bl 106558 <udp_ep0_send_data>
1070ec: eafffe2d b 1069a8 <udp_irq+0x30>
DEBUGE("GET_STATUS_ZERO ");
wStatus = 0;
udp_ep0_send_data((char *)&wStatus, sizeof(wStatus));
break;
case STD_GET_STATUS_INTERFACE:
DEBUGE("GET_STATUS_INTERFACE ");
1070f0: e59f0410 ldr r0, [pc, #1040] ; 107508 <udp_irq+0xb90>
1070f4: eb000348 bl 107e1c <debugp>
if (upcd.state == USB_STATE_DEFAULT ||
1070f8: e5d53004 ldrb r3, [r5, #4]
1070fc: e3530005 cmp r3, #5
107100: 0affff61 beq 106e8c <udp_irq+0x514>
107104: e59de000 ldr lr, [sp]
107108: e25e2000 subs r2, lr, #0
10710c: 13a02001 movne r2, #1
107110: e3530006 cmp r3, #6
107114: 13a02000 movne r2, #0
107118: e3520000 cmp r2, #0
10711c: 1affff5a bne 106e8c <udp_irq+0x514>
(upcd.state == USB_STATE_ADDRESS && wIndex != 0))
goto out_stall;
wStatus = 0;
107120: e28d0010 add r0, sp, #16
107124: e16020b2 strh r2, [r0, #-2]!
udp_ep0_send_data((char *)&wStatus, sizeof(wStatus));
107128: e3a01002 mov r1, #2
10712c: ebfffd09 bl 106558 <udp_ep0_send_data>
107130: eafffe1c b 1069a8 <udp_irq+0x30>
goto out_stall;
udp_ep0_send_data((char *)&(upcd.cur_altsett),
sizeof(upcd.cur_altsett));
break;
case STD_GET_STATUS_ZERO:
DEBUGE("GET_STATUS_ZERO ");
107134: e59f03d0 ldr r0, [pc, #976] ; 10750c <udp_irq+0xb94>
107138: eb000337 bl 107e1c <debugp>
wStatus = 0;
10713c: e28d0010 add r0, sp, #16
107140: e16090b2 strh r9, [r0, #-2]!
udp_ep0_send_data((char *)&wStatus, sizeof(wStatus));
107144: e3a01002 mov r1, #2
107148: ebfffd02 bl 106558 <udp_ep0_send_data>
10714c: eafffe15 b 1069a8 <udp_irq+0x30>
goto out_stall;
/* FIXME: implement this */
goto out_stall;
break;
case STD_SET_FEATURE_INTERFACE:
DEBUGE("SET_FEATURE_INTERFACE ");
107150: e59f03b8 ldr r0, [pc, #952] ; 107510 <udp_irq+0xb98>
107154: eb000330 bl 107e1c <debugp>
if (upcd.state == USB_STATE_ADDRESS &&
107158: e5d50004 ldrb r0, [r5, #4]
10715c: e3500006 cmp r0, #6
107160: 1a000002 bne 107170 <udp_irq+0x7f8>
107164: e59d1000 ldr r1, [sp]
107168: e31100ff tst r1, #255 ; 0xff
10716c: 1affff46 bne 106e8c <udp_irq+0x514>
(wIndex & 0xff) != 0)
goto out_stall;
udp_ep0_send_zlp();
107170: e59fc320 ldr ip, [pc, #800] ; 107498 <udp_irq+0xb20>
107174: e59cc0d8 ldr ip, [ip, #216] ; 0xd8
107178: e1a0e00f mov lr, pc
10717c: e12fff1c bx ip
107180: eafffe08 b 1069a8 <udp_irq+0x30>
/* Handle supported standard device request Cf Table 9-3 in USB
* speciication Rev 1.1 */
switch ((bRequest << 8) | bmRequestType) {
u_int8_t desc_type, desc_index;
case STD_GET_DESCRIPTOR:
DEBUGE("GET_DESCRIPTOR(wValue=0x%04x, wIndex=0x%04x) ",
107184: e59f0388 ldr r0, [pc, #904] ; 107514 <udp_irq+0xb9c>
107188: e59d2000 ldr r2, [sp]
10718c: e1a01008 mov r1, r8
107190: eb000321 bl 107e1c <debugp>
wValue, wIndex);
desc_type = wValue >> 8;
desc_index = wValue & 0xff;
switch (desc_type) {
107194: e1a02428 lsr r2, r8, #8
107198: e2420001 sub r0, r2, #1
10719c: e3500020 cmp r0, #32
1071a0: 979ff100 ldrls pc, [pc, r0, lsl #2]
1071a4: eaffff38 b 106e8c <udp_irq+0x514>
1071a8: 00107290 .word 0x00107290
1071ac: 00107264 .word 0x00107264
1071b0: 00106e8c .word 0x00106e8c
1071b4: 0010722c .word 0x0010722c
1071b8: 00106e8c .word 0x00106e8c
1071bc: 00106e8c .word 0x00106e8c
1071c0: 00106e8c .word 0x00106e8c
1071c4: 00106e8c .word 0x00106e8c
1071c8: 00106e8c .word 0x00106e8c
1071cc: 00106e8c .word 0x00106e8c
1071d0: 00106e8c .word 0x00106e8c
1071d4: 00106e8c .word 0x00106e8c
1071d8: 00106e8c .word 0x00106e8c
1071dc: 00106e8c .word 0x00106e8c
1071e0: 00106e8c .word 0x00106e8c
1071e4: 00106e8c .word 0x00106e8c
1071e8: 00106e8c .word 0x00106e8c
1071ec: 00106e8c .word 0x00106e8c
1071f0: 00106e8c .word 0x00106e8c
1071f4: 00106e8c .word 0x00106e8c
1071f8: 00106e8c .word 0x00106e8c
1071fc: 00106e8c .word 0x00106e8c
107200: 00106e8c .word 0x00106e8c
107204: 00106e8c .word 0x00106e8c
107208: 00106e8c .word 0x00106e8c
10720c: 00106e8c .word 0x00106e8c
107210: 00106e8c .word 0x00106e8c
107214: 00106e8c .word 0x00106e8c
107218: 00106e8c .word 0x00106e8c
10721c: 00106e8c .word 0x00106e8c
107220: 00106e8c .word 0x00106e8c
107224: 00106e8c .word 0x00106e8c
107228: 001072bc .word 0x001072bc
u_int8_t desc_type, desc_index;
case STD_GET_DESCRIPTOR:
DEBUGE("GET_DESCRIPTOR(wValue=0x%04x, wIndex=0x%04x) ",
wValue, wIndex);
desc_type = wValue >> 8;
desc_index = wValue & 0xff;
10722c: e20880ff and r8, r8, #255 ; 0xff
udp_ep0_send_data((const char *) &dfu->dfu_cfg_descriptor->func_dfu,
MIN(sizeof(dfu->dfu_cfg_descriptor->func_dfu), wLength));
break;
case USB_DT_INTERFACE:
/* Return Interface descriptor */
if (desc_index > cfg_descriptor.ucfg.bNumInterfaces)
107230: e3580003 cmp r8, #3
107234: 8affff14 bhi 106e8c <udp_irq+0x514>
goto out_stall;
switch (desc_index) {
107238: e3580001 cmp r8, #1
10723c: 0a00008e beq 10747c <udp_irq+0xb04>
107240: 3a000087 bcc 107464 <udp_irq+0xaec>
107244: e3580002 cmp r8, #2
107248: 1affff0f bne 106e8c <udp_irq+0x514>
&cfg_descriptor.uif_dfu[0],
MIN(sizeof(cfg_descriptor.uif_dfu[0]),
wLength));
break;
case 2:
udp_ep0_send_data((const char *)
10724c: e59d1004 ldr r1, [sp, #4]
107250: e59f02c0 ldr r0, [pc, #704] ; 107518 <udp_irq+0xba0>
107254: e3510009 cmp r1, #9
107258: 23a01009 movcs r1, #9
10725c: ebfffcbd bl 106558 <udp_ep0_send_data>
107260: eafffdd0 b 1069a8 <udp_irq+0x30>
MIN(sizeof(dev_descriptor), wLength));
break;
case USB_DT_CONFIG:
/* Return Configuration Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
107264: e59f322c ldr r3, [pc, #556] ; 107498 <udp_irq+0xb20>
107268: e59300e8 ldr r0, [r3, #232] ; 0xe8
10726c: e590c000 ldr ip, [r0]
107270: e35c0000 cmp ip, #0
107274: 1a00006a bne 107424 <udp_irq+0xaac>
dfu->dfu_cfg_descriptor,
MIN(dfu->dfu_cfg_descriptor->ucfg.wTotalLength,
wLength));
else
#endif
udp_ep0_send_data((const char *) &cfg_descriptor,
107278: e59d1004 ldr r1, [sp, #4]
10727c: e59f0298 ldr r0, [pc, #664] ; 10751c <udp_irq+0xba4>
107280: e3510039 cmp r1, #57 ; 0x39
107284: 23a01039 movcs r1, #57 ; 0x39
107288: ebfffcb2 bl 106558 <udp_ep0_send_data>
10728c: eafffdc5 b 1069a8 <udp_irq+0x30>
desc_index = wValue & 0xff;
switch (desc_type) {
case USB_DT_DEVICE:
/* Return Device Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
107290: e59f3200 ldr r3, [pc, #512] ; 107498 <udp_irq+0xb20>
107294: e593e0e8 ldr lr, [r3, #232] ; 0xe8
107298: e59e1000 ldr r1, [lr]
10729c: e3510000 cmp r1, #0
1072a0: 1a000068 bne 107448 <udp_irq+0xad0>
dfu->dfu_dev_descriptor,
MIN(dfu->dfu_dev_descriptor->bLength,
wLength));
else
#endif
udp_ep0_send_data((const char *) &dev_descriptor,
1072a4: e59d1004 ldr r1, [sp, #4]
1072a8: e59f0270 ldr r0, [pc, #624] ; 107520 <udp_irq+0xba8>
1072ac: e3510012 cmp r1, #18
1072b0: 23a01012 movcs r1, #18
1072b4: ebfffca7 bl 106558 <udp_ep0_send_data>
1072b8: eafffdba b 1069a8 <udp_irq+0x30>
goto out_stall;
#endif
break;
case USB_DT_CS_DEVICE:
/* Return Function descriptor */
udp_ep0_send_data((const char *) &dfu->dfu_cfg_descriptor->func_dfu,
1072bc: e59fc1d4 ldr ip, [pc, #468] ; 107498 <udp_irq+0xb20>
1072c0: e59d1004 ldr r1, [sp, #4]
1072c4: e59c30f0 ldr r3, [ip, #240] ; 0xf0
1072c8: e3510009 cmp r1, #9
1072cc: 23a01009 movcs r1, #9
1072d0: e283001b add r0, r3, #27
1072d4: ebfffc9f bl 106558 <udp_ep0_send_data>
1072d8: eafffdb2 b 1069a8 <udp_irq+0x30>
case STD_CLEAR_FEATURE_ZERO:
DEBUGE("CLEAR_FEATURE_ZERO ");
goto out_stall;
break;
case STD_CLEAR_FEATURE_INTERFACE:
DEBUGP("CLEAR_FEATURE_INTERFACE ");
1072dc: e59f0240 ldr r0, [pc, #576] ; 107524 <udp_irq+0xbac>
1072e0: eb0002cd bl 107e1c <debugp>
udp_ep0_send_zlp();
1072e4: e59bc0d8 ldr ip, [fp, #216] ; 0xd8
1072e8: e1a0e00f mov lr, pc
1072ec: e12fff1c bx ip
1072f0: eafffdac b 1069a8 <udp_irq+0x30>
break;
case STD_CLEAR_FEATURE_ENDPOINT:
DEBUGE("CLEAR_FEATURE_ENDPOINT(EPidx=%u) ", wIndex & 0x0f);
1072f4: e59d6000 ldr r6, [sp]
1072f8: e206600f and r6, r6, #15
1072fc: e59f0224 ldr r0, [pc, #548] ; 107528 <udp_irq+0xbb0>
107300: e1a01006 mov r1, r6
107304: eb0002c4 bl 107e1c <debugp>
if (wValue != USB_ENDPOINT_HALT)
107308: e3580000 cmp r8, #0
10730c: 1afffede bne 106e8c <udp_irq+0x514>
goto out_stall;
wIndex &= 0x0F;
if ((wValue == 0) && wIndex && (wIndex <= 3)) {
107310: e2560000 subs r0, r6, #0
107314: 0afffedc beq 106e8c <udp_irq+0x514>
107318: e3560003 cmp r6, #3
10731c: 8afffeda bhi 106e8c <udp_irq+0x514>
reset_ep(wIndex);
107320: ebfffcf0 bl 1066e8 <reset_ep>
udp_ep0_send_zlp();
107324: e59bc0d8 ldr ip, [fp, #216] ; 0xd8
107328: e1a0e00f mov lr, pc
10732c: e12fff1c bx ip
107330: eafffd9c b 1069a8 <udp_irq+0x30>
goto out_stall;
break;
}
break;
case STD_SET_ADDRESS:
DEBUGE("SET_ADDRESS ");
107334: e59f01f0 ldr r0, [pc, #496] ; 10752c <udp_irq+0xbb4>
107338: eb0002b7 bl 107e1c <debugp>
if (wValue > 127)
10733c: e358007f cmp r8, #127 ; 0x7f
107340: 8afffed1 bhi 106e8c <udp_irq+0x514>
goto out_stall;
switch (upcd.state) {
107344: e5d53004 ldrb r3, [r5, #4]
107348: e3530005 cmp r3, #5
10734c: 0a000013 beq 1073a0 <udp_irq+0xa28>
107350: e3530006 cmp r3, #6
107354: 1afffecc bne 106e8c <udp_irq+0x514>
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
upcd.state = USB_STATE_ADDRESS;
}
break;
case USB_STATE_ADDRESS:
udp_ep0_send_zlp();
107358: e59bc0d8 ldr ip, [fp, #216] ; 0xd8
10735c: e1a0e00f mov lr, pc
107360: e12fff1c bx ip
if (wValue == 0) {
107364: e3580000 cmp r8, #0
upcd.state = USB_STATE_DEFAULT;
107368: 03a01005 moveq r1, #5
} else {
pUDP->UDP_FADDR = (AT91C_UDP_FEN | wValue);
10736c: 13888c01 orrne r8, r8, #256 ; 0x100
}
break;
case USB_STATE_ADDRESS:
udp_ep0_send_zlp();
if (wValue == 0) {
upcd.state = USB_STATE_DEFAULT;
107370: 05c51004 strbeq r1, [r5, #4]
} else {
pUDP->UDP_FADDR = (AT91C_UDP_FEN | wValue);
107374: 158a8008 strne r8, [sl, #8]
107378: eafffd8a b 1069a8 <udp_irq+0x30>
rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
RCTX_STATE_UDP_RCV_BUSY);
if (!rctx) {
/* disable interrupts for now */
pUDP->UDP_IDR = AT91C_UDP_EPINT1;
10737c: e3a0e002 mov lr, #2
107380: e584e014 str lr, [r4, #20]
DEBUGP("NO_RCTX_AVAIL! ");
107384: e59f01a4 ldr r0, [pc, #420] ; 107530 <udp_irq+0xbb8>
107388: eb0002a3 bl 107e1c <debugp>
goto cont_ep2;
10738c: eafffdcf b 106ad0 <udp_irq+0x158>
goto out_stall;
udp_ep0_send_zlp();
break;
case STD_SET_FEATURE_ENDPOINT:
DEBUGE("SET_FEATURE_ENDPOINT ");
if (upcd.state == USB_STATE_ADDRESS &&
107390: e59de000 ldr lr, [sp]
107394: e31e00ff tst lr, #255 ; 0xff
107398: 1afffebb bne 106e8c <udp_irq+0x514>
10739c: eafffe82 b 106dac <udp_irq+0x434>
if (wValue > 127)
goto out_stall;
switch (upcd.state) {
case USB_STATE_DEFAULT:
udp_ep0_send_zlp();
1073a0: e59bc0d8 ldr ip, [fp, #216] ; 0xd8
1073a4: e1a0e00f mov lr, pc
1073a8: e12fff1c bx ip
if (wValue == 0) {
1073ac: e3580000 cmp r8, #0
1073b0: 0afffd7c beq 1069a8 <udp_irq+0x30>
/* do nothing */
} else {
pUDP->UDP_FADDR = (AT91C_UDP_FEN | wValue);
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
1073b4: e3a02001 mov r2, #1
case USB_STATE_DEFAULT:
udp_ep0_send_zlp();
if (wValue == 0) {
/* do nothing */
} else {
pUDP->UDP_FADDR = (AT91C_UDP_FEN | wValue);
1073b8: e3888c01 orr r8, r8, #256 ; 0x100
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
upcd.state = USB_STATE_ADDRESS;
1073bc: e59f00d0 ldr r0, [pc, #208] ; 107494 <udp_irq+0xb1c>
case USB_STATE_DEFAULT:
udp_ep0_send_zlp();
if (wValue == 0) {
/* do nothing */
} else {
pUDP->UDP_FADDR = (AT91C_UDP_FEN | wValue);
1073c0: e58a8008 str r8, [sl, #8]
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
1073c4: e58a2004 str r2, [sl, #4]
upcd.state = USB_STATE_ADDRESS;
1073c8: e3a02006 mov r2, #6
1073cc: e5c02004 strb r2, [r0, #4]
1073d0: eafffd74 b 1069a8 <udp_irq+0x30>
if (upcd.state != USB_STATE_ADDRESS &&
upcd.state != USB_STATE_CONFIGURED) {
goto out_stall;
}
if ((wValue & 0xff) == 0) {
DEBUGE("VALUE==0 ");
1073d4: e59f0158 ldr r0, [pc, #344] ; 107534 <udp_irq+0xbbc>
1073d8: eb00028f bl 107e1c <debugp>
upcd.state = USB_STATE_ADDRESS;
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
pUDP->UDP_CSR[1] = 0;
1073dc: e3a00000 mov r0, #0
upcd.state != USB_STATE_CONFIGURED) {
goto out_stall;
}
if ((wValue & 0xff) == 0) {
DEBUGE("VALUE==0 ");
upcd.state = USB_STATE_ADDRESS;
1073e0: e3a01006 mov r1, #6
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
1073e4: e3a02001 mov r2, #1
upcd.state != USB_STATE_CONFIGURED) {
goto out_stall;
}
if ((wValue & 0xff) == 0) {
DEBUGE("VALUE==0 ");
upcd.state = USB_STATE_ADDRESS;
1073e8: e5c51004 strb r1, [r5, #4]
pUDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
1073ec: e58a2004 str r2, [sl, #4]
pUDP->UDP_CSR[1] = 0;
1073f0: e58a0034 str r0, [sl, #52] ; 0x34
pUDP->UDP_CSR[2] = 0;
1073f4: e58a0038 str r0, [sl, #56] ; 0x38
pUDP->UDP_CSR[3] = 0;
1073f8: e58a003c str r0, [sl, #60] ; 0x3c
1073fc: eafffee9 b 106fa8 <udp_irq+0x630>
default:
DEBUGE("DEFAULT(req=0x%02x, type=0x%02x) ",
bRequest, bmRequestType);
#ifdef CONFIG_DFU
if ((bmRequestType & 0x3f) == USB_TYPE_DFU) {
dfu->dfu_ep0_handler(bmRequestType, bRequest, wValue,
107400: e1a00006 mov r0, r6
107404: e1a01007 mov r1, r7
107408: e1a02008 mov r2, r8
10740c: e59d3004 ldr r3, [sp, #4]
107410: e59fc080 ldr ip, [pc, #128] ; 107498 <udp_irq+0xb20>
107414: e59cc0e0 ldr ip, [ip, #224] ; 0xe0
107418: e1a0e00f mov lr, pc
10741c: e12fff1c bx ip
107420: eafffd60 b 1069a8 <udp_irq+0x30>
case USB_DT_CONFIG:
/* Return Configuration Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
udp_ep0_send_data((const char *)
dfu->dfu_cfg_descriptor,
107424: e59300f0 ldr r0, [r3, #240] ; 0xf0
MIN(dfu->dfu_cfg_descriptor->ucfg.wTotalLength,
107428: e5d0e002 ldrb lr, [r0, #2]
10742c: e5d01003 ldrb r1, [r0, #3]
break;
case USB_DT_CONFIG:
/* Return Configuration Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
udp_ep0_send_data((const char *)
107430: e59d2004 ldr r2, [sp, #4]
dfu->dfu_cfg_descriptor,
MIN(dfu->dfu_cfg_descriptor->ucfg.wTotalLength,
107434: e18e1401 orr r1, lr, r1, lsl #8
break;
case USB_DT_CONFIG:
/* Return Configuration Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
udp_ep0_send_data((const char *)
107438: e1520001 cmp r2, r1
10743c: 31a01002 movcc r1, r2
107440: ebfffc44 bl 106558 <udp_ep0_send_data>
107444: eafffd57 b 1069a8 <udp_irq+0x30>
case USB_DT_DEVICE:
/* Return Device Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
udp_ep0_send_data((const char *)
dfu->dfu_dev_descriptor,
107448: e59300ec ldr r0, [r3, #236] ; 0xec
switch (desc_type) {
case USB_DT_DEVICE:
/* Return Device Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
udp_ep0_send_data((const char *)
10744c: e59d3004 ldr r3, [sp, #4]
dfu->dfu_dev_descriptor,
MIN(dfu->dfu_dev_descriptor->bLength,
107450: e5d01000 ldrb r1, [r0]
switch (desc_type) {
case USB_DT_DEVICE:
/* Return Device Descriptor */
#ifdef CONFIG_DFU
if (*dfu->dfu_state != DFU_STATE_appIDLE)
udp_ep0_send_data((const char *)
107454: e1530001 cmp r3, r1
107458: 31a01003 movcc r1, r3
10745c: ebfffc3d bl 106558 <udp_ep0_send_data>
107460: eafffd50 b 1069a8 <udp_irq+0x30>
/* Return Interface descriptor */
if (desc_index > cfg_descriptor.ucfg.bNumInterfaces)
goto out_stall;
switch (desc_index) {
case 0:
udp_ep0_send_data((const char *)
107464: e59d1004 ldr r1, [sp, #4]
107468: e59f00c8 ldr r0, [pc, #200] ; 107538 <udp_irq+0xbc0>
10746c: e3510009 cmp r1, #9
107470: 23a01009 movcs r1, #9
107474: ebfffc37 bl 106558 <udp_ep0_send_data>
107478: eafffd4a b 1069a8 <udp_irq+0x30>
MIN(sizeof(cfg_descriptor.uif),
wLength));
break;
#ifdef CONFIG_DFU
case 1:
udp_ep0_send_data((const char *)
10747c: e59d1004 ldr r1, [sp, #4]
107480: e59f00b4 ldr r0, [pc, #180] ; 10753c <udp_irq+0xbc4>
107484: e3510009 cmp r1, #9
107488: 23a01009 movcs r1, #9
10748c: ebfffc31 bl 106558 <udp_ep0_send_data>
107490: eafffd44 b 1069a8 <udp_irq+0x30>
107494: 0020030c .word 0x0020030c
107498: 00103f00 .word 0x00103f00
10749c: 0010a704 .word 0x0010a704
1074a0: 0010a740 .word 0x0010a740
1074a4: 0010a758 .word 0x0010a758
1074a8: 0010a77c .word 0x0010a77c
1074ac: 00000301 .word 0x00000301
1074b0: 00000302 .word 0x00000302
1074b4: 0010a884 .word 0x0010a884
1074b8: 0010a72c .word 0x0010a72c
1074bc: 0010a720 .word 0x0010a720
1074c0: 0010a710 .word 0x0010a710
1074c4: 0010a748 .word 0x0010a748
1074c8: 0010a900 .word 0x0010a900
1074cc: 0010a924 .word 0x0010a924
1074d0: 00200080 .word 0x00200080
1074d4: 0010a770 .word 0x0010a770
1074d8: 00000102 .word 0x00000102
1074dc: 0010a858 .word 0x0010a858
1074e0: 00000a81 .word 0x00000a81
1074e4: 0010a7cc .word 0x0010a7cc
1074e8: 0010a7e4 .word 0x0010a7e4
1074ec: 0010a7f0 .word 0x0010a7f0
1074f0: 00200311 .word 0x00200311
1074f4: 0010a8f0 .word 0x0010a8f0
1074f8: 0010a7fc .word 0x0010a7fc
1074fc: 00200313 .word 0x00200313
107500: 0010a89c .word 0x0010a89c
107504: 0010a838 .word 0x0010a838
107508: 0010a820 .word 0x0010a820
10750c: 0010a80c .word 0x0010a80c
107510: 0010a86c .word 0x0010a86c
107514: 0010a78c .word 0x0010a78c
107518: 0010a664 .word 0x0010a664
10751c: 0010a634 .word 0x0010a634
107520: 0010a620 .word 0x0010a620
107524: 0010a8b0 .word 0x0010a8b0
107528: 0010a8cc .word 0x0010a8cc
10752c: 0010a7bc .word 0x0010a7bc
107530: 0010a930 .word 0x0010a930
107534: 0010a7d8 .word 0x0010a7d8
107538: 0010a63d .word 0x0010a63d
10753c: 0010a65b .word 0x0010a65b
00107540 <udp_unthrottle>:
static void udp_ep0_handler(void);
void udp_unthrottle(void)
{
AT91PS_UDP pUDP = upcd.pUdp;
107540: e59f000c ldr r0, [pc, #12] ; 107554 <udp_unthrottle+0x14>
107544: e5903000 ldr r3, [r0]
pUDP->UDP_IER = AT91C_UDP_EPINT1;
107548: e3a02002 mov r2, #2
10754c: e5832010 str r2, [r3, #16]
}
107550: e12fff1e bx lr
107554: 0020030c .word 0x0020030c
00107558 <udp_refill_ep>:
return 1;
}
int udp_refill_ep(int ep)
{
107558: e92d4010 push {r4, lr}
unsigned long flags;
int ret;
local_irq_save(flags);
10755c: e10f4000 mrs r4, CPSR
107560: e3843080 orr r3, r4, #128 ; 0x80
107564: e121f003 msr CPSR_c, r3
ret = __udp_refill_ep(ep);
107568: ebfffc8a bl 106798 <__udp_refill_ep>
local_irq_restore(flags);
10756c: e121f004 msr CPSR_c, r4
return ret;
}
107570: e8bd4010 pop {r4, lr}
107574: e12fff1e bx lr
00107578 <udp_pullup_on>:
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107578: e3e03c0b mvn r3, #2816 ; 0xb00
10757c: e3a00501 mov r0, #4194304 ; 0x400000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
107580: e3a02801 mov r2, #65536 ; 0x10000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107584: e50300cf str r0, [r3, #-207] ; 0xffffff31
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
107588: e50320cb str r2, [r3, #-203] ; 0xffffff35
{
#ifdef PCD
AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPCD_PIO_UDP_PUP);
#endif
AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPCD_PIO_UDP_PUPv4);
}
10758c: e12fff1e bx lr
00107590 <udp_pullup_off>:
107590: e3e03c0b mvn r3, #2816 ; 0xb00
107594: e3a00501 mov r0, #4194304 ; 0x400000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107598: e3a02801 mov r2, #65536 ; 0x10000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
10759c: e50300cb str r0, [r3, #-203] ; 0xffffff35
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
1075a0: e50320cf str r2, [r3, #-207] ; 0xffffff31
{
#ifdef PCD
AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPCD_PIO_UDP_PUP);
#endif
AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPCD_PIO_UDP_PUPv4);
}
1075a4: e12fff1e bx lr
001075a8 <udp_open>:
/* Open USB Device Port */
void udp_open(void)
{
1075a8: e92d4030 push {r4, r5, lr}
DEBUGPCRF("entering");
1075ac: e59f0084 ldr r0, [pc, #132] ; 107638 <udp_open+0x90>
AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPCD_PIO_UDP_PUPv4);
}
/* Open USB Device Port */
void udp_open(void)
{
1075b0: e24dd00c sub sp, sp, #12
DEBUGPCRF("entering");
1075b4: e59f1080 ldr r1, [pc, #128] ; 10763c <udp_open+0x94>
1075b8: e3a02f79 mov r2, #484 ; 0x1e4
udp_init();
1075bc: e59f407c ldr r4, [pc, #124] ; 107640 <udp_open+0x98>
}
/* Open USB Device Port */
void udp_open(void)
{
DEBUGPCRF("entering");
1075c0: eb000215 bl 107e1c <debugp>
udp_init();
1075c4: e594c0d0 ldr ip, [r4, #208] ; 0xd0
1075c8: e1a0e00f mov lr, pc
1075cc: e12fff1c bx ip
upcd.pUdp = AT91C_BASE_UDP;
1075d0: e59fc06c ldr ip, [pc, #108] ; 107644 <udp_open+0x9c>
upcd.cur_config = 0;
upcd.cur_rcv_bank = AT91C_UDP_RX_DATA_BK0;
1075d4: e3a0e002 mov lr, #2
/* Open USB Device Port */
void udp_open(void)
{
DEBUGPCRF("entering");
udp_init();
upcd.pUdp = AT91C_BASE_UDP;
1075d8: e59f5068 ldr r5, [pc, #104] ; 107648 <udp_open+0xa0>
upcd.cur_config = 0;
upcd.cur_rcv_bank = AT91C_UDP_RX_DATA_BK0;
1075dc: e58ce008 str lr, [ip, #8]
/* This should start with USB_STATE_NOTATTACHED, but we're a pure
* bus powered device and thus start with powered */
upcd.state = USB_STATE_POWERED;
1075e0: e5cce004 strb lr, [ip, #4]
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_UDP,
1075e4: e1a0200e mov r2, lr
void udp_open(void)
{
DEBUGPCRF("entering");
udp_init();
upcd.pUdp = AT91C_BASE_UDP;
upcd.cur_config = 0;
1075e8: e3a04000 mov r4, #0
upcd.cur_rcv_bank = AT91C_UDP_RX_DATA_BK0;
/* This should start with USB_STATE_NOTATTACHED, but we're a pure
* bus powered device and thus start with powered */
upcd.state = USB_STATE_POWERED;
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_UDP,
1075ec: e59fe058 ldr lr, [pc, #88] ; 10764c <udp_open+0xa4>
/* Open USB Device Port */
void udp_open(void)
{
DEBUGPCRF("entering");
udp_init();
upcd.pUdp = AT91C_BASE_UDP;
1075f0: e58c5000 str r5, [ip]
upcd.cur_config = 0;
1075f4: e5cc4005 strb r4, [ip, #5]
upcd.cur_rcv_bank = AT91C_UDP_RX_DATA_BK0;
/* This should start with USB_STATE_NOTATTACHED, but we're a pure
* bus powered device and thus start with powered */
upcd.state = USB_STATE_POWERED;
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_UDP,
1075f8: e3a0100b mov r1, #11
1075fc: e1a03004 mov r3, r4
107600: e59f0048 ldr r0, [pc, #72] ; 107650 <udp_open+0xa8>
107604: e58de000 str lr, [sp]
107608: ebfff3df bl 10458c <AT91F_AIC_ConfigureIt>
10760c: e3e03c0b mvn r3, #2816 ; 0xb00
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
107610: e3a01b02 mov r1, #2048 ; 0x800
107614: e3e0cc0f mvn ip, #3840 ; 0xf00
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107618: e3a00501 mov r0, #4194304 ; 0x400000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
10761c: e3a02801 mov r2, #65536 ; 0x10000
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
107620: e58c1021 str r1, [ip, #33] ; 0x21
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107624: e50300cf str r0, [r3, #-207] ; 0xffffff31
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
107628: e50320cb str r2, [r3, #-203] ; 0xffffff35
/* End-of-Bus-Reset is always enabled */
/* Set the Pull up resistor */
udp_pullup_on();
}
10762c: e28dd00c add sp, sp, #12
107630: e8bd4030 pop {r4, r5, lr}
107634: e12fff1e bx lr
107638: 0010a940 .word 0x0010a940
10763c: 0010a670 .word 0x0010a670
107640: 00103f00 .word 0x00103f00
107644: 0020030c .word 0x0020030c
107648: fffb0000 .word 0xfffb0000
10764c: 00106978 .word 0x00106978
107650: fffff000 .word 0xfffff000
00107654 <udp_reset>:
void udp_reset(void)
{
107654: e24dd008 sub sp, sp, #8
107658: e3e01c0b mvn r1, #2816 ; 0xb00
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
10765c: e3a02801 mov r2, #65536 ; 0x10000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
107660: e3a0c501 mov ip, #4194304 ; 0x400000
volatile int i;
udp_pullup_off();
for (i = 0; i < 0xffff; i++)
107664: e3a00000 mov r0, #0
107668: e501c0cb str ip, [r1, #-203] ; 0xffffff35
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
10766c: e50120cf str r2, [r1, #-207] ; 0xffffff31
107670: e58d0004 str r0, [sp, #4]
107674: e59d3004 ldr r3, [sp, #4]
107678: e2422002 sub r2, r2, #2
10767c: e1530002 cmp r3, r2
107680: ca000005 bgt 10769c <udp_reset+0x48>
107684: e59d1004 ldr r1, [sp, #4]
107688: e2810001 add r0, r1, #1
10768c: e58d0004 str r0, [sp, #4]
107690: e59d3004 ldr r3, [sp, #4]
107694: e1530002 cmp r3, r2
107698: dafffff9 ble 107684 <udp_reset+0x30>
10769c: e3e0cc0b mvn ip, #2816 ; 0xb00
1076a0: e3a03501 mov r3, #4194304 ; 0x400000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
1076a4: e3a02801 mov r2, #65536 ; 0x10000
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
1076a8: e50c30cf str r3, [ip, #-207] ; 0xffffff31
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
1076ac: e50c20cb str r2, [ip, #-203] ; 0xffffff35
;
udp_pullup_on();
}
1076b0: e28dd008 add sp, sp, #8
1076b4: e12fff1e bx lr
001076b8 <fifo_available>:
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
1076b8: e1d020b2 ldrh r2, [r0, #2]
1076bc: e1d030b4 ldrh r3, [r0, #4]
1076c0: e1520003 cmp r2, r3
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
1076c4: 91d000b0 ldrhls r0, [r0]
1076c8: 90822000 addls r2, r2, r0
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
1076cc: 80630002 rsbhi r0, r3, r2
else
return (fifo->size - fifo->consumer) + fifo->producer;
1076d0: 90630002 rsbls r0, r3, r2
}
1076d4: e12fff1e bx lr
001076d8 <fifo_check_water>:
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
1076d8: e1d010b2 ldrh r1, [r0, #2]
1076dc: e1d030b4 ldrh r3, [r0, #4]
1076e0: e1510003 cmp r1, r3
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
1076e4: 91d0c0b0 ldrhls ip, [r0]
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
1076e8: 81d0c0b0 ldrhhi ip, [r0]
else
return (fifo->size - fifo->consumer) + fifo->producer;
1076ec: 9081100c addls r1, r1, ip
void fifo_check_water(struct fifo *fifo)
{
int avail = fifo_available(fifo);
if (avail <= fifo->watermark)
1076f0: e1d020b6 ldrh r2, [r0, #6]
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
1076f4: 80631001 rsbhi r1, r3, r1
else
return (fifo->size - fifo->consumer) + fifo->producer;
1076f8: 90631001 rsbls r1, r3, r1
void fifo_check_water(struct fifo *fifo)
{
int avail = fifo_available(fifo);
if (avail <= fifo->watermark)
fifo->irq |= FIFO_IRQ_LO;
1076fc: e5d03008 ldrb r3, [r0, #8]
void fifo_check_water(struct fifo *fifo)
{
int avail = fifo_available(fifo);
if (avail <= fifo->watermark)
107700: e1520001 cmp r2, r1
fifo->irq |= FIFO_IRQ_LO;
else
fifo->irq &= FIFO_IRQ_LO;
if (fifo->size - avail >= fifo->watermark)
107704: e061100c rsb r1, r1, ip
void fifo_check_water(struct fifo *fifo)
{
int avail = fifo_available(fifo);
if (avail <= fifo->watermark)
fifo->irq |= FIFO_IRQ_LO;
107708: a3833001 orrge r3, r3, #1
else
fifo->irq &= FIFO_IRQ_LO;
10770c: b2033001 andlt r3, r3, #1
if (fifo->size - avail >= fifo->watermark)
107710: e1520001 cmp r2, r1
int avail = fifo_available(fifo);
if (avail <= fifo->watermark)
fifo->irq |= FIFO_IRQ_LO;
else
fifo->irq &= FIFO_IRQ_LO;
107714: e5c03008 strb r3, [r0, #8]
if (fifo->size - avail >= fifo->watermark)
fifo->irq |= FIFO_IRQ_HI;
107718: d3833002 orrle r3, r3, #2
else
fifo->irq &= FIFO_IRQ_HI;
10771c: c2033002 andgt r3, r3, #2
107720: e5c03008 strb r3, [r0, #8]
107724: e12fff1e bx lr
00107728 <fifo_check_raise_int>:
}
void fifo_check_raise_int(struct fifo *fifo)
{
if (fifo->irq & fifo->irq_en)
107728: e5d01008 ldrb r1, [r0, #8]
10772c: e5d02009 ldrb r2, [r0, #9]
107730: e1110002 tst r1, r2
else
fifo->irq &= FIFO_IRQ_HI;
}
void fifo_check_raise_int(struct fifo *fifo)
{
107734: e92d4008 push {r3, lr}
if (fifo->irq & fifo->irq_en)
fifo->callback(fifo, fifo->irq, fifo->cb_data);
107738: 15902010 ldrne r2, [r0, #16]
10773c: 1590c00c ldrne ip, [r0, #12]
107740: 11a0e00f movne lr, pc
107744: 112fff1c bxne ip
}
107748: e8bd4008 pop {r3, lr}
10774c: e12fff1e bx lr
00107750 <fifo_data_put>:
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
107750: e92d45f8 push {r3, r4, r5, r6, r7, r8, sl, lr}
107754: e1a04000 mov r4, r0
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
107758: e1d430b4 ldrh r3, [r4, #4]
10775c: e1d000b2 ldrh r0, [r0, #2]
107760: e1500003 cmp r0, r3
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
107764: 91d470b0 ldrhls r7, [r4]
fifo->callback(fifo, fifo->irq, fifo->cb_data);
}
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
107768: e1a06002 mov r6, r2
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
10776c: 90802007 addls r2, r0, r7
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
107770: 80632000 rsbhi r2, r3, r0
else
return (fifo->size - fifo->consumer) + fifo->producer;
107774: 90632002 rsbls r2, r3, r2
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
107778: 81d470b0 ldrhhi r7, [r4]
}
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
if (len > fifo_available(fifo)) {
10777c: e1510002 cmp r1, r2
fifo->callback(fifo, fifo->irq, fifo->cb_data);
}
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
107780: e1a05001 mov r5, r1
if (len > fifo_available(fifo)) {
107784: da000008 ble 1077ac <fifo_data_put+0x5c>
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
107788: e1500003 cmp r0, r3
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
if (len > fifo_available(fifo)) {
len = fifo_available(fifo);
fifo->irq |= FIFO_IRQ_OFLOW;
10778c: e5d41008 ldrb r1, [r4, #8]
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
107790: 90875000 addls r5, r7, r0
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
107794: 80635000 rsbhi r5, r3, r0
else
return (fifo->size - fifo->consumer) + fifo->producer;
107798: 90635005 rsbls r5, r3, r5
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
if (len > fifo_available(fifo)) {
len = fifo_available(fifo);
fifo->irq |= FIFO_IRQ_OFLOW;
10779c: e3812004 orr r2, r1, #4
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
if (len > fifo_available(fifo)) {
len = fifo_available(fifo);
1077a0: e1a05805 lsl r5, r5, #16
fifo->irq |= FIFO_IRQ_OFLOW;
1077a4: e5c42008 strb r2, [r4, #8]
u_int16_t fifo_data_put(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
if (len > fifo_available(fifo)) {
len = fifo_available(fifo);
1077a8: e1a05825 lsr r5, r5, #16
fifo->irq |= FIFO_IRQ_OFLOW;
}
if (len + fifo->producer <= fifo->size) {
1077ac: e0853000 add r3, r5, r0
1077b0: e1530007 cmp r3, r7
1077b4: da000012 ble 107804 <fifo_data_put+0xb4>
fifo->producer += len;
} else {
/* difficult: wrap around */
u_int16_t chunk_len;
chunk_len = fifo->size - fifo->producer;
1077b8: e0608007 rsb r8, r0, r7
1077bc: e1a07808 lsl r7, r8, #16
1077c0: e1a07827 lsr r7, r7, #16
memcpy(&fifo->data[fifo->producer], data, chunk_len);
1077c4: e284a014 add sl, r4, #20
1077c8: e1a01006 mov r1, r6
1077cc: e1a02007 mov r2, r7
memcpy(&fifo->data[0], data + chunk_len, len - chunk_len);
1077d0: e0678005 rsb r8, r7, r5
} else {
/* difficult: wrap around */
u_int16_t chunk_len;
chunk_len = fifo->size - fifo->producer;
memcpy(&fifo->data[fifo->producer], data, chunk_len);
1077d4: e08a0000 add r0, sl, r0
1077d8: eb000a4b bl 10a10c <memcpy>
memcpy(&fifo->data[0], data + chunk_len, len - chunk_len);
1077dc: e1a0000a mov r0, sl
1077e0: e0861007 add r1, r6, r7
1077e4: e1a02008 mov r2, r8
1077e8: eb000a47 bl 10a10c <memcpy>
fifo->producer = len - chunk_len;
1077ec: e1c480b2 strh r8, [r4, #2]
}
fifo_check_water(fifo);
1077f0: e1a00004 mov r0, r4
1077f4: ebffffb7 bl 1076d8 <fifo_check_water>
return len;
}
1077f8: e1a00005 mov r0, r5
1077fc: e8bd45f8 pop {r3, r4, r5, r6, r7, r8, sl, lr}
107800: e12fff1e bx lr
fifo->irq |= FIFO_IRQ_OFLOW;
}
if (len + fifo->producer <= fifo->size) {
/* easy case */
memcpy(&fifo->data[fifo->producer], data, len);
107804: e284e014 add lr, r4, #20
107808: e08e0000 add r0, lr, r0
10780c: e1a01006 mov r1, r6
107810: e1a02005 mov r2, r5
107814: eb000a3c bl 10a10c <memcpy>
fifo->producer += len;
107818: e1d4c0b2 ldrh ip, [r4, #2]
10781c: e085000c add r0, r5, ip
107820: e1c400b2 strh r0, [r4, #2]
107824: eafffff1 b 1077f0 <fifo_data_put+0xa0>
00107828 <fifo_data_get>:
return len;
}
u_int16_t fifo_data_get(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
107828: e92d41f0 push {r4, r5, r6, r7, r8, lr}
10782c: e1a04000 mov r4, r0
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
107830: e1d430b4 ldrh r3, [r4, #4]
107834: e1d000b2 ldrh r0, [r0, #2]
107838: e1500003 cmp r0, r3
return len;
}
u_int16_t fifo_data_get(struct fifo *fifo, u_int16_t len, u_int8_t *data)
{
10783c: e1a07002 mov r7, r2
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
107840: 9a00000e bls 107880 <fifo_data_get+0x58>
return fifo->producer - fifo->consumer;
107844: e0630000 rsb r0, r3, r0
#define FIFO_IRQ_OFLOW 0x04
/* returns number of data bytes present in the fifo */
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
107848: e1a05800 lsl r5, r0, #16
10784c: e1a05825 lsr r5, r5, #16
107850: e1510005 cmp r1, r5
107854: 31a05001 movcc r5, r1
if (avail < len)
len = avail;
if (fifo->producer > fifo->consumer) {
/* easy case */
memcpy(data, &fifo->data[fifo->consumer], len);
107858: e2841014 add r1, r4, #20
10785c: e1a00002 mov r0, r2
107860: e0811003 add r1, r1, r3
107864: e1a02005 mov r2, r5
107868: eb000a27 bl 10a10c <memcpy>
u_int16_t chunk_len = fifo->size - fifo->consumer;
memcpy(data, &fifo->data[fifo->consumer], chunk_len);
memcpy(data+chunk_len, &fifo->data[0], len - chunk_len);
}
fifo_check_water(fifo);
10786c: e1a00004 mov r0, r4
107870: ebffff98 bl 1076d8 <fifo_check_water>
return len;
}
107874: e1a00005 mov r0, r5
107878: e8bd41f0 pop {r4, r5, r6, r7, r8, lr}
10787c: e12fff1e bx lr
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
107880: e1a06004 mov r6, r4
107884: e0d621b4 ldrh r2, [r6], #20
107888: e0805002 add r5, r0, r2
10788c: e063e005 rsb lr, r3, r5
if (fifo->producer > fifo->consumer) {
/* easy case */
memcpy(data, &fifo->data[fifo->consumer], len);
} else {
/* difficult case: wrap */
u_int16_t chunk_len = fifo->size - fifo->consumer;
107890: e063c002 rsb ip, r3, r2
107894: e1a0880c lsl r8, ip, #16
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
107898: e1a0280e lsl r2, lr, #16
if (fifo->producer > fifo->consumer) {
/* easy case */
memcpy(data, &fifo->data[fifo->consumer], len);
} else {
/* difficult case: wrap */
u_int16_t chunk_len = fifo->size - fifo->consumer;
10789c: e1a08828 lsr r8, r8, #16
int fifo_available(struct fifo *fifo)
{
if (fifo->producer > fifo->consumer)
return fifo->producer - fifo->consumer;
else
return (fifo->size - fifo->consumer) + fifo->producer;
1078a0: e1a05822 lsr r5, r2, #16
1078a4: e1550001 cmp r5, r1
1078a8: 21a05001 movcs r5, r1
/* easy case */
memcpy(data, &fifo->data[fifo->consumer], len);
} else {
/* difficult case: wrap */
u_int16_t chunk_len = fifo->size - fifo->consumer;
memcpy(data, &fifo->data[fifo->consumer], chunk_len);
1078ac: e1a02008 mov r2, r8
1078b0: e0861003 add r1, r6, r3
1078b4: e1a00007 mov r0, r7
1078b8: eb000a13 bl 10a10c <memcpy>
memcpy(data+chunk_len, &fifo->data[0], len - chunk_len);
1078bc: e0870008 add r0, r7, r8
1078c0: e1a01006 mov r1, r6
1078c4: e0682005 rsb r2, r8, r5
1078c8: eb000a0f bl 10a10c <memcpy>
1078cc: eaffffe6 b 10786c <fifo_data_get+0x44>
001078d0 <fifo_init>:
}
int fifo_init(struct fifo *fifo, u_int16_t size,
void (*cb)(struct fifo *fifo, u_int8_t event, void *data), void *cb_data)
{
if (size > sizeof(fifo->data))
1078d0: e3510b01 cmp r1, #1024 ; 0x400
return len;
}
int fifo_init(struct fifo *fifo, u_int16_t size,
void (*cb)(struct fifo *fifo, u_int8_t event, void *data), void *cb_data)
{
1078d4: e92d40f8 push {r3, r4, r5, r6, r7, lr}
1078d8: e1a04000 mov r4, r0
1078dc: e1a05001 mov r5, r1
1078e0: e1a06002 mov r6, r2
1078e4: e1a07003 mov r7, r3
if (size > sizeof(fifo->data))
return -EINVAL;
1078e8: 83e00015 mvnhi r0, #21
}
int fifo_init(struct fifo *fifo, u_int16_t size,
void (*cb)(struct fifo *fifo, u_int8_t event, void *data), void *cb_data)
{
if (size > sizeof(fifo->data))
1078ec: 8a00000b bhi 107920 <fifo_init+0x50>
return -EINVAL;
memset(fifo->data, 0, sizeof(fifo->data));
1078f0: e2800014 add r0, r0, #20
1078f4: e3a01000 mov r1, #0
1078f8: e3a02b01 mov r2, #1024 ; 0x400
1078fc: eb000a72 bl 10a2cc <memset>
fifo->size = size;
fifo->producer = fifo->consumer = 0;
107900: e3a03000 mov r3, #0
{
if (size > sizeof(fifo->data))
return -EINVAL;
memset(fifo->data, 0, sizeof(fifo->data));
fifo->size = size;
107904: e1c450b0 strh r5, [r4]
fifo->producer = fifo->consumer = 0;
107908: e1c430b4 strh r3, [r4, #4]
10790c: e1c430b2 strh r3, [r4, #2]
fifo->watermark = 0;
107910: e1c430b6 strh r3, [r4, #6]
fifo->callback = cb;
107914: e584600c str r6, [r4, #12]
fifo->cb_data = cb_data;
107918: e5847010 str r7, [r4, #16]
return 0;
10791c: e3a00000 mov r0, #0
}
107920: e8bd40f8 pop {r3, r4, r5, r6, r7, lr}
107924: e12fff1e bx lr
00107928 <__rb_flush>:
return 0;
}
static void __rb_flush(void)
{
107928: e92d01f0 push {r4, r5, r6, r7, r8}
/* pull one char out of debug ring buffer */
static int dbgu_rb_pull(char *ret)
{
unsigned long flags;
local_irq_save(flags);
10792c: e10fc000 mrs ip, CPSR
107930: e38c3080 orr r3, ip, #128 ; 0x80
107934: e121f003 msr CPSR_c, r3
if (dbgu.next_outbyte == dbgu.next_inbyte) {
107938: e59f107c ldr r1, [pc, #124] ; 1079bc <__rb_flush+0x94>
10793c: e59f007c ldr r0, [pc, #124] ; 1079c0 <__rb_flush+0x98>
107940: e3a05a01 mov r5, #4096 ; 0x1000
107944: e7913000 ldr r3, [r1, r0]
107948: e7912005 ldr r2, [r1, r5]
10794c: e1530002 cmp r3, r2
107950: 0a000016 beq 1079b0 <__rb_flush+0x88>
//* \brief Return 1 if a character can be written in US_THR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_TxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_TXRDY);
107954: e3e02c0d mvn r2, #3328 ; 0xd00
107958: e0817005 add r7, r1, r5
return -1;
}
*ret = *dbgu.next_outbyte;
dbgu.next_outbyte++;
10795c: e1a08001 mov r8, r1
107960: e1a06002 mov r6, r2
if (dbgu.next_outbyte == dbgu.next_inbyte) {
local_irq_restore(flags);
return -1;
}
*ret = *dbgu.next_outbyte;
107964: e4d34001 ldrb r4, [r3], #1
dbgu.next_outbyte++;
if (dbgu.next_outbyte == &dbgu.buf[0]+sizeof(dbgu.buf)) {
107968: e1530007 cmp r3, r7
return -1;
}
*ret = *dbgu.next_outbyte;
dbgu.next_outbyte++;
10796c: e7813000 str r3, [r1, r0]
if (dbgu.next_outbyte == &dbgu.buf[0]+sizeof(dbgu.buf)) {
//AT91F_DBGU_Printk("WRAP DURING PULL\r\n");
dbgu.next_outbyte = &dbgu.buf[0];
107970: 07888000 streq r8, [r8, r0]
}
*ret = *dbgu.next_outbyte;
dbgu.next_outbyte++;
if (dbgu.next_outbyte == &dbgu.buf[0]+sizeof(dbgu.buf)) {
107974: 0a000001 beq 107980 <__rb_flush+0x58>
//AT91F_DBGU_Printk("WRAP DURING PULL\r\n");
dbgu.next_outbyte = &dbgu.buf[0];
} else if (dbgu.next_outbyte > &dbgu.buf[0]+sizeof(dbgu.buf)) {
//AT91F_DBGU_Printk("OUTBYTE > END_OF_BUF!!\r\n");
dbgu.next_outbyte -= sizeof(dbgu.buf);
107978: 82433a01 subhi r3, r3, #4096 ; 0x1000
10797c: 87883000 strhi r3, [r8, r0]
}
local_irq_restore(flags);
107980: e121f00c msr CPSR_c, ip
107984: e51230eb ldr r3, [r2, #-235] ; 0xffffff15
static void __rb_flush(void)
{
char ch;
while (dbgu_rb_pull(&ch) >= 0) {
while (!AT91F_US_TxReady((AT91PS_USART) AT91C_BASE_DBGU)) ;
107988: e3130002 tst r3, #2
10798c: 0afffffc beq 107984 <__rb_flush+0x5c>
//*----------------------------------------------------------------------------
static inline void AT91F_US_PutChar (
AT91PS_USART pUSART,
int character )
{
pUSART->US_THR = (character & 0x1FF);
107990: e50640e3 str r4, [r6, #-227] ; 0xffffff1d
/* pull one char out of debug ring buffer */
static int dbgu_rb_pull(char *ret)
{
unsigned long flags;
local_irq_save(flags);
107994: e10fc000 mrs ip, CPSR
107998: e38c3080 orr r3, ip, #128 ; 0x80
10799c: e121f003 msr CPSR_c, r3
if (dbgu.next_outbyte == dbgu.next_inbyte) {
1079a0: e7913000 ldr r3, [r1, r0]
1079a4: e7914005 ldr r4, [r1, r5]
1079a8: e1530004 cmp r3, r4
1079ac: 1affffec bne 107964 <__rb_flush+0x3c>
local_irq_restore(flags);
1079b0: e121f00c msr CPSR_c, ip
char ch;
while (dbgu_rb_pull(&ch) >= 0) {
while (!AT91F_US_TxReady((AT91PS_USART) AT91C_BASE_DBGU)) ;
AT91F_US_PutChar((AT91PS_USART) AT91C_BASE_DBGU, ch);
}
}
1079b4: e8bd01f0 pop {r4, r5, r6, r7, r8}
1079b8: e12fff1e bx lr
1079bc: 00200348 .word 0x00200348
1079c0: 00001004 .word 0x00001004
001079c4 <AT91F_DBGU_Ready>:
//* \fn AT91F_DBGU_Printk
//* \brief This function is used to send a string through the DBGU channel
//*----------------------------------------------------------------------------
void AT91F_DBGU_Ready(void)
{
while (!(AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXEMPTY)) ;
1079c4: e3e02c0d mvn r2, #3328 ; 0xd00
1079c8: e51230eb ldr r3, [r2, #-235] ; 0xffffff15
1079cc: e3130c02 tst r3, #512 ; 0x200
1079d0: 0afffffc beq 1079c8 <AT91F_DBGU_Ready+0x4>
}
1079d4: e12fff1e bx lr
001079d8 <AT91F_DBGU_Fini>:
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_CfgOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int pioEnable) // \arg PIO to be enabled
{
pPio->PIO_PER = pioEnable; // Set in PIO mode
1079d8: e3e03c0b mvn r3, #2816 ; 0xb00
1079dc: e3a01b01 mov r1, #1024 ; 0x400
static inline void AT91F_PIO_CfgInput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int inputEnable) // \arg PIO to be enabled
{
// Disable output
pPio->PIO_ODR = inputEnable;
1079e0: e3a02c02 mov r2, #512 ; 0x200
/*
* Disable the PIO assignments for the DBGU
*/
void AT91F_DBGU_Fini(void)
{
((AT91PS_USART) AT91C_BASE_DBGU)->US_CR = AT91C_US_RXDIS | AT91C_US_TXDIS;
1079e4: e3a0c0a0 mov ip, #160 ; 0xa0
1079e8: e3e00c0d mvn r0, #3328 ; 0xd00
1079ec: e500c0ff str ip, [r0, #-255] ; 0xffffff01
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_CfgOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int pioEnable) // \arg PIO to be enabled
{
pPio->PIO_PER = pioEnable; // Set in PIO mode
1079f0: e50310ff str r1, [r3, #-255] ; 0xffffff01
pPio->PIO_OER = pioEnable; // Configure in Output
1079f4: e50310ef str r1, [r3, #-239] ; 0xffffff11
static inline void AT91F_PIO_CfgInput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int inputEnable) // \arg PIO to be enabled
{
// Disable output
pPio->PIO_ODR = inputEnable;
1079f8: e50320eb str r2, [r3, #-235] ; 0xffffff15
pPio->PIO_PER = inputEnable;
1079fc: e50320ff str r2, [r3, #-255] ; 0xffffff01
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, AT91C_PA10_DTXD);
AT91F_PIO_CfgInput(AT91C_BASE_PIOA, AT91C_PA9_DRXD);
// Maybe FIXME, do more? -- Henryk Plötz <henryk@ploetzli.ch>
}
107a00: e12fff1e bx lr
00107a04 <AT91F_DBGU_Printk>:
//* \fn AT91F_DBGU_Printk
//* \brief This function is used to send a string through the DBGU channel (Very low level debugging)
//*----------------------------------------------------------------------------
void AT91F_DBGU_Printk(char *buffer)
{
while (*buffer != '\0') {
107a04: e5d01000 ldrb r1, [r0]
107a08: e3510000 cmp r1, #0
107a0c: 012fff1e bxeq lr
//* \brief Return 1 if a character can be written in US_THR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_TxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_TXRDY);
107a10: e3e02c0d mvn r2, #3328 ; 0xd00
107a14: e51230eb ldr r3, [r2, #-235] ; 0xffffff15
while (!AT91F_US_TxReady((AT91PS_USART) AT91C_BASE_DBGU)) ;
107a18: e3130002 tst r3, #2
107a1c: 0afffffc beq 107a14 <AT91F_DBGU_Printk+0x10>
//*----------------------------------------------------------------------------
static inline void AT91F_US_PutChar (
AT91PS_USART pUSART,
int character )
{
pUSART->US_THR = (character & 0x1FF);
107a20: e50210e3 str r1, [r2, #-227] ; 0xffffff1d
//* \fn AT91F_DBGU_Printk
//* \brief This function is used to send a string through the DBGU channel (Very low level debugging)
//*----------------------------------------------------------------------------
void AT91F_DBGU_Printk(char *buffer)
{
while (*buffer != '\0') {
107a24: e5f01001 ldrb r1, [r0, #1]!
107a28: e3510000 cmp r1, #0
107a2c: 1afffff8 bne 107a14 <AT91F_DBGU_Printk+0x10>
107a30: e12fff1e bx lr
00107a34 <__dbgu_rb_append>:
{
__rb_flush();
}
static void __dbgu_rb_append(char *data, int len)
{
107a34: e92d41f0 push {r4, r5, r6, r7, r8, lr}
char *pos = dbgu.next_inbyte;
107a38: e59f404c ldr r4, [pc, #76] ; 107a8c <__dbgu_rb_append+0x58>
107a3c: e3a05a01 mov r5, #4096 ; 0x1000
107a40: e7947005 ldr r7, [r4, r5]
dbgu.next_inbyte += len;
if (dbgu.next_inbyte >= &dbgu.buf[0]+sizeof(dbgu.buf)) {
107a44: e0842005 add r2, r4, r5
static void __dbgu_rb_append(char *data, int len)
{
char *pos = dbgu.next_inbyte;
dbgu.next_inbyte += len;
107a48: e0873001 add r3, r7, r1
if (dbgu.next_inbyte >= &dbgu.buf[0]+sizeof(dbgu.buf)) {
107a4c: e1530002 cmp r3, r2
{
__rb_flush();
}
static void __dbgu_rb_append(char *data, int len)
{
107a50: e1a06001 mov r6, r1
107a54: e1a08000 mov r8, r0
char *pos = dbgu.next_inbyte;
dbgu.next_inbyte += len;
107a58: e7843005 str r3, [r4, r5]
if (dbgu.next_inbyte >= &dbgu.buf[0]+sizeof(dbgu.buf)) {
107a5c: 3a000004 bcc 107a74 <__dbgu_rb_append+0x40>
AT91F_DBGU_Printk("WRAP DURING APPEND\r\n");
107a60: e59f0028 ldr r0, [pc, #40] ; 107a90 <__dbgu_rb_append+0x5c>
107a64: ebffffe6 bl 107a04 <AT91F_DBGU_Printk>
dbgu.next_inbyte -= sizeof(dbgu.buf);
107a68: e7941005 ldr r1, [r4, r5]
107a6c: e2410a01 sub r0, r1, #4096 ; 0x1000
107a70: e7840005 str r0, [r4, r5]
}
memcpy(pos, data, len);
107a74: e1a00007 mov r0, r7
107a78: e1a01008 mov r1, r8
107a7c: e1a02006 mov r2, r6
107a80: eb0009a1 bl 10a10c <memcpy>
}
107a84: e8bd41f0 pop {r4, r5, r6, r7, r8, lr}
107a88: e12fff1e bx lr
107a8c: 00200348 .word 0x00200348
107a90: 0010a954 .word 0x0010a954
00107a94 <AT91F_DBGU_Frame>:
//*----------------------------------------------------------------------------
//* \fn AT91F_DBGU_Frame
//* \brief This function is used to send a string through the DBGU channel
//*----------------------------------------------------------------------------
void AT91F_DBGU_Frame(char *buffer)
{
107a94: e52de004 push {lr} ; (str lr, [sp, #-4]!)
unsigned char len;
for (len = 0; buffer[len] != '\0'; len++) {
107a98: e5d02000 ldrb r2, [r0]
107a9c: e3520000 cmp r2, #0
//*----------------------------------------------------------------------------
//* \fn AT91F_DBGU_Frame
//* \brief This function is used to send a string through the DBGU channel
//*----------------------------------------------------------------------------
void AT91F_DBGU_Frame(char *buffer)
{
107aa0: e24dd00c sub sp, sp, #12
107aa4: e1a01000 mov r1, r0
unsigned char len;
for (len = 0; buffer[len] != '\0'; len++) {
107aa8: 0a000006 beq 107ac8 <AT91F_DBGU_Frame+0x34>
107aac: e3a03000 mov r3, #0
107ab0: e2833001 add r3, r3, #1
107ab4: e20330ff and r3, r3, #255 ; 0xff
107ab8: e7d12003 ldrb r2, [r1, r3]
107abc: e3520000 cmp r2, #0
107ac0: e1a02003 mov r2, r3
107ac4: 1afffff9 bne 107ab0 <AT91F_DBGU_Frame+0x1c>
const unsigned char *pBuffer,
unsigned int szBuffer,
const unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_SendFrame(
107ac8: e3a0c000 mov ip, #0
107acc: e1a0300c mov r3, ip
107ad0: e59f0010 ldr r0, [pc, #16] ; 107ae8 <AT91F_DBGU_Frame+0x54>
107ad4: e58dc000 str ip, [sp]
107ad8: ebfff317 bl 10473c <AT91F_PDC_SendFrame>
}
AT91F_US_SendFrame((AT91PS_USART) AT91C_BASE_DBGU,
(unsigned char *)buffer, len, 0, 0);
}
107adc: e28dd00c add sp, sp, #12
107ae0: e49de004 pop {lr} ; (ldr lr, [sp], #4)
107ae4: e12fff1e bx lr
107ae8: fffff300 .word 0xfffff300
00107aec <DBGU_irq_handler>:
//* \brief Return 1 if a character can be read in US_RHR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_RxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_RXRDY);
107aec: e3e01c0d mvn r1, #3328 ; 0xd00
107af0: e51120eb ldr r2, [r1, #-235] ; 0xffffff15
//* Function Name : DBGU_irq_handler
//* Object : C handler interrupt function called by the sysirq
//* demultiplexer
//*----------------------------------------------------------------------------
static void DBGU_irq_handler(u_int32_t sr)
{
107af4: e92d4010 push {r4, lr}
//* \fn AT91F_US_Get
//* \brief Get a Char to USART
//*----------------------------------------------------------------------------
int AT91F_DBGU_Get(char *val)
{
if ((AT91F_US_RxReady((AT91PS_USART) AT91C_BASE_DBGU)) == 0)
107af8: e3120001 tst r2, #1
107afc: 059f10ec ldreq r1, [pc, #236] ; 107bf0 <DBGU_irq_handler+0x104>
//* \brief Receive a character,does not check if a character is available
//*----------------------------------------------------------------------------
static inline int AT91F_US_GetChar (
const AT91PS_USART pUSART)
{
return((pUSART->US_RHR) & 0x1FF);
107b00: 151100e7 ldrne r0, [r1, #-231] ; 0xffffff19
107b04: 05510ff0 ldrbeq r0, [r1, #-4080] ; 0xfffff010
return (0);
else {
*val = AT91F_US_GetChar((AT91PS_USART) AT91C_BASE_DBGU);
107b08: 120000ff andne r0, r0, #255 ; 0xff
107b0c: 159f10dc ldrne r1, [pc, #220] ; 107bf0 <DBGU_irq_handler+0x104>
static void DBGU_irq_handler(u_int32_t sr)
{
static char value;
AT91F_DBGU_Get(&value);
switch (value) {
107b10: e2403030 sub r3, r0, #48 ; 0x30
int AT91F_DBGU_Get(char *val)
{
if ((AT91F_US_RxReady((AT91PS_USART) AT91C_BASE_DBGU)) == 0)
return (0);
else {
*val = AT91F_US_GetChar((AT91PS_USART) AT91C_BASE_DBGU);
107b14: 15410ff0 strbne r0, [r1, #-4080] ; 0xfffff010
static void DBGU_irq_handler(u_int32_t sr)
{
static char value;
AT91F_DBGU_Get(&value);
switch (value) {
107b18: e3530009 cmp r3, #9
107b1c: 979ff103 ldrls pc, [pc, r3, lsl #2]
107b20: ea000010 b 107b68 <DBGU_irq_handler+0x7c>
107b24: 00107b80 .word 0x00107b80
107b28: 00107b90 .word 0x00107b90
107b2c: 00107bc8 .word 0x00107bc8
107b30: 00107bdc .word 0x00107bdc
107b34: 00107b68 .word 0x00107b68
107b38: 00107b68 .word 0x00107b68
107b3c: 00107b68 .word 0x00107b68
107b40: 00107b68 .word 0x00107b68
107b44: 00107b68 .word 0x00107b68
107b48: 00107b4c .word 0x00107b4c
case '3':
AT91F_DBGU_Printk("Toggling LED 2\n\r");
led_toggle(2);
break;
case '9':
AT91F_DBGU_Printk("Resetting SAM7\n\r");
107b4c: e59f00a0 ldr r0, [pc, #160] ; 107bf4 <DBGU_irq_handler+0x108>
107b50: ebffffab bl 107a04 <AT91F_DBGU_Printk>
//*----------------------------------------------------------------------------
static inline void AT91F_RSTSoftReset(
AT91PS_RSTC pRSTC,
unsigned int reset)
{
pRSTC->RSTC_RCR = (0xA5000000 | reset);
107b54: e59f109c ldr r1, [pc, #156] ; 107bf8 <DBGU_irq_handler+0x10c>
107b58: e3e02c02 mvn r2, #512 ; 0x200
107b5c: e50210ff str r1, [r2, #-255] ; 0xffffff01
default:
if (_main_dbgu(value) < 0)
AT91F_DBGU_Printk("\n\r");
break;
} // end switch
}
107b60: e8bd4010 pop {r4, lr}
107b64: e12fff1e bx lr
AT91F_DBGU_Printk("Resetting SAM7\n\r");
AT91F_RSTSoftReset(AT91C_BASE_RSTC, AT91C_RSTC_PROCRST|
AT91C_RSTC_PERRST|AT91C_RSTC_EXTRST);
break;
default:
if (_main_dbgu(value) < 0)
107b68: eb0008f1 bl 109f34 <_main_dbgu>
107b6c: e3500000 cmp r0, #0
107b70: aafffffa bge 107b60 <DBGU_irq_handler+0x74>
AT91F_DBGU_Printk("\n\r");
107b74: e59f0080 ldr r0, [pc, #128] ; 107bfc <DBGU_irq_handler+0x110>
break;
} // end switch
}
107b78: e8bd4010 pop {r4, lr}
AT91F_RSTSoftReset(AT91C_BASE_RSTC, AT91C_RSTC_PROCRST|
AT91C_RSTC_PERRST|AT91C_RSTC_EXTRST);
break;
default:
if (_main_dbgu(value) < 0)
AT91F_DBGU_Printk("\n\r");
107b7c: eaffffa0 b 107a04 <AT91F_DBGU_Printk>
static char value;
AT91F_DBGU_Get(&value);
switch (value) {
case '0': //* info
AT91F_DBGU_Frame("Clear Pull up\n\r");
107b80: e59f0078 ldr r0, [pc, #120] ; 107c00 <DBGU_irq_handler+0x114>
107b84: ebffffc2 bl 107a94 <AT91F_DBGU_Frame>
// Set
udp_pullup_on();
107b88: ebfffe7a bl 107578 <udp_pullup_on>
break;
107b8c: eafffff3 b 107b60 <DBGU_irq_handler+0x74>
case '1': //* info
udp_pullup_off();
107b90: ebfffe7e bl 107590 <udp_pullup_off>
AT91F_DBGU_Printk("Set Pull up\n\r");
107b94: e59f0068 ldr r0, [pc, #104] ; 107c04 <DBGU_irq_handler+0x118>
107b98: ebffff99 bl 107a04 <AT91F_DBGU_Printk>
{
void (*pfct) (void) = (void (*)(void))0x00000000;
// Acknoledge the interrupt
// Mark the End of Interrupt on the AIC
AT91C_BASE_AIC->AIC_EOICR = 0;
107b9c: e3a00000 mov r0, #0
107ba0: e3e0cc0f mvn ip, #3840 ; 0xf00
107ba4: e58c0031 str r0, [ip, #49] ; 0x31
//* \fn AT91F_DBGU_Printk
//* \brief This function is used to send a string through the DBGU channel
//*----------------------------------------------------------------------------
void AT91F_DBGU_Ready(void)
{
while (!(AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXEMPTY)) ;
107ba8: e3e02c0d mvn r2, #3328 ; 0xd00
107bac: e512e0eb ldr lr, [r2, #-235] ; 0xffffff15
107bb0: e31e0c02 tst lr, #512 ; 0x200
107bb4: 0afffffc beq 107bac <DBGU_irq_handler+0xc0>
// Acknoledge the interrupt
// Mark the End of Interrupt on the AIC
AT91C_BASE_AIC->AIC_EOICR = 0;
AT91F_DBGU_Ready();
// Jump in reset
pfct();
107bb8: e3a03000 mov r3, #0
107bbc: e1a0e00f mov lr, pc
107bc0: e12fff13 bx r3
case '1': //* info
udp_pullup_off();
AT91F_DBGU_Printk("Set Pull up\n\r");
// Reset Application
Send_reset();
break;
107bc4: eaffffe5 b 107b60 <DBGU_irq_handler+0x74>
case '2':
AT91F_DBGU_Printk("Toggling LED 1\n\r");
107bc8: e59f0038 ldr r0, [pc, #56] ; 107c08 <DBGU_irq_handler+0x11c>
107bcc: ebffff8c bl 107a04 <AT91F_DBGU_Printk>
led_toggle(1);
107bd0: e3a00001 mov r0, #1
107bd4: eb0000c2 bl 107ee4 <led_toggle>
break;
107bd8: eaffffe0 b 107b60 <DBGU_irq_handler+0x74>
case '3':
AT91F_DBGU_Printk("Toggling LED 2\n\r");
107bdc: e59f0028 ldr r0, [pc, #40] ; 107c0c <DBGU_irq_handler+0x120>
107be0: ebffff87 bl 107a04 <AT91F_DBGU_Printk>
led_toggle(2);
107be4: e3a00002 mov r0, #2
107be8: eb0000bd bl 107ee4 <led_toggle>
break;
107bec: eaffffdb b 107b60 <DBGU_irq_handler+0x74>
107bf0: 00202340 .word 0x00202340
107bf4: 0010a9b4 .word 0x0010a9b4
107bf8: a500000d .word 0xa500000d
107bfc: 0010aa80 .word 0x0010aa80
107c00: 0010a96c .word 0x0010a96c
107c04: 0010a97c .word 0x0010a97c
107c08: 0010a98c .word 0x0010a98c
107c0c: 0010a9a0 .word 0x0010a9a0
00107c10 <AT91F_DBGU_Get>:
//* \brief Return 1 if a character can be read in US_RHR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_RxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_RXRDY);
107c10: e3e02c0d mvn r2, #3328 ; 0xd00
107c14: e51210eb ldr r1, [r2, #-235] ; 0xffffff15
//* \fn AT91F_US_Get
//* \brief Get a Char to USART
//*----------------------------------------------------------------------------
int AT91F_DBGU_Get(char *val)
{
if ((AT91F_US_RxReady((AT91PS_USART) AT91C_BASE_DBGU)) == 0)
107c18: e2113001 ands r3, r1, #1
//* \brief Receive a character,does not check if a character is available
//*----------------------------------------------------------------------------
static inline int AT91F_US_GetChar (
const AT91PS_USART pUSART)
{
return((pUSART->US_RHR) & 0x1FF);
107c1c: 151220e7 ldrne r2, [r2, #-231] ; 0xffffff19
return (0);
else {
*val = AT91F_US_GetChar((AT91PS_USART) AT91C_BASE_DBGU);
return (-1);
107c20: 13e03000 mvnne r3, #0
int AT91F_DBGU_Get(char *val)
{
if ((AT91F_US_RxReady((AT91PS_USART) AT91C_BASE_DBGU)) == 0)
return (0);
else {
*val = AT91F_US_GetChar((AT91PS_USART) AT91C_BASE_DBGU);
107c24: 15c02000 strbne r2, [r0]
return (-1);
}
}
107c28: e1a00003 mov r0, r3
107c2c: e12fff1e bx lr
00107c30 <hexdump>:
{
static char string[256];
unsigned char *d = (unsigned char *) data;
unsigned int i, left;
string[0] = '\0';
107c30: e59f3080 ldr r3, [pc, #128] ; 107cb8 <hexdump+0x88>
107c34: e3a02000 mov r2, #0
left = sizeof(string);
for (i = 0; len--; i += 3) {
107c38: e3510000 cmp r1, #0
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
const char *
hexdump(const void *data, unsigned int len)
{
107c3c: e92d41f0 push {r4, r5, r6, r7, r8, lr}
static char string[256];
unsigned char *d = (unsigned char *) data;
unsigned int i, left;
string[0] = '\0';
107c40: e5432fec strb r2, [r3, #-4076] ; 0xfffff014
left = sizeof(string);
for (i = 0; len--; i += 3) {
107c44: 0a000018 beq 107cac <hexdump+0x7c>
if (i >= sizeof(string) -4)
break;
snprintf(string+i, 4, " %02x", *d++);
107c48: e2436efe sub r6, r3, #4064 ; 0xfe0
#include <string.h>
const char *
hexdump(const void *data, unsigned int len)
{
static char string[256];
unsigned char *d = (unsigned char *) data;
107c4c: e1a04000 mov r4, r0
string[0] = '\0';
left = sizeof(string);
for (i = 0; len--; i += 3) {
if (i >= sizeof(string) -4)
break;
snprintf(string+i, 4, " %02x", *d++);
107c50: e246600c sub r6, r6, #12
#ifdef DEBUG
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
const char *
hexdump(const void *data, unsigned int len)
107c54: e0807001 add r7, r0, r1
107c58: e2808054 add r8, r0, #84 ; 0x54
107c5c: ea000007 b 107c80 <hexdump+0x50>
string[0] = '\0';
left = sizeof(string);
for (i = 0; len--; i += 3) {
if (i >= sizeof(string) -4)
break;
snprintf(string+i, 4, " %02x", *d++);
107c60: e5d43001 ldrb r3, [r4, #1]
107c64: e2854001 add r4, r5, #1
107c68: ebfff7d8 bl 105bd0 <snprintf>
unsigned char *d = (unsigned char *) data;
unsigned int i, left;
string[0] = '\0';
left = sizeof(string);
for (i = 0; len--; i += 3) {
107c6c: e1540007 cmp r4, r7
107c70: 0a00000d beq 107cac <hexdump+0x7c>
if (i >= sizeof(string) -4)
107c74: e1540008 cmp r4, r8
#ifdef DEBUG
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
const char *
hexdump(const void *data, unsigned int len)
107c78: e2866006 add r6, r6, #6
unsigned int i, left;
string[0] = '\0';
left = sizeof(string);
for (i = 0; len--; i += 3) {
if (i >= sizeof(string) -4)
107c7c: 0a00000a beq 107cac <hexdump+0x7c>
break;
snprintf(string+i, 4, " %02x", *d++);
107c80: e1a05004 mov r5, r4
107c84: e4d53001 ldrb r3, [r5], #1
107c88: e3a01004 mov r1, #4
107c8c: e59f2028 ldr r2, [pc, #40] ; 107cbc <hexdump+0x8c>
107c90: e1a00006 mov r0, r6
107c94: ebfff7cd bl 105bd0 <snprintf>
unsigned char *d = (unsigned char *) data;
unsigned int i, left;
string[0] = '\0';
left = sizeof(string);
for (i = 0; len--; i += 3) {
107c98: e1550007 cmp r5, r7
if (i >= sizeof(string) -4)
break;
snprintf(string+i, 4, " %02x", *d++);
107c9c: e2860003 add r0, r6, #3
107ca0: e3a01004 mov r1, #4
107ca4: e59f2010 ldr r2, [pc, #16] ; 107cbc <hexdump+0x8c>
unsigned char *d = (unsigned char *) data;
unsigned int i, left;
string[0] = '\0';
left = sizeof(string);
for (i = 0; len--; i += 3) {
107ca8: 1affffec bne 107c60 <hexdump+0x30>
if (i >= sizeof(string) -4)
break;
snprintf(string+i, 4, " %02x", *d++);
}
return string;
}
107cac: e59f000c ldr r0, [pc, #12] ; 107cc0 <hexdump+0x90>
107cb0: e8bd41f0 pop {r4, r5, r6, r7, r8, lr}
107cb4: e12fff1e bx lr
107cb8: 00202340 .word 0x00202340
107cbc: 0010a9c8 .word 0x0010a9c8
107cc0: 00201354 .word 0x00201354
00107cc4 <dbgu_rb_init>:
char *next_outbyte;
};
static struct dbgu dbgu;
void dbgu_rb_init(void)
{
107cc4: e92d4038 push {r3, r4, r5, lr}
memset(dbgu.buf, 0, sizeof(dbgu.buf));
107cc8: e59f4024 ldr r4, [pc, #36] ; 107cf4 <dbgu_rb_init+0x30>
107ccc: e3a05a01 mov r5, #4096 ; 0x1000
107cd0: e1a00004 mov r0, r4
107cd4: e3a01000 mov r1, #0
107cd8: e1a02005 mov r2, r5
107cdc: eb00097a bl 10a2cc <memset>
dbgu.next_inbyte = &dbgu.buf[0];
dbgu.next_outbyte = &dbgu.buf[0];
107ce0: e59f3010 ldr r3, [pc, #16] ; 107cf8 <dbgu_rb_init+0x34>
static struct dbgu dbgu;
void dbgu_rb_init(void)
{
memset(dbgu.buf, 0, sizeof(dbgu.buf));
dbgu.next_inbyte = &dbgu.buf[0];
107ce4: e7844005 str r4, [r4, r5]
dbgu.next_outbyte = &dbgu.buf[0];
107ce8: e7844003 str r4, [r4, r3]
}
107cec: e8bd4038 pop {r3, r4, r5, lr}
107cf0: e12fff1e bx lr
107cf4: 00200348 .word 0x00200348
107cf8: 00001004 .word 0x00001004
00107cfc <AT91F_DBGU_Init>:
//*----------------------------------------------------------------------------
//* \fn AT91F_DBGU_Init
//* \brief This function is used to send a string through the DBGU channel (Very low level debugging)
//*----------------------------------------------------------------------------
void AT91F_DBGU_Init(void)
{
107cfc: e92d4030 push {r4, r5, lr}
107d00: e24dd00c sub sp, sp, #12
dbgu_rb_init();
107d04: ebffffee bl 107cc4 <dbgu_rb_init>
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
107d08: e3a05c06 mov r5, #1536 ; 0x600
pPio->PIO_BSR = periphBEnable;
107d0c: e3a0e000 mov lr, #0
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
107d10: e3e0cc0b mvn ip, #2816 ; 0xb00
107d14: e50c508f str r5, [ip, #-143] ; 0xffffff71
//* Open PIO for DBGU
AT91F_DBGU_CfgPIO();
//* Enable Transmitter & receivier
((AT91PS_USART) AT91C_BASE_DBGU)->US_CR =
107d18: e3e04c0d mvn r4, #3328 ; 0xd00
pPio->PIO_BSR = periphBEnable;
107d1c: e50ce08b str lr, [ip, #-139] ; 0xffffff75
pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
107d20: e50c50fb str r5, [ip, #-251] ; 0xffffff05
107d24: e3a0c00c mov ip, #12
107d28: e504c0ff str ip, [r4, #-255] ; 0xffffff01
AT91C_US_RSTTX | AT91C_US_RSTRX;
//* Configure DBGU
AT91F_US_Configure((AT91PS_USART) AT91C_BASE_DBGU, // DBGU base address
107d2c: e3a02d23 mov r2, #2240 ; 0x8c0
107d30: e59f3050 ldr r3, [pc, #80] ; 107d88 <AT91F_DBGU_Init+0x8c>
107d34: e59f0050 ldr r0, [pc, #80] ; 107d8c <AT91F_DBGU_Init+0x90>
107d38: e59f1050 ldr r1, [pc, #80] ; 107d90 <AT91F_DBGU_Init+0x94>
107d3c: e58de000 str lr, [sp]
107d40: ebfff34f bl 104a84 <AT91F_US_Configure>
static inline void AT91F_US_EnableIt (
AT91PS_USART pUSART, // \arg pointer to a USART controller
unsigned int flag) // \arg IT to be enabled
{
//* Write to the IER register
pUSART->US_IER = flag;
107d44: e3a03001 mov r3, #1
MCK, AT91C_US_ASYNC_MODE, // Mode Register to be programmed
AT91C_DBGU_BAUD, // Baudrate to be programmed
0); // Timeguard to be programmed
//* Enable Transmitter & receivier
((AT91PS_USART) AT91C_BASE_DBGU)->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
107d48: e3a02050 mov r2, #80 ; 0x50
//* Enable USART IT error and AT91C_US_ENDRX
AT91F_US_EnableIt((AT91PS_USART) AT91C_BASE_DBGU, AT91C_US_RXRDY);
//* open interrupt
sysirq_register(AT91SAM7_SYSIRQ_DBGU, &DBGU_irq_handler);
107d4c: e1a00003 mov r0, r3
MCK, AT91C_US_ASYNC_MODE, // Mode Register to be programmed
AT91C_DBGU_BAUD, // Baudrate to be programmed
0); // Timeguard to be programmed
//* Enable Transmitter & receivier
((AT91PS_USART) AT91C_BASE_DBGU)->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
107d50: e50420ff str r2, [r4, #-255] ; 0xffffff01
//* Enable USART IT error and AT91C_US_ENDRX
AT91F_US_EnableIt((AT91PS_USART) AT91C_BASE_DBGU, AT91C_US_RXRDY);
//* open interrupt
sysirq_register(AT91SAM7_SYSIRQ_DBGU, &DBGU_irq_handler);
107d54: e59f1038 ldr r1, [pc, #56] ; 107d94 <AT91F_DBGU_Init+0x98>
107d58: e50430f7 str r3, [r4, #-247] ; 0xffffff09
107d5c: eb000567 bl 109300 <sysirq_register>
AT91F_DBGU_Printk("\n\r");
107d60: e59f0030 ldr r0, [pc, #48] ; 107d98 <AT91F_DBGU_Init+0x9c>
107d64: ebffff26 bl 107a04 <AT91F_DBGU_Printk>
AT91F_DBGU_Printk("(C) 2006 by Harald Welte <hwelte@hmw-consulting.de>\n\r"
107d68: e59f002c ldr r0, [pc, #44] ; 107d9c <AT91F_DBGU_Init+0xa0>
107d6c: ebffff24 bl 107a04 <AT91F_DBGU_Printk>
"This software is FREE SOFTWARE licensed under GNU GPL\n\r");
AT91F_DBGU_Printk("Version " COMPILE_SVNREV
107d70: e59f0028 ldr r0, [pc, #40] ; 107da0 <AT91F_DBGU_Init+0xa4>
107d74: ebffff22 bl 107a04 <AT91F_DBGU_Printk>
" compiled " COMPILE_DATE
" by " COMPILE_BY "\n\r\n\r");
AT91F_DBGU_Printk("\n\rDEBUG Interface:\n\r"
107d78: e59f0024 ldr r0, [pc, #36] ; 107da4 <AT91F_DBGU_Init+0xa8>
"0) Set Pull-up 1) Clear Pull-up 2) Toggle LED1 3) "
"Toggle LED2\r\n9) Reset\n\r");
}
107d7c: e28dd00c add sp, sp, #12
107d80: e8bd4030 pop {r4, r5, lr}
AT91F_DBGU_Printk("(C) 2006 by Harald Welte <hwelte@hmw-consulting.de>\n\r"
"This software is FREE SOFTWARE licensed under GNU GPL\n\r");
AT91F_DBGU_Printk("Version " COMPILE_SVNREV
" compiled " COMPILE_DATE
" by " COMPILE_BY "\n\r\n\r");
AT91F_DBGU_Printk("\n\rDEBUG Interface:\n\r"
107d84: eaffff1e b 107a04 <AT91F_DBGU_Printk>
107d88: 0001c200 .word 0x0001c200
107d8c: fffff200 .word 0xfffff200
107d90: 02db4000 .word 0x02db4000
107d94: 00107aec .word 0x00107aec
107d98: 0010aa80 .word 0x0010aa80
107d9c: 0010a9d0 .word 0x0010a9d0
107da0: 0010aa40 .word 0x0010aa40
107da4: 0010aa84 .word 0x0010aa84
00107da8 <dbgu_rb_flush>:
}
/* flush pending data from debug ring buffer to serial port */
void dbgu_rb_flush(void)
{
__rb_flush();
107da8: eafffede b 107928 <__rb_flush>
00107dac <dbgu_rb_append>:
memcpy(pos, data, len);
}
void dbgu_rb_append(char *data, int len)
{
107dac: e92d40f8 push {r3, r4, r5, r6, r7, lr}
107db0: e1a06000 mov r6, r0
107db4: e1a04001 mov r4, r1
unsigned long flags;
int bytes_left;
char *data_cur;
local_irq_save(flags);
107db8: e10f7000 mrs r7, CPSR
107dbc: e3873080 orr r3, r7, #128 ; 0x80
107dc0: e121f003 msr CPSR_c, r3
bytes_left = &dbgu.buf[0]+sizeof(dbgu.buf)-dbgu.next_inbyte;
107dc4: e59f3048 ldr r3, [pc, #72] ; 107e14 <dbgu_rb_append+0x68>
107dc8: e3a0ca01 mov ip, #4096 ; 0x1000
107dcc: e793200c ldr r2, [r3, ip]
107dd0: e2835a01 add r5, r3, #4096 ; 0x1000
107dd4: e0625005 rsb r5, r2, r5
data_cur = data;
if (len > bytes_left) {
107dd8: e1550001 cmp r5, r1
107ddc: aa000007 bge 107e00 <dbgu_rb_append+0x54>
AT91F_DBGU_Printk("LEN > BYTES_LEFT\r\n");
107de0: e59f0030 ldr r0, [pc, #48] ; 107e18 <dbgu_rb_append+0x6c>
107de4: ebffff06 bl 107a04 <AT91F_DBGU_Printk>
__rb_flush();
107de8: ebfffece bl 107928 <__rb_flush>
__dbgu_rb_append(data_cur, bytes_left);
107dec: e1a00006 mov r0, r6
107df0: e1a01005 mov r1, r5
107df4: ebffff0e bl 107a34 <__dbgu_rb_append>
len -= bytes_left;
107df8: e0654004 rsb r4, r5, r4
data_cur += bytes_left;
107dfc: e0860005 add r0, r6, r5
}
__dbgu_rb_append(data_cur, len);
107e00: e1a01004 mov r1, r4
107e04: ebffff0a bl 107a34 <__dbgu_rb_append>
local_irq_restore(flags);
107e08: e121f007 msr CPSR_c, r7
}
107e0c: e8bd40f8 pop {r3, r4, r5, r6, r7, lr}
107e10: e12fff1e bx lr
107e14: 00200348 .word 0x00200348
107e18: 0010aae4 .word 0x0010aae4
00107e1c <debugp>:
static char dbg_buf[256];
void debugp(const char *format, ...)
{
107e1c: e92d000f push {r0, r1, r2, r3}
107e20: e92d4030 push {r4, r5, lr}
va_list ap;
va_start(ap, format);
vsnprintf(dbg_buf, sizeof(dbg_buf)-1, format, ap);
107e24: e59f5050 ldr r5, [pc, #80] ; 107e7c <debugp+0x60>
local_irq_restore(flags);
}
static char dbg_buf[256];
void debugp(const char *format, ...)
{
107e28: e24dd00c sub sp, sp, #12
va_list ap;
va_start(ap, format);
vsnprintf(dbg_buf, sizeof(dbg_buf)-1, format, ap);
107e2c: e2454eee sub r4, r5, #3808 ; 0xee0
static char dbg_buf[256];
void debugp(const char *format, ...)
{
va_list ap;
va_start(ap, format);
107e30: e28dc01c add ip, sp, #28
vsnprintf(dbg_buf, sizeof(dbg_buf)-1, format, ap);
107e34: e244400c sub r4, r4, #12
107e38: e1a0300c mov r3, ip
107e3c: e3a010ff mov r1, #255 ; 0xff
107e40: e59d2018 ldr r2, [sp, #24]
107e44: e1a00004 mov r0, r4
static char dbg_buf[256];
void debugp(const char *format, ...)
{
va_list ap;
va_start(ap, format);
107e48: e58dc004 str ip, [sp, #4]
vsnprintf(dbg_buf, sizeof(dbg_buf)-1, format, ap);
107e4c: ebfff53f bl 105350 <vsnprintf>
va_end(ap);
dbg_buf[sizeof(dbg_buf)-1] = '\0';
107e50: e3a03000 mov r3, #0
//AT91F_DBGU_Frame(dbg_buf);
#ifdef DEBUG_UNBUFFERED
AT91F_DBGU_Printk(dbg_buf);
#else
dbgu_rb_append(dbg_buf, strlen(dbg_buf));
107e54: e1a00004 mov r0, r4
va_start(ap, format);
vsnprintf(dbg_buf, sizeof(dbg_buf)-1, format, ap);
va_end(ap);
dbg_buf[sizeof(dbg_buf)-1] = '\0';
107e58: e5453ded strb r3, [r5, #-3565] ; 0xfffff213
//AT91F_DBGU_Frame(dbg_buf);
#ifdef DEBUG_UNBUFFERED
AT91F_DBGU_Printk(dbg_buf);
#else
dbgu_rb_append(dbg_buf, strlen(dbg_buf));
107e5c: eb00095a bl 10a3cc <strlen>
107e60: e1a01000 mov r1, r0
107e64: e1a00004 mov r0, r4
107e68: ebffffcf bl 107dac <dbgu_rb_append>
#endif
}
107e6c: e28dd00c add sp, sp, #12
107e70: e8bd4030 pop {r4, r5, lr}
107e74: e28dd010 add sp, sp, #16
107e78: e12fff1e bx lr
107e7c: 00202340 .word 0x00202340
00107e80 <led_switch>:
void led_switch(int led, int on)
{
int port;
if (led < 1 || led > 2)
107e80: e2403001 sub r3, r0, #1
107e84: e3530001 cmp r3, #1
107e88: 812fff1e bxhi lr
return;
port = ledport[led];
if (on)
107e8c: e3510000 cmp r1, #0
int port;
if (led < 1 || led > 2)
return;
port = ledport[led];
107e90: e59f1010 ldr r1, [pc, #16] ; 107ea8 <led_switch+0x28>
107e94: e7910100 ldr r0, [r1, r0, lsl #2]
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
107e98: e3e02c0b mvn r2, #2816 ; 0xb00
107e9c: 150200cb strne r0, [r2, #-203] ; 0xffffff35
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107ea0: 050200cf streq r0, [r2, #-207] ; 0xffffff31
107ea4: e12fff1e bx lr
107ea8: 0010aaf8 .word 0x0010aaf8
00107eac <led_get>:
int led_get(int led)
{
int port;
if (led < 1 || led > 2)
107eac: e2403001 sub r3, r0, #1
107eb0: e3530001 cmp r3, #1
107eb4: 9a000001 bls 107ec0 <led_get+0x14>
return -1;
107eb8: e3e00000 mvn r0, #0
port = ledport[led];
return !(AT91F_PIO_GetOutputDataStatus(AT91C_BASE_PIOA) & port);
}
107ebc: e12fff1e bx lr
if (led < 1 || led > 2)
return -1;
port = ledport[led];
return !(AT91F_PIO_GetOutputDataStatus(AT91C_BASE_PIOA) & port);
107ec0: e59f1018 ldr r1, [pc, #24] ; 107ee0 <led_get+0x34>
//* \brief Return PIO Output Data Status
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status
AT91PS_PIO pPio) // \arg pointer to a PIO controller
{
return pPio->PIO_ODSR;
107ec4: e3e0cc0b mvn ip, #2816 ; 0xb00
107ec8: e7910100 ldr r0, [r1, r0, lsl #2]
107ecc: e51c20c7 ldr r2, [ip, #-199] ; 0xffffff39
107ed0: e1120000 tst r2, r0
107ed4: 13a00000 movne r0, #0
107ed8: 03a00001 moveq r0, #1
107edc: e12fff1e bx lr
107ee0: 0010aaf8 .word 0x0010aaf8
00107ee4 <led_toggle>:
int led_get(int led)
{
int port;
if (led < 1 || led > 2)
107ee4: e2403001 sub r3, r0, #1
107ee8: e3530001 cmp r3, #1
107eec: 9a000001 bls 107ef8 <led_toggle+0x14>
107ef0: e3e00000 mvn r0, #0
led_switch(led, 0);
else
led_switch(led, 1);
return !on;
}
107ef4: e12fff1e bx lr
if (led < 1 || led > 2)
return -1;
port = ledport[led];
return !(AT91F_PIO_GetOutputDataStatus(AT91C_BASE_PIOA) & port);
107ef8: e59f3024 ldr r3, [pc, #36] ; 107f24 <led_toggle+0x40>
107efc: e3e0cc0b mvn ip, #2816 ; 0xb00
107f00: e7932100 ldr r2, [r3, r0, lsl #2]
107f04: e51c10c7 ldr r1, [ip, #-199] ; 0xffffff39
107f08: e1120001 tst r2, r1
{
int on = led_get(led);
if (on < 0)
return on;
if (on)
107f0c: 13a00000 movne r0, #0
107f10: 03a00001 moveq r0, #1
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107f14: 050c20cf streq r2, [ip, #-207] ; 0xffffff31
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
107f18: 150c20cb strne r2, [ip, #-203] ; 0xffffff35
led_switch(led, 0);
else
led_switch(led, 1);
return !on;
107f1c: e2200001 eor r0, r0, #1
107f20: e12fff1e bx lr
107f24: 0010aaf8 .word 0x0010aaf8
00107f28 <led_init>:
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_CfgOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int pioEnable) // \arg PIO to be enabled
{
pPio->PIO_PER = pioEnable; // Set in PIO mode
107f28: e3e03c0b mvn r3, #2816 ; 0xb00
107f2c: e3a01402 mov r1, #33554432 ; 0x2000000
107f30: e3a02301 mov r2, #67108864 ; 0x4000000
107f34: e50310ff str r1, [r3, #-255] ; 0xffffff01
pPio->PIO_OER = pioEnable; // Configure in Output
107f38: e50310ef str r1, [r3, #-239] ; 0xffffff11
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_CfgOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int pioEnable) // \arg PIO to be enabled
{
pPio->PIO_PER = pioEnable; // Set in PIO mode
107f3c: e50320ff str r2, [r3, #-255] ; 0xffffff01
pPio->PIO_OER = pioEnable; // Configure in Output
107f40: e50320ef str r2, [r3, #-239] ; 0xffffff11
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
107f44: e50310cf str r1, [r3, #-207] ; 0xffffff31
107f48: e50320cf str r2, [r3, #-207] ; 0xffffff31
{
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPCD_PIO_LED1);
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPCD_PIO_LED2);
led_switch(1, 0);
led_switch(2, 0);
}
107f4c: e12fff1e bx lr
00107f50 <req_ctx_num>:
return NULL;
}
u_int8_t req_ctx_num(struct req_ctx *ctx)
{
return ((char *)ctx - (char *)&req_ctx[0])/sizeof(*ctx);
107f50: e59f3014 ldr r3, [pc, #20] ; 107f6c <req_ctx_num+0x1c>
107f54: e59f2014 ldr r2, [pc, #20] ; 107f70 <req_ctx_num+0x20>
107f58: e0631000 rsb r1, r3, r0
107f5c: e0813192 umull r3, r1, r2, r1
return NULL;
}
u_int8_t req_ctx_num(struct req_ctx *ctx)
{
107f60: e1a001a1 lsr r0, r1, #3
return ((char *)ctx - (char *)&req_ctx[0])/sizeof(*ctx);
}
107f64: e20000ff and r0, r0, #255 ; 0xff
107f68: e12fff1e bx lr
107f6c: 00201554 .word 0x00201554
107f70: aaaaaaab .word 0xaaaaaaab
00107f74 <req_ctx_set_state>:
void req_ctx_set_state(struct req_ctx *ctx, unsigned long new_state)
{
unsigned long flags;
/* FIXME: do we need this kind of locking, we're UP! */
local_irq_save(flags);
107f74: e10f3000 mrs r3, CPSR
107f78: e3832080 orr r2, r3, #128 ; 0x80
107f7c: e121f002 msr CPSR_c, r2
ctx->state = new_state;
107f80: e5801000 str r1, [r0]
local_irq_restore(flags);
107f84: e121f003 msr CPSR_c, r3
}
107f88: e12fff1e bx lr
00107f8c <req_ctx_put>:
void req_ctx_set_state(struct req_ctx *ctx, unsigned long new_state)
{
unsigned long flags;
/* FIXME: do we need this kind of locking, we're UP! */
local_irq_save(flags);
107f8c: e10f3000 mrs r3, CPSR
107f90: e3832080 orr r2, r3, #128 ; 0x80
107f94: e121f002 msr CPSR_c, r2
ctx->state = new_state;
107f98: e3a020fe mov r2, #254 ; 0xfe
107f9c: e5802000 str r2, [r0]
local_irq_restore(flags);
107fa0: e121f003 msr CPSR_c, r3
}
void req_ctx_put(struct req_ctx *ctx)
{
req_ctx_set_state(ctx, RCTX_STATE_FREE);
}
107fa4: e12fff1e bx lr
00107fa8 <req_ctx_init>:
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107fa8: e59f30c4 ldr r3, [pc, #196] ; 108074 <req_ctx_init+0xcc>
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
107fac: e283ce29 add ip, r3, #656 ; 0x290
{
req_ctx_set_state(ctx, RCTX_STATE_FREE);
}
void req_ctx_init(void)
{
107fb0: e92d0ff0 push {r4, r5, r6, r7, r8, r9, sl, fp}
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
107fb4: e3a01040 mov r1, #64 ; 0x40
req_ctx[i].data = rctx_data[i];
req_ctx[i].state = RCTX_STATE_FREE;
107fb8: e3a020fe mov r2, #254 ; 0xfe
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
107fbc: e28c4a01 add r4, ip, #4096 ; 0x1000
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
req_ctx[i].state = RCTX_STATE_FREE;
107fc0: e5832000 str r2, [r3]
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
107fc4: e3a00b02 mov r0, #2048 ; 0x800
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
req_ctx[i].state = RCTX_STATE_FREE;
107fc8: e583200c str r2, [r3, #12]
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107fcc: e2839090 add r9, r3, #144 ; 0x90
req_ctx[i].state = RCTX_STATE_FREE;
107fd0: e5832018 str r2, [r3, #24]
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107fd4: e283a0d0 add sl, r3, #208 ; 0xd0
req_ctx[i].state = RCTX_STATE_FREE;
107fd8: e5832024 str r2, [r3, #36] ; 0x24
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107fdc: e2838e11 add r8, r3, #272 ; 0x110
req_ctx[i].state = RCTX_STATE_FREE;
107fe0: e5832030 str r2, [r3, #48] ; 0x30
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107fe4: e2837e15 add r7, r3, #336 ; 0x150
req_ctx[i].state = RCTX_STATE_FREE;
107fe8: e583203c str r2, [r3, #60] ; 0x3c
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107fec: e2836e19 add r6, r3, #400 ; 0x190
req_ctx[i].state = RCTX_STATE_FREE;
107ff0: e5832048 str r2, [r3, #72] ; 0x48
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
107ff4: e2835e1d add r5, r3, #464 ; 0x1d0
107ff8: e283be21 add fp, r3, #528 ; 0x210
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
107ffc: e5834080 str r4, [r3, #128] ; 0x80
void req_ctx_init(void)
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
108000: e1c310b4 strh r1, [r3, #4]
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
108004: e28c4b06 add r4, ip, #6144 ; 0x1800
void req_ctx_init(void)
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
108008: e1c311b0 strh r1, [r3, #16]
10800c: e1c311bc strh r1, [r3, #28]
108010: e1c312b8 strh r1, [r3, #40] ; 0x28
108014: e1c313b4 strh r1, [r3, #52] ; 0x34
108018: e1c314b0 strh r1, [r3, #64] ; 0x40
10801c: e1c314bc strh r1, [r3, #76] ; 0x4c
108020: e1c315b8 strh r1, [r3, #88] ; 0x58
req_ctx[i].data = rctx_data[i];
req_ctx[i].state = RCTX_STATE_FREE;
108024: e5832054 str r2, [r3, #84] ; 0x54
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
108028: e2831e25 add r1, r3, #592 ; 0x250
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
10802c: e2832ea9 add r2, r3, #2704 ; 0xa90
{
int i;
for (i = 0; i < NUM_RCTX_SMALL; i++) {
req_ctx[i].size = RCTX_SIZE_SMALL;
req_ctx[i].data = rctx_data[i];
108030: e5839008 str r9, [r3, #8]
108034: e583a014 str sl, [r3, #20]
108038: e5838020 str r8, [r3, #32]
10803c: e583702c str r7, [r3, #44] ; 0x2c
108040: e5836038 str r6, [r3, #56] ; 0x38
108044: e5835044 str r5, [r3, #68] ; 0x44
108048: e583b050 str fp, [r3, #80] ; 0x50
10804c: e583105c str r1, [r3, #92] ; 0x5c
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
108050: e1c306b4 strh r0, [r3, #100] ; 0x64
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
108054: e583c068 str ip, [r3, #104] ; 0x68
req_ctx[i].data = rctx_data[i];
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
108058: e1c307b0 strh r0, [r3, #112] ; 0x70
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
10805c: e5832074 str r2, [r3, #116] ; 0x74
req_ctx[i].data = rctx_data[i];
req_ctx[i].state = RCTX_STATE_FREE;
}
for (i = 0; i < NUM_RCTX_LARGE; i++) {
req_ctx[NUM_RCTX_SMALL+i].size = RCTX_SIZE_LARGE;
108060: e1c307bc strh r0, [r3, #124] ; 0x7c
108064: e1c308b8 strh r0, [r3, #136] ; 0x88
req_ctx[NUM_RCTX_SMALL+i].data = rctx_data_large[i];
108068: e583408c str r4, [r3, #140] ; 0x8c
}
}
10806c: e8bd0ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp}
108070: e12fff1e bx lr
108074: 00201554 .word 0x00201554
00108078 <trigger_init>:
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_CfgOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int pioEnable) // \arg PIO to be enabled
{
pPio->PIO_PER = pioEnable; // Set in PIO mode
108078: e3e03c0b mvn r3, #2816 ; 0xb00
10807c: e3a02102 mov r2, #-2147483648 ; 0x80000000
108080: e50320ff str r2, [r3, #-255] ; 0xffffff01
pPio->PIO_OER = pioEnable; // Configure in Output
108084: e50320ef str r2, [r3, #-239] ; 0xffffff11
#include "../openpcd.h"
void trigger_init(void)
{
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPCD_PIO_TRIGGER);
}
108088: e12fff1e bx lr
0010808c <trigger_pulse>:
void trigger_pulse(void)
{
10808c: e24dd008 sub sp, sp, #8
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
108090: e3a02102 mov r2, #-2147483648 ; 0x80000000
108094: e3e01c0b mvn r1, #2816 ; 0xb00
volatile int i;
AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPCD_PIO_TRIGGER);
for (i=0; i < 0xff; i++)
108098: e3a00000 mov r0, #0
10809c: e50120cf str r2, [r1, #-207] ; 0xffffff31
1080a0: e58d0004 str r0, [sp, #4]
1080a4: e59d3004 ldr r3, [sp, #4]
1080a8: e35300fe cmp r3, #254 ; 0xfe
1080ac: ca000005 bgt 1080c8 <trigger_pulse+0x3c>
1080b0: e59d0004 ldr r0, [sp, #4]
1080b4: e2803001 add r3, r0, #1
1080b8: e58d3004 str r3, [sp, #4]
1080bc: e59dc004 ldr ip, [sp, #4]
1080c0: e35c00fe cmp ip, #254 ; 0xfe
1080c4: dafffff9 ble 1080b0 <trigger_pulse+0x24>
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
1080c8: e3a02102 mov r2, #-2147483648 ; 0x80000000
1080cc: e3e01c0b mvn r1, #2816 ; 0xb00
1080d0: e50120cb str r2, [r1, #-203] ; 0xffffff35
{ }
AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPCD_PIO_TRIGGER);
}
1080d4: e28dd008 add sp, sp, #8
1080d8: e12fff1e bx lr
001080dc <main>:
.date = COMPILE_DATE,
.by = COMPILE_BY,
};
int main(void)
{
1080dc: e92d4008 push {r3, lr}
/* initialize LED and debug unit */
led_init();
1080e0: ebffff90 bl 107f28 <led_init>
sysirq_init();
1080e4: eb00048a bl 109314 <sysirq_init>
AT91F_DBGU_Init();
1080e8: ebffff03 bl 107cfc <AT91F_DBGU_Init>
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
1080ec: e3e01c03 mvn r1, #768 ; 0x300
1080f0: e3a00004 mov r0, #4
1080f4: e50100ef str r0, [r1, #-239] ; 0xffffff11
AT91F_PIOA_CfgPMC();
wdt_init();
1080f8: eb00035c bl 108e70 <wdt_init>
pit_init();
1080fc: eb0001b8 bl 1087e4 <pit_init>
blinkcode_init();
108100: eb0003de bl 109080 <blinkcode_init>
/* initialize USB */
req_ctx_init();
108104: ebffffa7 bl 107fa8 <req_ctx_init>
usbcmd_gen_init();
108108: eb00033c bl 108e00 <usbcmd_gen_init>
udp_open();
10810c: ebfffd25 bl 1075a8 <udp_open>
/* call application specific init function */
_init_func();
108110: eb000783 bl 109f24 <_init_func>
// Enable User Reset and set its minimal assertion to 960 us
AT91C_BASE_RSTC->RSTC_RMR =
108114: e59f2030 ldr r2, [pc, #48] ; 10814c <main+0x70>
108118: e3e03c02 mvn r3, #512 ; 0x200
AT91F_PMC_EnablePCK(AT91C_BASE_PMC, 0, AT91C_PMC_CSS_PLL_CLK);
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, AT91C_PA6_PCK0);
#endif
/* switch on first led */
led_switch(2, 1);
10811c: e3a00002 mov r0, #2
108120: e3a01001 mov r1, #1
/* call application specific init function */
_init_func();
// Enable User Reset and set its minimal assertion to 960 us
AT91C_BASE_RSTC->RSTC_RMR =
108124: e50320f7 str r2, [r3, #-247] ; 0xffffff09
AT91F_PMC_EnablePCK(AT91C_BASE_PMC, 0, AT91C_PMC_CSS_PLL_CLK);
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, AT91C_PA6_PCK0);
#endif
/* switch on first led */
led_switch(2, 1);
108128: ebffff54 bl 107e80 <led_switch>
DEBUGPCRF("entering main (idle) loop");
10812c: e59f001c ldr r0, [pc, #28] ; 108150 <main+0x74>
108130: e59f101c ldr r1, [pc, #28] ; 108154 <main+0x78>
108134: e3a0204c mov r2, #76 ; 0x4c
108138: ebffff37 bl 107e1c <debugp>
while (1) {
/* Call application specific main idle function */
_main_func();
10813c: eb0007e1 bl 10a0c8 <_main_func>
dbgu_rb_flush();
108140: ebffff18 bl 107da8 <dbgu_rb_flush>
/* restart watchdog timer */
wdt_restart();
108144: eb000344 bl 108e5c <wdt_restart>
108148: eafffffb b 10813c <main+0x60>
10814c: a5000401 .word 0xa5000401
108150: 0010ab3c .word 0x0010ab3c
108154: 0010ab04 .word 0x0010ab04
00108158 <_read_r>:
unsigned int i;
unsigned char *p;
p = (unsigned char*)ptr;
for (i = 0; i < len; i++) {
108158: e3530000 cmp r3, #0
10815c: 01a00003 moveq r0, r3
108160: 0a00000c beq 108198 <_read_r+0x40>
108164: e3a00000 mov r0, #0
//* \brief Return 1 if a character can be read in US_RHR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_RxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_RXRDY);
108168: e3e0cc0d mvn ip, #3328 ; 0xd00
10816c: e51c10eb ldr r1, [ip, #-235] ; 0xffffff15
AT91F_US_PutChar((AT91PS_USART)AT91C_BASE_DBGU, c);
}
static int my_kbhit( void )
{
if ((AT91F_US_RxReady((AT91PS_USART)AT91C_BASE_DBGU)) == 0) return 0;
108170: e3110001 tst r1, #1
108174: 0afffffc beq 10816c <_read_r+0x14>
//* \brief Receive a character,does not check if a character is available
//*----------------------------------------------------------------------------
static inline int AT91F_US_GetChar (
const AT91PS_USART pUSART)
{
return((pUSART->US_RHR) & 0x1FF);
108178: e51c10e7 ldr r1, [ip, #-231] ; 0xffffff19
else return 1;
}
static char my_getc( void )
{
return AT91F_US_GetChar((AT91PS_USART)AT91C_BASE_DBGU);
10817c: e20110ff and r1, r1, #255 ; 0xff
for (i = 0; i < len; i++) {
// c = uart0Getch();
// c = uart0GetchW();
while ( !my_kbhit() ) ;
c = (char) my_getc();
if (c == 0x0D) {
108180: e351000d cmp r1, #13
108184: 0a000005 beq 1081a0 <_read_r+0x48>
unsigned int i;
unsigned char *p;
p = (unsigned char*)ptr;
for (i = 0; i < len; i++) {
108188: e2800001 add r0, r0, #1
10818c: e1500003 cmp r0, r3
c = (char) my_getc();
if (c == 0x0D) {
*p='\0';
break;
}
*p++ = c;
108190: e4c21001 strb r1, [r2], #1
unsigned int i;
unsigned char *p;
p = (unsigned char*)ptr;
for (i = 0; i < len; i++) {
108194: 1afffff4 bne 10816c <_read_r+0x14>
}
*p++ = c;
////// uart0_putc(c);
}
return len - i;
}
108198: e0600003 rsb r0, r0, r3
10819c: e12fff1e bx lr
// c = uart0Getch();
// c = uart0GetchW();
while ( !my_kbhit() ) ;
c = (char) my_getc();
if (c == 0x0D) {
*p='\0';
1081a0: e3a0c000 mov ip, #0
1081a4: e5c2c000 strb ip, [r2]
}
*p++ = c;
////// uart0_putc(c);
}
return len - i;
}
1081a8: e0600003 rsb r0, r0, r3
1081ac: e12fff1e bx lr
001081b0 <_write_r>:
int i;
const unsigned char *p;
p = (const unsigned char*) ptr;
for (i = 0; i < len; i++) {
1081b0: e2530000 subs r0, r3, #0
_ssize_t _write_r (
struct _reent *r,
int file,
const void *ptr,
size_t len)
{
1081b4: e92d0070 push {r4, r5, r6}
int i;
const unsigned char *p;
p = (const unsigned char*) ptr;
for (i = 0; i < len; i++) {
1081b8: 0a00000c beq 1081f0 <_write_r+0x40>
//* \brief Return 1 if a character can be written in US_THR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_TxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_TXRDY);
1081bc: e3e01c0d mvn r1, #3328 ; 0xd00
extern void *_sbrk_r _PARAMS ((struct _reent *, ptrdiff_t));
extern int _stat_r _PARAMS ((struct _reent *, const char *, struct stat *));
extern _CLOCK_T_ _times_r _PARAMS ((struct _reent *, struct tms *));
extern int _unlink_r _PARAMS ((struct _reent *, const char *));
extern int _wait_r _PARAMS ((struct _reent *, int *));
extern _ssize_t _write_r _PARAMS ((struct _reent *, int, const void *, size_t));
1081c0: e0825000 add r5, r2, r0
1081c4: e1a04001 mov r4, r1
//*----------------------------------------------------------------------------
static inline void AT91F_US_PutChar (
AT91PS_USART pUSART,
int character )
{
pUSART->US_THR = (character & 0x1FF);
1081c8: e3a0600d mov r6, #13
if (*p == '\n' ) my_putc('\r');
1081cc: e4d2c001 ldrb ip, [r2], #1
1081d0: e35c000a cmp ip, #10
1081d4: 0a000007 beq 1081f8 <_write_r+0x48>
//* \brief Return 1 if a character can be written in US_THR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_TxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_TXRDY);
1081d8: e51130eb ldr r3, [r1, #-235] ; 0xffffff15
#include <board.h>
static void my_putc(char c)
{
while (!AT91F_US_TxReady((AT91PS_USART)AT91C_BASE_DBGU));
1081dc: e3130002 tst r3, #2
1081e0: 0afffffc beq 1081d8 <_write_r+0x28>
int i;
const unsigned char *p;
p = (const unsigned char*) ptr;
for (i = 0; i < len; i++) {
1081e4: e1520005 cmp r2, r5
//*----------------------------------------------------------------------------
static inline void AT91F_US_PutChar (
AT91PS_USART pUSART,
int character )
{
pUSART->US_THR = (character & 0x1FF);
1081e8: e504c0e3 str ip, [r4, #-227] ; 0xffffff1d
1081ec: 1afffff6 bne 1081cc <_write_r+0x1c>
if (*p == '\n' ) my_putc('\r');
my_putc(*p++);
}
return len;
}
1081f0: e8bd0070 pop {r4, r5, r6}
1081f4: e12fff1e bx lr
//* \brief Return 1 if a character can be written in US_THR
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_US_TxReady (
AT91PS_USART pUSART ) // \arg pointer to a USART controller
{
return (pUSART->US_CSR & AT91C_US_TXRDY);
1081f8: e51130eb ldr r3, [r1, #-235] ; 0xffffff15
#include <board.h>
static void my_putc(char c)
{
while (!AT91F_US_TxReady((AT91PS_USART)AT91C_BASE_DBGU));
1081fc: e3130002 tst r3, #2
108200: 0afffffc beq 1081f8 <_write_r+0x48>
//*----------------------------------------------------------------------------
static inline void AT91F_US_PutChar (
AT91PS_USART pUSART,
int character )
{
pUSART->US_THR = (character & 0x1FF);
108204: e50460e3 str r6, [r4, #-227] ; 0xffffff1d
108208: e552c001 ldrb ip, [r2, #-1]
10820c: eafffff1 b 1081d8 <_write_r+0x28>
00108210 <_close_r>:
int _close_r(
struct _reent *r,
int file)
{
return 0;
}
108210: e3a00000 mov r0, #0
108214: e12fff1e bx lr
00108218 <_lseek_r>:
int file,
_off_t ptr,
int dir)
{
return (_off_t)0; /* Always indicate we are at file beginning. */
}
108218: e3a00000 mov r0, #0
10821c: e12fff1e bx lr
00108220 <_fstat_r>:
struct _reent *r,
int file,
struct stat *st)
{
/* Always set as character device. */
st->st_mode = S_IFCHR;
108220: e3a03a02 mov r3, #8192 ; 0x2000
108224: e5823008 str r3, [r2, #8]
/* assigned to strong type with implicit */
/* signed/unsigned conversion. Required by */
/* newlib. */
return 0;
}
108228: e3a00000 mov r0, #0
10822c: e12fff1e bx lr
00108230 <isatty>:
int isatty(int file); /* avoid warning */
int isatty(int file)
{
return 1;
}
108230: e3a00001 mov r0, #1
108234: e12fff1e bx lr
00108238 <_sbrk_r>:
struct _reent *_s_r,
ptrdiff_t nbytes)
{
char *base; /* errno should be set to ENOMEM on error */
if (!heap_ptr) { /* Initialize if first time through. */
108238: e59f3018 ldr r3, [pc, #24] ; 108258 <_sbrk_r+0x20>
10823c: e5930000 ldr r0, [r3]
108240: e59f2014 ldr r2, [pc, #20] ; 10825c <_sbrk_r+0x24>
108244: e3500000 cmp r0, #0
108248: 01a00002 moveq r0, r2
heap_ptr = end;
}
base = heap_ptr; /* Point to end of heap. */
heap_ptr += nbytes; /* Increase heap. */
10824c: e0801001 add r1, r0, r1
108250: e5831000 str r1, [r3]
return base; /* Return pointer to start of new heap area. */
}
108254: e12fff1e bx lr
108258: 002037e4 .word 0x002037e4
10825c: 00203b4c .word 0x00203b4c
00108260 <usb_hdlr_register>:
static usb_cmd_fn *cmd_hdlrs[16];
int usb_hdlr_register(usb_cmd_fn *hdlr, u_int8_t class)
{
cmd_hdlrs[class] = hdlr;
108260: e59f3008 ldr r3, [pc, #8] ; 108270 <usb_hdlr_register+0x10>
108264: e7830101 str r0, [r3, r1, lsl #2]
return 0;
}
108268: e3a00000 mov r0, #0
10826c: e12fff1e bx lr
108270: 002037e8 .word 0x002037e8
00108274 <usb_hdlr_unregister>:
void usb_hdlr_unregister(u_int8_t class)
{
cmd_hdlrs[class] = NULL;
108274: e59f3008 ldr r3, [pc, #8] ; 108284 <usb_hdlr_unregister+0x10>
108278: e3a02000 mov r2, #0
10827c: e7832100 str r2, [r3, r0, lsl #2]
}
108280: e12fff1e bx lr
108284: 002037e8 .word 0x002037e8
00108288 <usb_out_process>:
}
/* Process all pending request contexts that want to Tx on either
* IN or INTERRUPT endpoint */
void usb_out_process(void)
{
108288: e92d4008 push {r3, lr}
/* interrupts are likely to be more urgent than bulk */
udp_refill_ep(3);
10828c: e3a00003 mov r0, #3
108290: ebfffcb0 bl 107558 <udp_refill_ep>
udp_refill_ep(2);
108294: e3a00002 mov r0, #2
108298: ebfffcae bl 107558 <udp_refill_ep>
}
10829c: e8bd4008 pop {r3, lr}
1082a0: e12fff1e bx lr
001082a4 <usb_in_process>:
/* process incoming USB packets (OUT pipe) that have already been
* put into request contexts by the UDP IRQ handler */
void usb_in_process(void)
{
1082a4: e92d41f0 push {r4, r5, r6, r7, r8, lr}
1082a8: e59f40c0 ldr r4, [pc, #192] ; 108370 <usb_in_process+0xcc>
/* DEBUGP("usb_in(cls=%d) ", OPENPCD_CMD_CLS(poh->cmd));*/
if (rctx->tot_len < sizeof(*poh))
return -EINVAL;
hdlr = cmd_hdlrs[OPENPCD_CMD_CLS(poh->cmd)];
1082ac: e59f50c0 ldr r5, [pc, #192] ; 108374 <usb_in_process+0xd0>
} else
ret = (hdlr)(rctx);
if (ret & USB_RET_ERR) {
poh->val = ret & 0xff;
poh->flags = OPENPCD_FLAG_ERROR;
1082b0: e3e0607f mvn r6, #127 ; 0x7f
* put into request contexts by the UDP IRQ handler */
void usb_in_process(void)
{
struct req_ctx *rctx;
while (rctx = req_ctx_find_get(0, RCTX_STATE_UDP_RCV_DONE,
1082b4: e3a02003 mov r2, #3
1082b8: e3a01002 mov r1, #2
1082bc: e3a00000 mov r0, #0
1082c0: e1a0e00f mov lr, pc
1082c4: e12fff14 bx r4
1082c8: e2507000 subs r7, r0, #0
1082cc: 0a00001b beq 108340 <usb_in_process+0x9c>
usb_cmd_fn *hdlr;
int ret;
/* DEBUGP("usb_in(cls=%d) ", OPENPCD_CMD_CLS(poh->cmd));*/
if (rctx->tot_len < sizeof(*poh))
1082d0: e1d730b6 ldrh r3, [r7, #6]
1082d4: e3530003 cmp r3, #3
cmd_hdlrs[class] = NULL;
}
static int usb_in(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
1082d8: e5978008 ldr r8, [r7, #8]
usb_cmd_fn *hdlr;
int ret;
/* DEBUGP("usb_in(cls=%d) ", OPENPCD_CMD_CLS(poh->cmd));*/
if (rctx->tot_len < sizeof(*poh))
1082dc: 9afffff4 bls 1082b4 <usb_in_process+0x10>
return -EINVAL;
hdlr = cmd_hdlrs[OPENPCD_CMD_CLS(poh->cmd)];
1082e0: e5d82000 ldrb r2, [r8]
1082e4: e1a01222 lsr r1, r2, #4
1082e8: e7953101 ldr r3, [r5, r1, lsl #2]
if (!hdlr) {
1082ec: e3530000 cmp r3, #0
1082f0: 0a000019 beq 10835c <usb_in_process+0xb8>
DEBUGPCR("no handler for this class ");
ret = USB_ERR(USB_ERR_CMD_UNKNOWN);
} else
ret = (hdlr)(rctx);
1082f4: e1a0e00f mov lr, pc
1082f8: e12fff13 bx r3
if (ret & USB_RET_ERR) {
1082fc: e3100c02 tst r0, #512 ; 0x200
108300: 02003c01 andeq r3, r0, #256 ; 0x100
108304: 1a000010 bne 10834c <usb_in_process+0xa8>
poh->val = ret & 0xff;
poh->flags = OPENPCD_FLAG_ERROR;
}
if (ret & USB_RET_RESPOND) {
108308: e3530000 cmp r3, #0
10830c: 0affffe8 beq 1082b4 <usb_in_process+0x10>
req_ctx_set_state(rctx, RCTX_STATE_UDP_EP2_PENDING);
108310: e1a00007 mov r0, r7
108314: e3a01010 mov r1, #16
108318: ebffff15 bl 107f74 <req_ctx_set_state>
udp_refill_ep(2);
10831c: e3a00002 mov r0, #2
108320: ebfffc8c bl 107558 <udp_refill_ep>
* put into request contexts by the UDP IRQ handler */
void usb_in_process(void)
{
struct req_ctx *rctx;
while (rctx = req_ctx_find_get(0, RCTX_STATE_UDP_RCV_DONE,
108324: e3a02003 mov r2, #3
108328: e3a01002 mov r1, #2
10832c: e3a00000 mov r0, #0
108330: e1a0e00f mov lr, pc
108334: e12fff14 bx r4
108338: e2507000 subs r7, r0, #0
10833c: 1affffe3 bne 1082d0 <usb_in_process+0x2c>
RCTX_STATE_MAIN_PROCESSING)) {
/* DEBUGPCRF("found used ctx %u: len=%u",
req_ctx_num(rctx), rctx->tot_len);*/
usb_in(rctx);
}
udp_unthrottle();
108340: ebfffc7e bl 107540 <udp_unthrottle>
}
108344: e8bd41f0 pop {r4, r5, r6, r7, r8, lr}
108348: e12fff1e bx lr
DEBUGPCR("no handler for this class ");
ret = USB_ERR(USB_ERR_CMD_UNKNOWN);
} else
ret = (hdlr)(rctx);
if (ret & USB_RET_ERR) {
10834c: e2003c01 and r3, r0, #256 ; 0x100
poh->val = ret & 0xff;
108350: e5c80003 strb r0, [r8, #3]
poh->flags = OPENPCD_FLAG_ERROR;
108354: e5c86001 strb r6, [r8, #1]
108358: eaffffea b 108308 <usb_in_process+0x64>
if (rctx->tot_len < sizeof(*poh))
return -EINVAL;
hdlr = cmd_hdlrs[OPENPCD_CMD_CLS(poh->cmd)];
if (!hdlr) {
DEBUGPCR("no handler for this class ");
10835c: e59f0014 ldr r0, [pc, #20] ; 108378 <usb_in_process+0xd4>
108360: ebfffead bl 107e1c <debugp>
108364: e3a03c01 mov r3, #256 ; 0x100
108368: e3a00001 mov r0, #1
10836c: eafffff7 b 108350 <usb_in_process+0xac>
108370: 00200080 .word 0x00200080
108374: 002037e8 .word 0x002037e8
108378: 0010ab60 .word 0x0010ab60
0010837c <usbtest_rx>:
static struct req_ctx dummy_rctx;
static struct req_ctx empty_rctx;
static int usbtest_rx(struct req_ctx *rctx)
{
10837c: e92d4038 push {r3, r4, r5, lr}
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
108380: e5904008 ldr r4, [r0, #8]
struct req_ctx *rctx_new;
int i;
switch (poh->cmd) {
108384: e5d43000 ldrb r3, [r4]
108388: e35300f1 cmp r3, #241 ; 0xf1
static struct req_ctx dummy_rctx;
static struct req_ctx empty_rctx;
static int usbtest_rx(struct req_ctx *rctx)
{
10838c: e1a05000 mov r5, r0
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
struct req_ctx *rctx_new;
int i;
switch (poh->cmd) {
108390: 0a000006 beq 1083b0 <usbtest_rx+0x34>
108394: e35300f2 cmp r3, #242 ; 0xf2
108398: 0a00001a beq 108408 <usbtest_rx+0x8c>
/* test bulk out pipe */
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
break;
}
req_ctx_put(rctx);
10839c: e1a00005 mov r0, r5
1083a0: ebfffef9 bl 107f8c <req_ctx_put>
return 1;
1083a4: e3a00001 mov r0, #1
}
1083a8: e8bd4038 pop {r3, r4, r5, lr}
1083ac: e12fff1e bx lr
struct req_ctx *rctx_new;
int i;
switch (poh->cmd) {
case OPENPCD_CMD_USBTEST_IN:
DEBUGP("USBTEST_IN ");
1083b0: e59f0070 ldr r0, [pc, #112] ; 108428 <usbtest_rx+0xac>
1083b4: ebfffe98 bl 107e1c <debugp>
/* test bulk in pipe */
if (poh->val > RCTX_SIZE_LARGE/AT91C_EP_OUT_SIZE)
1083b8: e5d40003 ldrb r0, [r4, #3]
1083bc: e3500020 cmp r0, #32
poh->val = RCTX_SIZE_LARGE/AT91C_EP_OUT_SIZE;
1083c0: 83a00020 movhi r0, #32
1083c4: 85c40003 strbhi r0, [r4, #3]
rctx_new = req_ctx_find_get(1, RCTX_STATE_FREE,
1083c8: e59f305c ldr r3, [pc, #92] ; 10842c <usbtest_rx+0xb0>
1083cc: e3a00001 mov r0, #1
1083d0: e3a010fe mov r1, #254 ; 0xfe
1083d4: e3a02003 mov r2, #3
1083d8: e1a0e00f mov lr, pc
1083dc: e12fff13 bx r3
RCTX_STATE_MAIN_PROCESSING);
if (!rctx_new) {
1083e0: e2503000 subs r3, r0, #0
1083e4: 0a00000b beq 108418 <usbtest_rx+0x9c>
DEBUGP("NO RCTX ");
return USB_ERR(0);
}
rctx_new->tot_len = poh->val * AT91C_EP_OUT_SIZE;
1083e8: e5d41003 ldrb r1, [r4, #3]
1083ec: e1a02301 lsl r2, r1, #6
1083f0: e1c320b6 strh r2, [r3, #6]
req_ctx_set_state(rctx_new, RCTX_STATE_UDP_EP2_PENDING);
1083f4: e3a01010 mov r1, #16
1083f8: ebfffedd bl 107f74 <req_ctx_set_state>
led_toggle(2);
1083fc: e3a00002 mov r0, #2
108400: ebfffeb7 bl 107ee4 <led_toggle>
break;
108404: eaffffe4 b 10839c <usbtest_rx+0x20>
case OPENPCD_CMD_USBTEST_OUT:
DEBUGP("USBTEST_IN ");
108408: e59f0018 ldr r0, [pc, #24] ; 108428 <usbtest_rx+0xac>
10840c: ebfffe82 bl 107e1c <debugp>
/* test bulk out pipe */
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
108410: e59f0018 ldr r0, [pc, #24] ; 108430 <usbtest_rx+0xb4>
108414: eaffffe3 b 1083a8 <usbtest_rx+0x2c>
if (poh->val > RCTX_SIZE_LARGE/AT91C_EP_OUT_SIZE)
poh->val = RCTX_SIZE_LARGE/AT91C_EP_OUT_SIZE;
rctx_new = req_ctx_find_get(1, RCTX_STATE_FREE,
RCTX_STATE_MAIN_PROCESSING);
if (!rctx_new) {
DEBUGP("NO RCTX ");
108418: e59f0014 ldr r0, [pc, #20] ; 108434 <usbtest_rx+0xb8>
10841c: ebfffe7e bl 107e1c <debugp>
return USB_ERR(0);
108420: e3a00c03 mov r0, #768 ; 0x300
108424: eaffffdf b 1083a8 <usbtest_rx+0x2c>
108428: 0010ab80 .word 0x0010ab80
10842c: 00200080 .word 0x00200080
108430: 00000302 .word 0x00000302
108434: 0010ab8c .word 0x0010ab8c
00108438 <usbtest_init>:
req_ctx_put(rctx);
return 1;
}
void usbtest_init(void)
{
108438: e92d4010 push {r4, lr}
dummy_rctx.tot_len = 64;
10843c: e59f4030 ldr r4, [pc, #48] ; 108474 <usbtest_init+0x3c>
108440: e3a0c040 mov ip, #64 ; 0x40
memset(dummy_rctx.data, 0x23, 64);
108444: e3a01023 mov r1, #35 ; 0x23
108448: e5940008 ldr r0, [r4, #8]
10844c: e1a0200c mov r2, ip
return 1;
}
void usbtest_init(void)
{
dummy_rctx.tot_len = 64;
108450: e1c4c0b6 strh ip, [r4, #6]
memset(dummy_rctx.data, 0x23, 64);
108454: eb00079c bl 10a2cc <memset>
empty_rctx.tot_len = 0;
108458: e3a03000 mov r3, #0
usb_hdlr_register(&usbtest_rx, OPENPCD_CMD_CLS_USBTEST);
10845c: e3a0100f mov r1, #15
108460: e59f0010 ldr r0, [pc, #16] ; 108478 <usbtest_init+0x40>
void usbtest_init(void)
{
dummy_rctx.tot_len = 64;
memset(dummy_rctx.data, 0x23, 64);
empty_rctx.tot_len = 0;
108464: e1c431b2 strh r3, [r4, #18]
usb_hdlr_register(&usbtest_rx, OPENPCD_CMD_CLS_USBTEST);
108468: ebffff7c bl 108260 <usb_hdlr_register>
}
10846c: e8bd4010 pop {r4, lr}
108470: e12fff1e bx lr
108474: 00203828 .word 0x00203828
108478: 0010837c .word 0x0010837c
0010847c <tc_cdiv_set_divider>:
static AT91PS_TCB tcb = AT91C_BASE_TCB;
/* set carrier divider to a specific */
void tc_cdiv_set_divider(u_int16_t div)
{
tcb->TCB_TC0.TC_RC = div;
10847c: e59f3018 ldr r3, [pc, #24] ; 10849c <tc_cdiv_set_divider+0x20>
/* set to 50% duty cycle */
tcb->TCB_TC0.TC_RA = 1;
tcb->TCB_TC0.TC_RB = 1 + (div >> 1);
108480: e1a0c0a0 lsr ip, r0, #1
108484: e28c2001 add r2, ip, #1
void tc_cdiv_set_divider(u_int16_t div)
{
tcb->TCB_TC0.TC_RC = div;
/* set to 50% duty cycle */
tcb->TCB_TC0.TC_RA = 1;
108488: e3a01001 mov r1, #1
static AT91PS_TCB tcb = AT91C_BASE_TCB;
/* set carrier divider to a specific */
void tc_cdiv_set_divider(u_int16_t div)
{
tcb->TCB_TC0.TC_RC = div;
10848c: e50300e3 str r0, [r3, #-227] ; 0xffffff1d
/* set to 50% duty cycle */
tcb->TCB_TC0.TC_RA = 1;
108490: e50310eb str r1, [r3, #-235] ; 0xffffff15
tcb->TCB_TC0.TC_RB = 1 + (div >> 1);
108494: e50320e7 str r2, [r3, #-231] ; 0xffffff19
}
108498: e12fff1e bx lr
10849c: fffa00ff .word 0xfffa00ff
001084a0 <tc_cdiv_phase_add>:
void tc_cdiv_phase_add(int16_t inc)
{
1084a0: e92d4038 push {r3, r4, r5, lr}
tcb->TCB_TC0.TC_RA = (tcb->TCB_TC0.TC_RA + inc) % tcb->TCB_TC0.TC_RC;
1084a4: e59f4054 ldr r4, [pc, #84] ; 108500 <tc_cdiv_phase_add+0x60>
1084a8: e51420eb ldr r2, [r4, #-235] ; 0xffffff15
tcb->TCB_TC0.TC_RA = 1;
tcb->TCB_TC0.TC_RB = 1 + (div >> 1);
}
void tc_cdiv_phase_add(int16_t inc)
{
1084ac: e1a05000 mov r5, r0
tcb->TCB_TC0.TC_RA = (tcb->TCB_TC0.TC_RA + inc) % tcb->TCB_TC0.TC_RC;
1084b0: e51410e3 ldr r1, [r4, #-227] ; 0xffffff1d
1084b4: e0800002 add r0, r0, r2
1084b8: eb000818 bl 10a520 <__aeabi_uidivmod>
1084bc: e50410eb str r1, [r4, #-235] ; 0xffffff15
tcb->TCB_TC0.TC_RB = (tcb->TCB_TC0.TC_RB + inc) % tcb->TCB_TC0.TC_RC;
1084c0: e51400e7 ldr r0, [r4, #-231] ; 0xffffff19
1084c4: e51410e3 ldr r1, [r4, #-227] ; 0xffffff1d
1084c8: e0850000 add r0, r5, r0
1084cc: eb000813 bl 10a520 <__aeabi_uidivmod>
1084d0: e50410e7 str r1, [r4, #-231] ; 0xffffff19
/* FIXME: can this be done more elegantly? */
if (tcb->TCB_TC0.TC_RA == 0) {
1084d4: e51430eb ldr r3, [r4, #-235] ; 0xffffff15
1084d8: e3530000 cmp r3, #0
1084dc: 1a000005 bne 1084f8 <tc_cdiv_phase_add+0x58>
tcb->TCB_TC0.TC_RA += 1;
1084e0: e51430eb ldr r3, [r4, #-235] ; 0xffffff15
1084e4: e283e001 add lr, r3, #1
1084e8: e504e0eb str lr, [r4, #-235] ; 0xffffff15
tcb->TCB_TC0.TC_RB += 1;
1084ec: e514c0e7 ldr ip, [r4, #-231] ; 0xffffff19
1084f0: e28c1001 add r1, ip, #1
1084f4: e50410e7 str r1, [r4, #-231] ; 0xffffff19
}
}
1084f8: e8bd4038 pop {r3, r4, r5, lr}
1084fc: e12fff1e bx lr
108500: fffa00ff .word 0xfffa00ff
00108504 <tc_cdiv_init>:
AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC,
((unsigned int) 1 << AT91C_ID_TC0));
/* Enable Clock for TC0 */
tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKEN;
108504: e59f3060 ldr r3, [pc, #96] ; 10856c <tc_cdiv_init+0x68>
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
108508: e3e01c0b mvn r1, #2816 ; 0xb00
pPio->PIO_BSR = periphBEnable;
10850c: e3a00233 mov r0, #805306371 ; 0x30000003
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
108510: e3a0c000 mov ip, #0
108514: e501c08f str ip, [r1, #-143] ; 0xffffff71
108518: e3a02001 mov r2, #1
pPio->PIO_BSR = periphBEnable;
10851c: e501008b str r0, [r1, #-139] ; 0xffffff75
pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
108520: e50100fb str r0, [r1, #-251] ; 0xffffff05
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
108524: e3a00a01 mov r0, #4096 ; 0x1000
108528: e3e01c03 mvn r1, #768 ; 0x300
10852c: e50100ef str r0, [r1, #-239] ; 0xffffff11
108530: e50320ff str r2, [r3, #-255] ; 0xffffff01
/* Connect TCLK1 to XC1, TCLK2 to XC2 */
tcb->TCB_BMR &= ~(AT91C_TCB_TC1XC1S | AT91C_TCB_TC2XC2S);
108534: e513c03b ldr ip, [r3, #-59] ; 0xffffffc5
108538: e3cc003c bic r0, ip, #60 ; 0x3c
10853c: e503003b str r0, [r3, #-59] ; 0xffffffc5
tcb->TCB_BMR |= (AT91C_TCB_TC1XC1S_TCLK1 | AT91C_TCB_TC2XC2S_TCLK2);
108540: e513103b ldr r1, [r3, #-59] ; 0xffffffc5
/* Clock XC1, Wave mode, Reset on RC comp
* TIOA0 on RA comp = set, * TIOA0 on RC comp = clear,
* TIOB0 on EEVT = set, TIOB0 on RB comp = clear,
* EEVT = XC2 (TIOA0) */
tcb->TCB_TC0.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE |
108544: e59fc024 ldr ip, [pc, #36] ; 108570 <tc_cdiv_init+0x6c>
/* Enable Clock for TC0 */
tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKEN;
/* Connect TCLK1 to XC1, TCLK2 to XC2 */
tcb->TCB_BMR &= ~(AT91C_TCB_TC1XC1S | AT91C_TCB_TC2XC2S);
tcb->TCB_BMR |= (AT91C_TCB_TC1XC1S_TCLK1 | AT91C_TCB_TC2XC2S_TCLK2);
108548: e503103b str r1, [r3, #-59] ; 0xffffffc5
static AT91PS_TCB tcb = AT91C_BASE_TCB;
/* set carrier divider to a specific */
void tc_cdiv_set_divider(u_int16_t div)
{
tcb->TCB_TC0.TC_RC = div;
10854c: e3a00080 mov r0, #128 ; 0x80
/* set to 50% duty cycle */
tcb->TCB_TC0.TC_RA = 1;
tcb->TCB_TC0.TC_RB = 1 + (div >> 1);
108550: e3a01041 mov r1, #65 ; 0x41
/* Clock XC1, Wave mode, Reset on RC comp
* TIOA0 on RA comp = set, * TIOA0 on RC comp = clear,
* TIOB0 on EEVT = set, TIOB0 on RB comp = clear,
* EEVT = XC2 (TIOA0) */
tcb->TCB_TC0.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE |
108554: e503c0fb str ip, [r3, #-251] ; 0xffffff05
static AT91PS_TCB tcb = AT91C_BASE_TCB;
/* set carrier divider to a specific */
void tc_cdiv_set_divider(u_int16_t div)
{
tcb->TCB_TC0.TC_RC = div;
108558: e50300e3 str r0, [r3, #-227] ; 0xffffff1d
/* set to 50% duty cycle */
tcb->TCB_TC0.TC_RA = 1;
10855c: e50320eb str r2, [r3, #-235] ; 0xffffff15
tcb->TCB_TC0.TC_RB = 1 + (div >> 1);
108560: e50310e7 str r1, [r3, #-231] ; 0xffffff19
AT91C_TC_BSWTRG_CLEAR | AT91C_TC_ASWTRG_CLEAR;
tc_cdiv_set_divider(128);
/* Reset to start timers */
tcb->TCB_BCR = 1;
108564: e503203f str r2, [r3, #-63] ; 0xffffffc1
}
108568: e12fff1e bx lr
10856c: fffa00ff .word 0xfffa00ff
108570: 9289cd06 .word 0x9289cd06
00108574 <tc_cdiv_print>:
void tc_cdiv_print(void)
{
108574: e92d4010 push {r4, lr}
DEBUGP("TCB_BMR=0x%08x ", tcb->TCB_BMR);
108578: e59f4048 ldr r4, [pc, #72] ; 1085c8 <tc_cdiv_print+0x54>
10857c: e59f0048 ldr r0, [pc, #72] ; 1085cc <tc_cdiv_print+0x58>
108580: e514103b ldr r1, [r4, #-59] ; 0xffffffc5
108584: ebfffe24 bl 107e1c <debugp>
DEBUGP("TC0_CV=0x%08x ", tcb->TCB_TC0.TC_CV);
108588: e51410ef ldr r1, [r4, #-239] ; 0xffffff11
10858c: e59f003c ldr r0, [pc, #60] ; 1085d0 <tc_cdiv_print+0x5c>
108590: ebfffe21 bl 107e1c <debugp>
DEBUGP("TC0_CMR=0x%08x ", tcb->TCB_TC0.TC_CMR);
108594: e51410fb ldr r1, [r4, #-251] ; 0xffffff05
108598: e59f0034 ldr r0, [pc, #52] ; 1085d4 <tc_cdiv_print+0x60>
10859c: ebfffe1e bl 107e1c <debugp>
DEBUGPCR("TC0_SR=0x%08x", tcb->TCB_TC0.TC_SR);
1085a0: e51410df ldr r1, [r4, #-223] ; 0xffffff21
1085a4: e59f002c ldr r0, [pc, #44] ; 1085d8 <tc_cdiv_print+0x64>
1085a8: ebfffe1b bl 107e1c <debugp>
DEBUGPCR("TC0_RA=0x%04x, TC0_RB=0x%04x, TC0_RC=0x%04x",
1085ac: e51410eb ldr r1, [r4, #-235] ; 0xffffff15
1085b0: e59f0024 ldr r0, [pc, #36] ; 1085dc <tc_cdiv_print+0x68>
1085b4: e51420e7 ldr r2, [r4, #-231] ; 0xffffff19
1085b8: e51430e3 ldr r3, [r4, #-227] ; 0xffffff1d
1085bc: ebfffe16 bl 107e1c <debugp>
tcb->TCB_TC0.TC_RA, tcb->TCB_TC0.TC_RB, tcb->TCB_TC0.TC_RC);
}
1085c0: e8bd4010 pop {r4, lr}
1085c4: e12fff1e bx lr
1085c8: fffa00ff .word 0xfffa00ff
1085cc: 0010ab98 .word 0x0010ab98
1085d0: 0010aba8 .word 0x0010aba8
1085d4: 0010abb8 .word 0x0010abb8
1085d8: 0010abc8 .word 0x0010abc8
1085dc: 0010abd8 .word 0x0010abd8
001085e0 <tc_cdiv_fini>:
void tc_cdiv_fini(void)
{
tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKDIS;
1085e0: e59f1014 ldr r1, [pc, #20] ; 1085fc <tc_cdiv_fini+0x1c>
1085e4: e3a00002 mov r0, #2
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_DisablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCDR = periphIds;
1085e8: e3a02a01 mov r2, #4096 ; 0x1000
1085ec: e3e03c03 mvn r3, #768 ; 0x300
1085f0: e50100ff str r0, [r1, #-255] ; 0xffffff01
1085f4: e50320eb str r2, [r3, #-235] ; 0xffffff15
AT91F_PMC_DisablePeriphClock(AT91C_BASE_PMC,
((unsigned int) 1 << AT91C_ID_TC0));
}
1085f8: e12fff1e bx lr
1085fc: fffa00ff .word 0xfffa00ff
00108600 <timer_del>:
int timer_del(struct timer_list *tl)
{
unsigned long flags;
int ret;
local_irq_save(flags);
108600: e10fc000 mrs ip, CPSR
108604: e38c3080 orr r3, ip, #128 ; 0x80
108608: e121f003 msr CPSR_c, r3
static int __timer_remove(struct timer_list *old)
{
struct timer_list *tl, *tl_prev = NULL;
for (tl = timers; tl != NULL; tl = tl->next) {
10860c: e59f1060 ldr r1, [pc, #96] ; 108674 <timer_del+0x74>
108610: e5912000 ldr r2, [r1]
108614: e3520000 cmp r2, #0
return 1;
}
tl_prev = tl;
}
return 0;
108618: 01a00002 moveq r0, r2
static int __timer_remove(struct timer_list *old)
{
struct timer_list *tl, *tl_prev = NULL;
for (tl = timers; tl != NULL; tl = tl->next) {
10861c: 0a000009 beq 108648 <timer_del+0x48>
if (tl == old) {
108620: e1500002 cmp r0, r2
108624: 1a000003 bne 108638 <timer_del+0x38>
108628: ea00000d b 108664 <timer_del+0x64>
10862c: e1500003 cmp r0, r3
108630: 0a000006 beq 108650 <timer_del+0x50>
108634: e1a02003 mov r2, r3
static int __timer_remove(struct timer_list *old)
{
struct timer_list *tl, *tl_prev = NULL;
for (tl = timers; tl != NULL; tl = tl->next) {
108638: e5923000 ldr r3, [r2]
10863c: e3530000 cmp r3, #0
108640: 1afffff9 bne 10862c <timer_del+0x2c>
return 1;
}
tl_prev = tl;
}
return 0;
108644: e1a00003 mov r0, r3
unsigned long flags;
int ret;
local_irq_save(flags);
ret = __timer_remove(tl);
local_irq_restore(flags);
108648: e121f00c msr CPSR_c, ip
return ret;
}
10864c: e12fff1e bx lr
for (tl = timers; tl != NULL; tl = tl->next) {
if (tl == old) {
if (tl == timers)
timers = tl->next;
else
tl_prev->next = tl->next;
108650: e5903000 ldr r3, [r0]
return 1;
108654: e3a00001 mov r0, #1
for (tl = timers; tl != NULL; tl = tl->next) {
if (tl == old) {
if (tl == timers)
timers = tl->next;
else
tl_prev->next = tl->next;
108658: e5823000 str r3, [r2]
unsigned long flags;
int ret;
local_irq_save(flags);
ret = __timer_remove(tl);
local_irq_restore(flags);
10865c: e121f00c msr CPSR_c, ip
return ret;
}
108660: e12fff1e bx lr
struct timer_list *tl, *tl_prev = NULL;
for (tl = timers; tl != NULL; tl = tl->next) {
if (tl == old) {
if (tl == timers)
timers = tl->next;
108664: e5902000 ldr r2, [r0]
else
tl_prev->next = tl->next;
return 1;
108668: e3a00001 mov r0, #1
struct timer_list *tl, *tl_prev = NULL;
for (tl = timers; tl != NULL; tl = tl->next) {
if (tl == old) {
if (tl == timers)
timers = tl->next;
10866c: e5812000 str r2, [r1]
108670: eafffff4 b 108648 <timer_del+0x48>
108674: 00203840 .word 0x00203840
00108678 <pit_irq>:
static void pit_irq(u_int32_t sr)
{
struct timer_list *tl, *next;
if (!(sr & 0x1))
108678: e3100001 tst r0, #1
__timer_insert(tl);
local_irq_restore(flags);
}
static void pit_irq(u_int32_t sr)
{
10867c: e92d4070 push {r4, r5, r6, lr}
struct timer_list *tl, *next;
if (!(sr & 0x1))
108680: 0a00001a beq 1086f0 <pit_irq+0x78>
return;
jiffies += *AT91C_PITC_PIVR >> 20;
108684: e59f606c ldr r6, [pc, #108] ; 1086f8 <pit_irq+0x80>
/* this is the most simple/stupid algorithm one can come up with, but
* hey, we're on a small embedded platform with only a hand ful
* of timers, at all */
for (tl = timers; tl != NULL; tl = next) {
108688: e59f106c ldr r1, [pc, #108] ; 1086fc <pit_irq+0x84>
struct timer_list *tl, *next;
if (!(sr & 0x1))
return;
jiffies += *AT91C_PITC_PIVR >> 20;
10868c: e3e04000 mvn r4, #0
108690: e51422c7 ldr r2, [r4, #-711] ; 0xfffffd39
108694: e5960000 ldr r0, [r6]
/* this is the most simple/stupid algorithm one can come up with, but
* hey, we're on a small embedded platform with only a hand ful
* of timers, at all */
for (tl = timers; tl != NULL; tl = next) {
108698: e5914000 ldr r4, [r1]
struct timer_list *tl, *next;
if (!(sr & 0x1))
return;
jiffies += *AT91C_PITC_PIVR >> 20;
10869c: e0803a22 add r3, r0, r2, lsr #20
/* this is the most simple/stupid algorithm one can come up with, but
* hey, we're on a small embedded platform with only a hand ful
* of timers, at all */
for (tl = timers; tl != NULL; tl = next) {
1086a0: e3540000 cmp r4, #0
struct timer_list *tl, *next;
if (!(sr & 0x1))
return;
jiffies += *AT91C_PITC_PIVR >> 20;
1086a4: e5863000 str r3, [r6]
/* this is the most simple/stupid algorithm one can come up with, but
* hey, we're on a small embedded platform with only a hand ful
* of timers, at all */
for (tl = timers; tl != NULL; tl = next) {
1086a8: 1a000003 bne 1086bc <pit_irq+0x44>
1086ac: ea00000f b 1086f0 <pit_irq+0x78>
1086b0: e3550000 cmp r5, #0
1086b4: 0a00000d beq 1086f0 <pit_irq+0x78>
1086b8: e1a04005 mov r4, r5
next = tl->next;
if (tl->expires <= jiffies) {
1086bc: e5945004 ldr r5, [r4, #4]
1086c0: e596c000 ldr ip, [r6]
1086c4: e155000c cmp r5, ip
/* this is the most simple/stupid algorithm one can come up with, but
* hey, we're on a small embedded platform with only a hand ful
* of timers, at all */
for (tl = timers; tl != NULL; tl = next) {
next = tl->next;
1086c8: e5945000 ldr r5, [r4]
if (tl->expires <= jiffies) {
1086cc: 8afffff7 bhi 1086b0 <pit_irq+0x38>
/* delete timer from list */
timer_del(tl);
1086d0: e1a00004 mov r0, r4
1086d4: ebffffc9 bl 108600 <timer_del>
tl->function(tl->data);
1086d8: e594000c ldr r0, [r4, #12]
1086dc: e594c008 ldr ip, [r4, #8]
1086e0: e1a0e00f mov lr, pc
1086e4: e12fff1c bx ip
jiffies += *AT91C_PITC_PIVR >> 20;
/* this is the most simple/stupid algorithm one can come up with, but
* hey, we're on a small embedded platform with only a hand ful
* of timers, at all */
for (tl = timers; tl != NULL; tl = next) {
1086e8: e3550000 cmp r5, #0
1086ec: 1afffff1 bne 1086b8 <pit_irq+0x40>
/* delete timer from list */
timer_del(tl);
tl->function(tl->data);
}
}
}
1086f0: e8bd4070 pop {r4, r5, r6, lr}
1086f4: e12fff1e bx lr
1086f8: 00203a14 .word 0x00203a14
1086fc: 00203840 .word 0x00203840
00108700 <timer_add>:
return ret;
}
void timer_add(struct timer_list *tl)
{
108700: e92d0070 push {r4, r5, r6}
unsigned long flags;
local_irq_save(flags);
108704: e10f6000 mrs r6, CPSR
108708: e3863080 orr r3, r6, #128 ; 0x80
10870c: e121f003 msr CPSR_c, r3
static void __timer_insert(struct timer_list *new)
{
struct timer_list *tl, *tl_prev = NULL;
if (!timers) {
108710: e59f505c ldr r5, [pc, #92] ; 108774 <timer_add+0x74>
108714: e5954000 ldr r4, [r5]
108718: e3540000 cmp r4, #0
/* optimize for the common, fast case */
new->next = NULL;
10871c: 05804000 streq r4, [r0]
timers = new;
108720: 05850000 streq r0, [r5]
static void __timer_insert(struct timer_list *new)
{
struct timer_list *tl, *tl_prev = NULL;
if (!timers) {
108724: 0a00000f beq 108768 <timer_add+0x68>
timers = new;
return;
}
for (tl = timers; tl != NULL; tl = tl->next) {
if (tl->expires < new->expires) {
108728: e590c004 ldr ip, [r0, #4]
10872c: e1a03004 mov r3, r4
108730: e3a02000 mov r2, #0
108734: e5931004 ldr r1, [r3, #4]
108738: e151000c cmp r1, ip
10873c: 2a000004 bcs 108754 <timer_add+0x54>
/* we need ot add just before this one */
if (!tl_prev) {
108740: e3520000 cmp r2, #0
new->next = timers;
timers = new;
} else {
new->next = tl;
108744: 15803000 strne r3, [r0]
tl_prev->next = new;
108748: 15820000 strne r0, [r2]
for (tl = timers; tl != NULL; tl = tl->next) {
if (tl->expires < new->expires) {
/* we need ot add just before this one */
if (!tl_prev) {
new->next = timers;
10874c: 05804000 streq r4, [r0]
timers = new;
108750: 01a04000 moveq r4, r0
new->next = NULL;
timers = new;
return;
}
for (tl = timers; tl != NULL; tl = tl->next) {
108754: e1a02003 mov r2, r3
108758: e5933000 ldr r3, [r3]
10875c: e3530000 cmp r3, #0
108760: 1afffff3 bne 108734 <timer_add+0x34>
108764: e5854000 str r4, [r5]
{
unsigned long flags;
local_irq_save(flags);
__timer_insert(tl);
local_irq_restore(flags);
108768: e121f006 msr CPSR_c, r6
}
10876c: e8bd0070 pop {r4, r5, r6}
108770: e12fff1e bx lr
108774: 00203840 .word 0x00203840
00108778 <pit_mdelay>:
//* \brief Read PIT CPIV and PICNT without ressetting the counters
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_PITGetPIIR(
AT91PS_PITC pPITC)
{
return(pPITC->PITC_PIIR);
108778: e3e03c02 mvn r3, #512 ; 0x200
10877c: e51320c3 ldr r2, [r3, #-195] ; 0xffffff3d
void pit_mdelay(u_int32_t ms)
{
u_int32_t end;
end = (AT91F_PITGetPIIR(AT91C_BASE_PITC) + ms) % 20;
108780: e59fc020 ldr ip, [pc, #32] ; 1087a8 <pit_mdelay+0x30>
108784: e0800002 add r0, r0, r2
108788: e08c1c90 umull r1, ip, r0, ip
10878c: e1a0122c lsr r1, ip, #4
108790: e0812101 add r2, r1, r1, lsl #2
108794: e0402102 sub r2, r0, r2, lsl #2
108798: e51300c3 ldr r0, [r3, #-195] ; 0xffffff3d
while (end < AT91F_PITGetPIIR(AT91C_BASE_PITC)) { }
10879c: e1520000 cmp r2, r0
1087a0: 3afffffc bcc 108798 <pit_mdelay+0x20>
}
1087a4: e12fff1e bx lr
1087a8: cccccccd .word 0xcccccccd
001087ac <mdelay>:
1087ac: e3e03c02 mvn r3, #512 ; 0x200
1087b0: e51320c3 ldr r2, [r3, #-195] ; 0xffffff3d
void pit_mdelay(u_int32_t ms)
{
u_int32_t end;
end = (AT91F_PITGetPIIR(AT91C_BASE_PITC) + ms) % 20;
1087b4: e59fc020 ldr ip, [pc, #32] ; 1087dc <mdelay+0x30>
1087b8: e0800002 add r0, r0, r2
1087bc: e08c1c90 umull r1, ip, r0, ip
1087c0: e1a0122c lsr r1, ip, #4
1087c4: e0812101 add r2, r1, r1, lsl #2
1087c8: e0402102 sub r2, r0, r2, lsl #2
1087cc: e51300c3 ldr r0, [r3, #-195] ; 0xffffff3d
while (end < AT91F_PITGetPIIR(AT91C_BASE_PITC)) { }
1087d0: e1520000 cmp r2, r0
1087d4: 3afffffc bcc 1087cc <mdelay+0x20>
}
void mdelay(u_int32_t ms)
{
return pit_mdelay(ms);
}
1087d8: e12fff1e bx lr
1087dc: cccccccd .word 0xcccccccd
001087e0 <usleep>:
void usleep(u_int32_t us)
{
return;
return pit_mdelay(us/1000);
}
1087e0: e12fff1e bx lr
001087e4 <pit_init>:
static inline void AT91F_PITInit(
AT91PS_PITC pPITC,
unsigned int period,
unsigned int pit_frequency)
{
pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
1087e4: e59fc040 ldr ip, [pc, #64] ; 10882c <pit_init+0x48>
void pit_init(void)
{
1087e8: e92d4010 push {r4, lr}
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
1087ec: e3e03c03 mvn r3, #768 ; 0x300
static inline void AT91F_PITInit(
AT91PS_PITC pPITC,
unsigned int period,
unsigned int pit_frequency)
{
pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
1087f0: e3e04c02 mvn r4, #512 ; 0x200
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
1087f4: e3a0e002 mov lr, #2
1087f8: e503e0ef str lr, [r3, #-239] ; 0xffffff11
static inline void AT91F_PITInit(
AT91PS_PITC pPITC,
unsigned int period,
unsigned int pit_frequency)
{
pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
1087fc: e504c0cf str ip, [r4, #-207] ; 0xffffff31
pPITC->PITC_PIMR |= AT91C_PITC_PITEN;
108800: e51410cf ldr r1, [r4, #-207] ; 0xffffff31
108804: e3812401 orr r2, r1, #16777216 ; 0x1000000
AT91F_PITC_CfgPMC();
AT91F_PITInit(AT91C_BASE_PITC, 1000000/HZ /* uS */, 48 /* MHz */);
sysirq_register(AT91SAM7_SYSIRQ_PIT, &pit_irq);
108808: e3a00000 mov r0, #0
10880c: e59f101c ldr r1, [pc, #28] ; 108830 <pit_init+0x4c>
108810: e50420cf str r2, [r4, #-207] ; 0xffffff31
108814: eb0002b9 bl 109300 <sysirq_register>
//* \brief Enable PIT periodic interrupt
//*----------------------------------------------------------------------------
static inline void AT91F_PITEnableInt(
AT91PS_PITC pPITC)
{
pPITC->PITC_PIMR |= AT91C_PITC_PITIEN;
108818: e51400cf ldr r0, [r4, #-207] ; 0xffffff31
10881c: e3803402 orr r3, r0, #33554432 ; 0x2000000
108820: e50430cf str r3, [r4, #-207] ; 0xffffff31
AT91F_PITEnableInt(AT91C_BASE_PITC);
}
108824: e8bd4010 pop {r4, lr}
108828: e12fff1e bx lr
10882c: 00007530 .word 0x00007530
108830: 00108678 .word 0x00108678
00108834 <pwm_freq_set>:
return 0;
}
/* set frequency of PWM signal to freq */
int pwm_freq_set(int channel, u_int32_t freq)
{
108834: e92d40f0 push {r4, r5, r6, r7, lr}
u_int32_t overall_div;
u_int32_t presc_total;
u_int8_t cpre = 0;
u_int16_t cprd;
if (freq > MCLK)
108838: e59f7100 ldr r7, [pc, #256] ; 108940 <pwm_freq_set+0x10c>
10883c: e1510007 cmp r1, r7
return 0;
}
/* set frequency of PWM signal to freq */
int pwm_freq_set(int channel, u_int32_t freq)
{
108840: e1a05000 mov r5, r0
108844: e24dd00c sub sp, sp, #12
108848: e1a04001 mov r4, r1
u_int32_t presc_total;
u_int8_t cpre = 0;
u_int16_t cprd;
if (freq > MCLK)
return -ERANGE;
10884c: 83e00021 mvnhi r0, #33 ; 0x21
u_int32_t overall_div;
u_int32_t presc_total;
u_int8_t cpre = 0;
u_int16_t cprd;
if (freq > MCLK)
108850: 9a000002 bls 108860 <pwm_freq_set+0x2c>
DEBUGPCRF("cpre=%u, cprd=%u", cpre, cprd);
AT91F_PWMC_CfgChannel(AT91C_BASE_PWMC, channel,
cpre|AT91C_PWMC_CPOL, cprd, 1);
return 0;
}
108854: e28dd00c add sp, sp, #12
108858: e8bd40f0 pop {r4, r5, r6, r7, lr}
10885c: e12fff1e bx lr
u_int16_t cprd;
if (freq > MCLK)
return -ERANGE;
overall_div = MCLK / freq;
108860: e1a00007 mov r0, r7
108864: eb0006f0 bl 10a42c <__aeabi_uidiv>
DEBUGPCRF("mclk=%u, freq=%u, overall_div=%u", MCLK, freq, overall_div);
108868: e59f10d4 ldr r1, [pc, #212] ; 108944 <pwm_freq_set+0x110>
u_int16_t cprd;
if (freq > MCLK)
return -ERANGE;
overall_div = MCLK / freq;
10886c: e1a06000 mov r6, r0
DEBUGPCRF("mclk=%u, freq=%u, overall_div=%u", MCLK, freq, overall_div);
108870: e3a02049 mov r2, #73 ; 0x49
108874: e59f00cc ldr r0, [pc, #204] ; 108948 <pwm_freq_set+0x114>
108878: e1a03007 mov r3, r7
10887c: e88d0050 stm sp, {r4, r6}
108880: ebfffd65 bl 107e1c <debugp>
if (overall_div > 0x7fff) {
108884: e3560902 cmp r6, #32768 ; 0x8000
/* divisor is larger than half the maximum CPRD register, we
* have to configure prescalers */
presc_total = overall_div >> 15;
108888: 21a007a6 lsrcs r0, r6, #15
static int fhs(u_int32_t val)
{
int i;
for (i = 32; i > 0; i--) {
if (val & (1 << (i-1)))
10888c: 23a01001 movcs r1, #1
/* find highest bit set. returns bit (32..1) or 0 in case no bit set */
static int fhs(u_int32_t val)
{
int i;
for (i = 32; i > 0; i--) {
108890: 23a0401f movcs r4, #31
return -ERANGE;
overall_div = MCLK / freq;
DEBUGPCRF("mclk=%u, freq=%u, overall_div=%u", MCLK, freq, overall_div);
if (overall_div > 0x7fff) {
108894: 2a00001d bcs 108910 <pwm_freq_set+0xdc>
/* subtract one, because of fhs semantics */
cpre--;
}
cprd = overall_div / (1 << cpre);
} else
cprd = overall_div;
108898: e1a01806 lsl r1, r6, #16
10889c: e1a06821 lsr r6, r1, #16
1088a0: e3a04c02 mov r4, #512 ; 0x200
1088a4: e3a03000 mov r3, #0
DEBUGPCRF("cpre=%u, cprd=%u", cpre, cprd);
1088a8: e59f009c ldr r0, [pc, #156] ; 10894c <pwm_freq_set+0x118>
1088ac: e59f1090 ldr r1, [pc, #144] ; 108944 <pwm_freq_set+0x110>
1088b0: e3a0205a mov r2, #90 ; 0x5a
1088b4: e58d6000 str r6, [sp]
1088b8: ebfffd57 bl 107e1c <debugp>
unsigned int channelId, // \arg PWM channel ID
unsigned int mode, // \arg PWM mode
unsigned int period, // \arg PWM period
unsigned int duty) // \arg PWM duty cycle
{
pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
1088bc: e59fc08c ldr ip, [pc, #140] ; 108950 <pwm_freq_set+0x11c>
1088c0: e2852010 add r2, r5, #16
1088c4: e1a01282 lsl r1, r2, #5
pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
1088c8: e1a0300c mov r3, ip
1088cc: e1a05285 lsl r5, r5, #5
unsigned int channelId, // \arg PWM channel ID
unsigned int mode, // \arg PWM mode
unsigned int period, // \arg PWM period
unsigned int duty) // \arg PWM duty cycle
{
pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
1088d0: e081000c add r0, r1, ip
pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
1088d4: e0853003 add r3, r5, r3
unsigned int channelId, // \arg PWM channel ID
unsigned int mode, // \arg PWM mode
unsigned int period, // \arg PWM period
unsigned int duty) // \arg PWM duty cycle
{
pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
1088d8: e241c90d sub ip, r1, #212992 ; 0x34000
pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
1088dc: e3a02001 mov r2, #1
unsigned int channelId, // \arg PWM channel ID
unsigned int mode, // \arg PWM mode
unsigned int period, // \arg PWM period
unsigned int duty) // \arg PWM duty cycle
{
pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
1088e0: e50040ff str r4, [r0, #-255] ; 0xffffff01
pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
1088e4: e58c2004 str r2, [ip, #4]
AT91F_PWMC_CfgChannel(AT91C_BASE_PWMC, channel,
cpre|AT91C_PWMC_CPOL, cprd, 1);
return 0;
1088e8: e3a00000 mov r0, #0
pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
1088ec: e5836109 str r6, [r3, #265] ; 0x109
1088f0: eaffffd7 b 108854 <pwm_freq_set+0x20>
/* find highest bit set. returns bit (32..1) or 0 in case no bit set */
static int fhs(u_int32_t val)
{
int i;
for (i = 32; i > 0; i--) {
1088f4: e3530000 cmp r3, #0
1088f8: e1a04003 mov r4, r3
if (val & (1 << (i-1)))
1088fc: e2432001 sub r2, r3, #1
/* find highest bit set. returns bit (32..1) or 0 in case no bit set */
static int fhs(u_int32_t val)
{
int i;
for (i = 32; i > 0; i--) {
108900: 0a000009 beq 10892c <pwm_freq_set+0xf8>
if (val & (1 << (i-1)))
108904: e0103211 ands r3, r0, r1, lsl r2
108908: 1a000003 bne 10891c <pwm_freq_set+0xe8>
/* find highest bit set. returns bit (32..1) or 0 in case no bit set */
static int fhs(u_int32_t val)
{
int i;
for (i = 32; i > 0; i--) {
10890c: e1a04002 mov r4, r2
if (val & (1 << (i-1)))
108910: e2443001 sub r3, r4, #1
108914: e0102311 ands r2, r0, r1, lsl r3
108918: 0afffff5 beq 1088f4 <pwm_freq_set+0xc0>
* have to configure prescalers */
presc_total = overall_div >> 15;
/* find highest 2^n fitting in prescaler (highest bit set) */
cpre = fhs(presc_total);
if (cpre > 0) {
10891c: e21440ff ands r4, r4, #255 ; 0xff
/* subtract one, because of fhs semantics */
cpre--;
108920: 12444001 subne r4, r4, #1
108924: 120440ff andne r4, r4, #255 ; 0xff
* have to configure prescalers */
presc_total = overall_div >> 15;
/* find highest 2^n fitting in prescaler (highest bit set) */
cpre = fhs(presc_total);
if (cpre > 0) {
108928: e1a03004 mov r3, r4
/* subtract one, because of fhs semantics */
cpre--;
}
cprd = overall_div / (1 << cpre);
10892c: e1a00336 lsr r0, r6, r3
108930: e1a06800 lsl r6, r0, #16
108934: e1a06826 lsr r6, r6, #16
108938: e3844c02 orr r4, r4, #512 ; 0x200
10893c: eaffffd9 b 1088a8 <pwm_freq_set+0x74>
108940: 02dc6c00 .word 0x02dc6c00
108944: 0010ac08 .word 0x0010ac08
108948: 0010ac30 .word 0x0010ac30
10894c: 0010ac5c .word 0x0010ac5c
108950: fffcc0ff .word 0xfffcc0ff
00108954 <pwm_start>:
return 0;
}
void pwm_start(int channel)
{
AT91F_PWMC_StartChannel(AT91C_BASE_PWMC, (1 << channel));
108954: e3a01001 mov r1, #1
108958: e1a03011 lsl r3, r1, r0
//*----------------------------------------------------------------------------
static inline void AT91F_PWMC_StartChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg Channels IDs to be enabled
{
pPWM->PWMC_ENA = flag;
10895c: e59f2004 ldr r2, [pc, #4] ; 108968 <pwm_start+0x14>
108960: e50230fb str r3, [r2, #-251] ; 0xffffff05
}
108964: e12fff1e bx lr
108968: fffcc0ff .word 0xfffcc0ff
0010896c <pwm_stop>:
void pwm_stop(int channel)
{
AT91F_PWMC_StopChannel(AT91C_BASE_PWMC, (1 << channel));
10896c: e3a01001 mov r1, #1
108970: e1a03011 lsl r3, r1, r0
//*----------------------------------------------------------------------------
static inline void AT91F_PWMC_StopChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg Channels IDs to be enabled
{
pPWM->PWMC_DIS = flag;
108974: e59f2004 ldr r2, [pc, #4] ; 108980 <pwm_stop+0x14>
108978: e50230f7 str r3, [r2, #-247] ; 0xffffff09
}
10897c: e12fff1e bx lr
108980: fffcc0ff .word 0xfffcc0ff
00108984 <pwm_duty_set_percent>:
void pwm_duty_set_percent(int channel, u_int16_t duty)
{
108984: e92d4038 push {r3, r4, r5, lr}
u_int32_t tmp = pwm->PWMC_CH[channel].PWMC_CPRDR & 0xffff;
108988: e59f4040 ldr r4, [pc, #64] ; 1089d0 <pwm_duty_set_percent+0x4c>
10898c: e1a0c280 lsl ip, r0, #5
108990: e08c4004 add r4, ip, r4
108994: e5942109 ldr r2, [r4, #265] ; 0x109
tmp = tmp << 16; /* extend value by 2^16 */
tmp = tmp / 100; /* tmp = 1 % of extended cprd */
108998: e59f3034 ldr r3, [pc, #52] ; 1089d4 <pwm_duty_set_percent+0x50>
void pwm_duty_set_percent(int channel, u_int16_t duty)
{
u_int32_t tmp = pwm->PWMC_CH[channel].PWMC_CPRDR & 0xffff;
tmp = tmp << 16; /* extend value by 2^16 */
10899c: e1a00802 lsl r0, r2, #16
tmp = tmp / 100; /* tmp = 1 % of extended cprd */
1089a0: e0802093 umull r2, r0, r3, r0
1089a4: e1a052a0 lsr r5, r0, #5
tmp = duty * tmp; /* tmp = 'duty' % of extended cprd */
1089a8: e0050591 mul r5, r1, r5
tmp = tmp >> 16; /* un-extend tmp (divide by 2^16) */
1089ac: e1a05825 lsr r5, r5, #16
DEBUGPWM("Writing %u to Update register\n", tmp);
1089b0: e59f0020 ldr r0, [pc, #32] ; 1089d8 <pwm_duty_set_percent+0x54>
1089b4: e59f1020 ldr r1, [pc, #32] ; 1089dc <pwm_duty_set_percent+0x58>
1089b8: e3a02074 mov r2, #116 ; 0x74
1089bc: e1a03005 mov r3, r5
1089c0: ebfffd15 bl 107e1c <debugp>
static inline void AT91F_PWMC_UpdateChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int channelId, // \arg PWM channel ID
unsigned int update) // \arg Channels IDs to be enabled
{
pPWM->PWMC_CH[channelId].PWMC_CUPDR = update;
1089c4: e5845111 str r5, [r4, #273] ; 0x111
AT91F_PWMC_UpdateChannel(AT91C_BASE_PWMC, channel, tmp);
}
1089c8: e8bd4038 pop {r3, r4, r5, lr}
1089cc: e12fff1e bx lr
1089d0: fffcc0ff .word 0xfffcc0ff
1089d4: 51eb851f .word 0x51eb851f
1089d8: 0010ac78 .word 0x0010ac78
1089dc: 0010ac18 .word 0x0010ac18
001089e0 <pwm_usb_in>:
static int pwm_usb_in(struct req_ctx *rctx)
{
1089e0: e92d4010 push {r4, lr}
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
1089e4: e5903008 ldr r3, [r0, #8]
u_int32_t *freq;
switch (poh->cmd) {
1089e8: e5d31000 ldrb r1, [r3]
1089ec: e2412041 sub r2, r1, #65 ; 0x41
DEBUGPWM("Writing %u to Update register\n", tmp);
AT91F_PWMC_UpdateChannel(AT91C_BASE_PWMC, channel, tmp);
}
static int pwm_usb_in(struct req_ctx *rctx)
{
1089f0: e1a04000 mov r4, r0
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
u_int32_t *freq;
switch (poh->cmd) {
1089f4: e3520004 cmp r2, #4
1089f8: 979ff102 ldrls pc, [pc, r2, lsl #2]
1089fc: ea000007 b 108a20 <pwm_usb_in+0x40>
108a00: 00108a68 .word 0x00108a68
108a04: 00108a14 .word 0x00108a14
108a08: 00108a50 .word 0x00108a50
108a0c: 00108a34 .word 0x00108a34
108a10: 00108a50 .word 0x00108a50
pwm_start(0);
else
pwm_stop(0);
break;
case OPENPCD_CMD_PWM_DUTY_SET:
pwm_duty_set_percent(0, poh->val);
108a14: e3a00000 mov r0, #0
108a18: e5d31003 ldrb r1, [r3, #3]
108a1c: ebffffd8 bl 108984 <pwm_duty_set_percent>
break;
default:
break;
}
req_ctx_put(rctx);
108a20: e1a00004 mov r0, r4
108a24: ebfffd58 bl 107f8c <req_ctx_put>
return 0;
108a28: e3a00000 mov r0, #0
respond:
req_ctx_set_state(rctx, RCTX_STATE_UDP_EP2_PENDING);
udp_refill_ep(2);
return 1;
}
108a2c: e8bd4010 pop {r4, lr}
108a30: e12fff1e bx lr
break;
case OPENPCD_CMD_PWM_DUTY_GET:
goto respond;
break;
case OPENPCD_CMD_PWM_FREQ_SET:
if (rctx->tot_len < sizeof(*poh)+4)
108a34: e1d0e0b6 ldrh lr, [r0, #6]
108a38: e35e0007 cmp lr, #7
108a3c: 9afffff7 bls 108a20 <pwm_usb_in+0x40>
break;
freq = (u_int32_t *) ((unsigned char *) poh) + sizeof(*poh);
pwm_freq_set(0, *freq);
108a40: e5931010 ldr r1, [r3, #16]
108a44: e3a00000 mov r0, #0
108a48: ebffff79 bl 108834 <pwm_freq_set>
break;
108a4c: eafffff3 b 108a20 <pwm_usb_in+0x40>
}
req_ctx_put(rctx);
return 0;
respond:
req_ctx_set_state(rctx, RCTX_STATE_UDP_EP2_PENDING);
108a50: e3a01010 mov r1, #16
108a54: ebfffd46 bl 107f74 <req_ctx_set_state>
udp_refill_ep(2);
108a58: e3a00002 mov r0, #2
108a5c: ebfffabd bl 107558 <udp_refill_ep>
return 1;
108a60: e3a00001 mov r0, #1
108a64: eafffff0 b 108a2c <pwm_usb_in+0x4c>
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
u_int32_t *freq;
switch (poh->cmd) {
case OPENPCD_CMD_PWM_ENABLE:
if (poh->val)
108a68: e5d3c003 ldrb ip, [r3, #3]
//*----------------------------------------------------------------------------
static inline void AT91F_PWMC_StartChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg Channels IDs to be enabled
{
pPWM->PWMC_ENA = flag;
108a6c: e59f3010 ldr r3, [pc, #16] ; 108a84 <pwm_usb_in+0xa4>
108a70: e35c0000 cmp ip, #0
108a74: e3a00001 mov r0, #1
108a78: 150300fb strne r0, [r3, #-251] ; 0xffffff05
//*----------------------------------------------------------------------------
static inline void AT91F_PWMC_StopChannel(
AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
unsigned int flag) // \arg Channels IDs to be enabled
{
pPWM->PWMC_DIS = flag;
108a7c: 050300f7 streq r0, [r3, #-247] ; 0xffffff09
108a80: eaffffe6 b 108a20 <pwm_usb_in+0x40>
108a84: fffcc0ff .word 0xfffcc0ff
00108a88 <pwm_init>:
udp_refill_ep(2);
return 1;
}
void pwm_init(void)
{
108a88: e92d4008 push {r3, lr}
static inline void AT91F_PIO_CfgInput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int inputEnable) // \arg PIO to be enabled
{
// Disable output
pPio->PIO_ODR = inputEnable;
108a8c: e3e02c0b mvn r2, #2816 ; 0xb00
108a90: e3a03802 mov r3, #131072 ; 0x20000
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
pPio->PIO_BSR = periphBEnable;
108a94: e3a0e502 mov lr, #8388608 ; 0x800000
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
108a98: e3a0c000 mov ip, #0
static inline void AT91F_PIO_CfgInput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int inputEnable) // \arg PIO to be enabled
{
// Disable output
pPio->PIO_ODR = inputEnable;
108a9c: e50230eb str r3, [r2, #-235] ; 0xffffff15
pPio->PIO_PER = inputEnable;
108aa0: e50230ff str r3, [r2, #-255] ; 0xffffff01
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
108aa4: e502c08f str ip, [r2, #-143] ; 0xffffff71
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
108aa8: e3e03c03 mvn r3, #768 ; 0x300
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
pPio->PIO_BSR = periphBEnable;
108aac: e502e08b str lr, [r2, #-139] ; 0xffffff75
pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
108ab0: e502e0fb str lr, [r2, #-251] ; 0xffffff05
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
108ab4: e3a02b01 mov r2, #1024 ; 0x400
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, OPENPCD_PIO_MFIN_PWM);
/* Enable Clock for PWM controller */
AT91F_PWMC_CfgPMC();
usb_hdlr_register(&pwm_usb_in, OPENPCD_CMD_CLS_PWM);
108ab8: e3a01004 mov r1, #4
108abc: e50320ef str r2, [r3, #-239] ; 0xffffff11
108ac0: e59f0008 ldr r0, [pc, #8] ; 108ad0 <pwm_init+0x48>
108ac4: ebfffde5 bl 108260 <usb_hdlr_register>
}
108ac8: e8bd4008 pop {r3, lr}
108acc: e12fff1e bx lr
108ad0: 001089e0 .word 0x001089e0
00108ad4 <pwm_fini>:
void pwm_fini(void)
{
108ad4: e92d4008 push {r3, lr}
usb_hdlr_unregister(OPENPCD_CMD_CLS_PWM);
108ad8: e3a00004 mov r0, #4
108adc: ebfffde4 bl 108274 <usb_hdlr_unregister>
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_DisablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCDR = periphIds;
108ae0: e3a02b01 mov r2, #1024 ; 0x400
108ae4: e3e03c03 mvn r3, #768 ; 0x300
108ae8: e50320eb str r2, [r3, #-235] ; 0xffffff15
AT91F_PMC_DisablePeriphClock(AT91C_BASE_PMC, (1 << AT91C_ID_PWMC));
}
108aec: e8bd4008 pop {r3, lr}
108af0: e12fff1e bx lr
00108af4 <pio_irq_demux>:
//* \brief Return PIO Interrupt Status
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status
AT91PS_PIO pPio) // \arg pointer to a PIO controller
{
return pPio->PIO_ISR;
108af4: e3e00c0b mvn r0, #2816 ; 0xb00
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_PIOA);
}
/* regular interrupt handler, in case fast forcing for PIOA disabled */
static void pio_irq_demux(void)
{
108af8: e92d4008 push {r3, lr}
108afc: e51000b3 ldr r0, [r0, #-179] ; 0xffffff4d
u_int32_t pio = AT91F_PIO_GetInterruptStatus(AT91C_BASE_PIOA);
__pio_irq_demux(pio);
108b00: e59f300c ldr r3, [pc, #12] ; 108b14 <pio_irq_demux+0x20>
108b04: e1a0e00f mov lr, pc
108b08: e12fff13 bx r3
}
108b0c: e8bd4008 pop {r3, lr}
108b10: e12fff1e bx lr
108b14: 002000e8 .word 0x002000e8
00108b18 <pio_irq_enable>:
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_InterruptEnable(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg pio interrupt to be enabled
{
pPio->PIO_IER = flag;
108b18: e3e03c0b mvn r3, #2816 ; 0xb00
108b1c: e50300bf str r0, [r3, #-191] ; 0xffffff41
void pio_irq_enable(u_int32_t pio)
{
AT91F_PIO_InterruptEnable(AT91C_BASE_PIOA, pio);
}
108b20: e12fff1e bx lr
00108b24 <pio_irq_disable>:
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_InterruptDisable(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg pio interrupt to be disabled
{
pPio->PIO_IDR = flag;
108b24: e3e03c0b mvn r3, #2816 ; 0xb00
108b28: e50300bb str r0, [r3, #-187] ; 0xffffff45
void pio_irq_disable(u_int32_t pio)
{
AT91F_PIO_InterruptDisable(AT91C_BASE_PIOA, pio);
}
108b2c: e12fff1e bx lr
00108b30 <pio_irq_register>:
int pio_irq_register(u_int32_t pio, irq_handler_t *handler)
{
108b30: e92d40f0 push {r4, r5, r6, r7, lr}
108b34: e24dd00c sub sp, sp, #12
108b38: e1a04000 mov r4, r0
108b3c: e1a05001 mov r5, r1
u_int8_t num = ffs(pio);
108b40: eb00067f bl 10a544 <__ffssi2>
if (num == 0)
108b44: e21000ff ands r0, r0, #255 ; 0xff
return -EINVAL;
108b48: 03e00015 mvneq r0, #21
int pio_irq_register(u_int32_t pio, irq_handler_t *handler)
{
u_int8_t num = ffs(pio);
if (num == 0)
108b4c: 1a000002 bne 108b5c <pio_irq_register+0x2c>
AT91F_PIO_CfgInput(AT91C_BASE_PIOA, pio);
pirqs.handlers[num] = handler;
DEBUGPCRF("registering handler %p for PIOA %u", handler, num);
return 0;
}
108b50: e28dd00c add sp, sp, #12
108b54: e8bd40f0 pop {r4, r5, r6, r7, lr}
108b58: e12fff1e bx lr
{
u_int8_t num = ffs(pio);
if (num == 0)
return -EINVAL;
num--;
108b5c: e2400001 sub r0, r0, #1
if (pirqs.handlers[num])
108b60: e59f6044 ldr r6, [pc, #68] ; 108bac <pio_irq_register+0x7c>
108b64: e200c0ff and ip, r0, #255 ; 0xff
108b68: e796710c ldr r7, [r6, ip, lsl #2]
108b6c: e3570000 cmp r7, #0
return -EBUSY;
108b70: 13e0000f mvnne r0, #15
if (num == 0)
return -EINVAL;
num--;
if (pirqs.handlers[num])
108b74: 1afffff5 bne 108b50 <pio_irq_register+0x20>
108b78: e3e0ec0b mvn lr, #2816 ; 0xb00
108b7c: e50e40bb str r4, [lr, #-187] ; 0xffffff45
return -EBUSY;
pio_irq_disable(pio);
AT91F_PIO_CfgInput(AT91C_BASE_PIOA, pio);
pirqs.handlers[num] = handler;
DEBUGPCRF("registering handler %p for PIOA %u", handler, num);
108b80: e59f0028 ldr r0, [pc, #40] ; 108bb0 <pio_irq_register+0x80>
static inline void AT91F_PIO_CfgInput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int inputEnable) // \arg PIO to be enabled
{
// Disable output
pPio->PIO_ODR = inputEnable;
108b84: e50e40eb str r4, [lr, #-235] ; 0xffffff15
108b88: e59f1024 ldr r1, [pc, #36] ; 108bb4 <pio_irq_register+0x84>
pPio->PIO_PER = inputEnable;
108b8c: e50e40ff str r4, [lr, #-255] ; 0xffffff01
108b90: e3a0206d mov r2, #109 ; 0x6d
108b94: e1a03005 mov r3, r5
if (pirqs.handlers[num])
return -EBUSY;
pio_irq_disable(pio);
AT91F_PIO_CfgInput(AT91C_BASE_PIOA, pio);
pirqs.handlers[num] = handler;
108b98: e786510c str r5, [r6, ip, lsl #2]
DEBUGPCRF("registering handler %p for PIOA %u", handler, num);
108b9c: e58dc000 str ip, [sp]
108ba0: ebfffc9d bl 107e1c <debugp>
return 0;
108ba4: e1a00007 mov r0, r7
108ba8: eaffffe8 b 108b50 <pio_irq_register+0x20>
108bac: 00203844 .word 0x00203844
108bb0: 0010acec .word 0x0010acec
108bb4: 0010acb4 .word 0x0010acb4
00108bb8 <pio_irq_unregister>:
}
void pio_irq_unregister(u_int32_t pio)
{
108bb8: e92d4010 push {r4, lr}
108bbc: e1a04000 mov r4, r0
u_int8_t num = ffs(pio);
108bc0: eb00065f bl 10a544 <__ffssi2>
if (num == 0)
108bc4: e21000ff ands r0, r0, #255 ; 0xff
108bc8: 0a000006 beq 108be8 <pio_irq_unregister+0x30>
return;
num--;
108bcc: e240c001 sub ip, r0, #1
pio_irq_disable(pio);
pirqs.handlers[num] = NULL;
108bd0: e59f3018 ldr r3, [pc, #24] ; 108bf0 <pio_irq_unregister+0x38>
108bd4: e20c00ff and r0, ip, #255 ; 0xff
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_InterruptDisable(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg pio interrupt to be disabled
{
pPio->PIO_IDR = flag;
108bd8: e3e01c0b mvn r1, #2816 ; 0xb00
108bdc: e3a02000 mov r2, #0
108be0: e50140bb str r4, [r1, #-187] ; 0xffffff45
108be4: e7832100 str r2, [r3, r0, lsl #2]
}
108be8: e8bd4010 pop {r4, lr}
108bec: e12fff1e bx lr
108bf0: 00203844 .word 0x00203844
00108bf4 <pio_irq_init>:
return 0;
}
void pio_irq_init(void)
{
108bf4: e92d4010 push {r4, lr}
AT91F_PIOA_CfgPMC();
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_PIOA,
108bf8: e3a02000 mov r2, #0
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
108bfc: e3a04004 mov r4, #4
108c00: e3e0ec03 mvn lr, #768 ; 0x300
108c04: e59fc02c ldr ip, [pc, #44] ; 108c38 <pio_irq_init+0x44>
return 0;
}
void pio_irq_init(void)
{
108c08: e24dd008 sub sp, sp, #8
AT91F_PIOA_CfgPMC();
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_PIOA,
108c0c: e1a03002 mov r3, r2
108c10: e50e40ef str r4, [lr, #-239] ; 0xffffff11
108c14: e59f0020 ldr r0, [pc, #32] ; 108c3c <pio_irq_init+0x48>
108c18: e3a01002 mov r1, #2
108c1c: e58dc000 str ip, [sp]
108c20: ebffee59 bl 10458c <AT91F_AIC_ConfigureIt>
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
108c24: e3e03c0f mvn r3, #3840 ; 0xf00
108c28: e5834021 str r4, [r3, #33] ; 0x21
AT91C_AIC_PRIOR_LOWEST,
AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &pio_irq_demux);
AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_PIOA);
}
108c2c: e28dd008 add sp, sp, #8
108c30: e8bd4010 pop {r4, lr}
108c34: e12fff1e bx lr
108c38: 00108af4 .word 0x00108af4
108c3c: fffff000 .word 0xfffff000
00108c40 <gen_usb_rx>:
return len;
}
static int gen_usb_rx(struct req_ctx *rctx)
{
108c40: e92d4070 push {r4, r5, r6, lr}
struct openpcd_compile_version *ver =
(struct openpcd_compile_version *)poh->data;
u_int32_t len = rctx->tot_len-sizeof(*poh);
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
108c44: e3a0c004 mov ip, #4
return len;
}
static int gen_usb_rx(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
108c48: e5904008 ldr r4, [r0, #8]
struct openpcd_compile_version *ver =
(struct openpcd_compile_version *)poh->data;
u_int32_t len = rctx->tot_len-sizeof(*poh);
108c4c: e1d020b6 ldrh r2, [r0, #6]
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
108c50: e1c0c0b6 strh ip, [r0, #6]
switch (poh->cmd) {
108c54: e5d41000 ldrb r1, [r4]
108c58: e2413001 sub r3, r1, #1
return len;
}
static int gen_usb_rx(struct req_ctx *rctx)
{
108c5c: e24dd008 sub sp, sp, #8
108c60: e1a05000 mov r5, r0
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
struct openpcd_compile_version *ver =
(struct openpcd_compile_version *)poh->data;
108c64: e2841004 add r1, r4, #4
u_int32_t len = rctx->tot_len-sizeof(*poh);
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
switch (poh->cmd) {
108c68: e3530006 cmp r3, #6
108c6c: 979ff103 ldrls pc, [pc, r3, lsl #2]
108c70: ea00000f b 108cb4 <gen_usb_rx+0x74>
108c74: 00108cbc .word 0x00108cbc
108c78: 00108cec .word 0x00108cec
108c7c: 00108d00 .word 0x00108d00
108c80: 00108d34 .word 0x00108d34
108c84: 00108d4c .word 0x00108d4c
108c88: 00108d84 .word 0x00108d84
108c8c: 00108c90 .word 0x00108c90
//*----------------------------------------------------------------------------
static inline void AT91F_RSTSoftReset(
AT91PS_RSTC pRSTC,
unsigned int reset)
{
pRSTC->RSTC_RCR = (0xA5000000 | reset);
108c90: e59f1150 ldr r1, [pc, #336] ; 108de8 <gen_usb_rx+0x1a8>
108c94: e3e03c02 mvn r3, #512 ; 0x200
108c98: e50310ff str r1, [r3, #-255] ; 0xffffff01
108c9c: e5d40001 ldrb r0, [r4, #1]
DEBUGP("UNKNOWN\n");
return USB_ERR(USB_ERR_CMD_UNKNOWN);
break;
}
if (poh->flags & OPENPCD_FLAG_RESPOND)
108ca0: e2100001 ands r0, r0, #1
return USB_RET_RESPOND;
108ca4: 13a00c01 movne r0, #256 ; 0x100
return 0;
}
108ca8: e28dd008 add sp, sp, #8
108cac: e8bd4070 pop {r4, r5, r6, lr}
108cb0: e12fff1e bx lr
#endif
break;
default:
DEBUGP("UNKNOWN\n");
return USB_ERR(USB_ERR_CMD_UNKNOWN);
108cb4: e59f0130 ldr r0, [pc, #304] ; 108dec <gen_usb_rx+0x1ac>
108cb8: eafffffa b 108ca8 <gen_usb_rx+0x68>
AT91C_RSTC_PERRST|AT91C_RSTC_EXTRST);
break;
case OPENPCD_CMD_GET_VERSION:
DEBUGP("GET_VERSION\n");
poh->flags |= OPENPCD_FLAG_RESPOND;
108cbc: e5d40001 ldrb r0, [r4, #1]
108cc0: e380e001 orr lr, r0, #1
memcpy(ver, &opcd_version, sizeof(*ver));
108cc4: e3a02030 mov r2, #48 ; 0x30
108cc8: e1a00001 mov r0, r1
AT91C_RSTC_PERRST|AT91C_RSTC_EXTRST);
break;
case OPENPCD_CMD_GET_VERSION:
DEBUGP("GET_VERSION\n");
poh->flags |= OPENPCD_FLAG_RESPOND;
108ccc: e5c4e001 strb lr, [r4, #1]
memcpy(ver, &opcd_version, sizeof(*ver));
108cd0: e59f1118 ldr r1, [pc, #280] ; 108df0 <gen_usb_rx+0x1b0>
108cd4: eb00050c bl 10a10c <memcpy>
rctx->tot_len += sizeof(*ver);
108cd8: e1d520b6 ldrh r2, [r5, #6]
108cdc: e282c030 add ip, r2, #48 ; 0x30
108ce0: e1c5c0b6 strh ip, [r5, #6]
108ce4: e5d40001 ldrb r0, [r4, #1]
break;
108ce8: eaffffec b 108ca0 <gen_usb_rx+0x60>
case OPENPCD_CMD_SET_LED:
DEBUGP("SET LED(%u,%u)\n", poh->reg, poh->val);
led_switch(poh->reg, poh->val);
108cec: e5d40002 ldrb r0, [r4, #2]
108cf0: e5d41003 ldrb r1, [r4, #3]
108cf4: ebfffc61 bl 107e80 <led_switch>
108cf8: e5d40001 ldrb r0, [r4, #1]
break;
108cfc: eaffffe7 b 108ca0 <gen_usb_rx+0x60>
case OPENPCD_CMD_GET_SERIAL:
DEBUGP("GET SERIAL(");
poh->flags |= OPENPCD_FLAG_RESPOND;
108d00: e5d4e001 ldrb lr, [r4, #1]
108d04: e38e2001 orr r2, lr, #1
108d08: e5c42001 strb r2, [r4, #1]
#ifdef PCD
rctx->tot_len += 4;
108d0c: e1d0c0b6 ldrh ip, [r0, #6]
108d10: e28c3004 add r3, ip, #4
108d14: e1c030b6 strh r3, [r0, #6]
if (rc632_get_serial(NULL, (u_int32_t *)poh->data) < 0) {
108d18: e3a00000 mov r0, #0
108d1c: eb00047c bl 109f14 <rc632_get_serial>
108d20: e3500000 cmp r0, #0
DEBUGP("ERROR) ");
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
108d24: b59f00c8 ldrlt r0, [pc, #200] ; 108df4 <gen_usb_rx+0x1b4>
case OPENPCD_CMD_GET_SERIAL:
DEBUGP("GET SERIAL(");
poh->flags |= OPENPCD_FLAG_RESPOND;
#ifdef PCD
rctx->tot_len += 4;
if (rc632_get_serial(NULL, (u_int32_t *)poh->data) < 0) {
108d28: baffffde blt 108ca8 <gen_usb_rx+0x68>
108d2c: e5d40001 ldrb r0, [r4, #1]
108d30: eaffffda b 108ca0 <gen_usb_rx+0x60>
switch (poh->cmd) {
case OPENPCD_CMD_GET_API_VERSION:
DEBUGP("CMD_GET_API_VERSION\n");
poh->flags &= OPENPCD_FLAG_RESPOND;
108d34: e5d40001 ldrb r0, [r4, #1]
poh->val = OPENPCD_API_VERSION;
108d38: e3a02001 mov r2, #1
switch (poh->cmd) {
case OPENPCD_CMD_GET_API_VERSION:
DEBUGP("CMD_GET_API_VERSION\n");
poh->flags &= OPENPCD_FLAG_RESPOND;
108d3c: e2000001 and r0, r0, #1
108d40: e5c40001 strb r0, [r4, #1]
poh->val = OPENPCD_API_VERSION;
108d44: e5c42003 strb r2, [r4, #3]
break;
108d48: eaffffd4 b 108ca0 <gen_usb_rx+0x60>
case OPENPCD_CMD_GET_ENVIRONMENT:
poh->flags &= OPENPCD_FLAG_RESPOND;
108d4c: e5d4c001 ldrb ip, [r4, #1]
poh->val = gen_getenv(&poh->data,poh->val);
108d50: e5d46003 ldrb r6, [r4, #3]
poh->flags &= OPENPCD_FLAG_RESPOND;
poh->val = OPENPCD_API_VERSION;
break;
case OPENPCD_CMD_GET_ENVIRONMENT:
poh->flags &= OPENPCD_FLAG_RESPOND;
108d54: e20ce001 and lr, ip, #1
static int gen_getenv(void* buffer,int len)
{
if( len >= sizeof(config_stack) )
len=sizeof(config_stack);
memcpy(buffer,&config_stack,len);
108d58: e1a00001 mov r0, r1
108d5c: e1a02006 mov r2, r6
poh->flags &= OPENPCD_FLAG_RESPOND;
poh->val = OPENPCD_API_VERSION;
break;
case OPENPCD_CMD_GET_ENVIRONMENT:
poh->flags &= OPENPCD_FLAG_RESPOND;
108d60: e5c4e001 strb lr, [r4, #1]
static int gen_getenv(void* buffer,int len)
{
if( len >= sizeof(config_stack) )
len=sizeof(config_stack);
memcpy(buffer,&config_stack,len);
108d64: e59f108c ldr r1, [pc, #140] ; 108df8 <gen_usb_rx+0x1b8>
108d68: eb0004e7 bl 10a10c <memcpy>
poh->val = OPENPCD_API_VERSION;
break;
case OPENPCD_CMD_GET_ENVIRONMENT:
poh->flags &= OPENPCD_FLAG_RESPOND;
poh->val = gen_getenv(&poh->data,poh->val);
108d6c: e5c46003 strb r6, [r4, #3]
rctx->tot_len += poh->val;
108d70: e1d530b6 ldrh r3, [r5, #6]
108d74: e0866003 add r6, r6, r3
108d78: e1c560b6 strh r6, [r5, #6]
108d7c: e5d40001 ldrb r0, [r4, #1]
DEBUGP("CMD_GET_ENVIRONMENT(res_len=%u)\n", poh->val);
break;
108d80: eaffffc6 b 108ca0 <gen_usb_rx+0x60>
static int gen_usb_rx(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
struct openpcd_compile_version *ver =
(struct openpcd_compile_version *)poh->data;
u_int32_t len = rctx->tot_len-sizeof(*poh);
108d84: e2422004 sub r2, r2, #4
u_int32_t *dst;
if( len >= sizeof(config_stack) )
len=sizeof(config_stack);
memcpy(&config_stack,buffer,len);
108d88: e35200ff cmp r2, #255 ; 0xff
108d8c: 83a02c01 movhi r2, #256 ; 0x100
108d90: e59f0060 ldr r0, [pc, #96] ; 108df8 <gen_usb_rx+0x1b8>
108d94: eb0004dc bl 10a10c <memcpy>
/* retrieve current content to allow partial flashing */
/* flash changes */
dst=(u_int32_t*)CONFIG_AREA_ADDR;
for(i=0;i<CONFIG_AREA_WORDS;i++)
108d98: e3a02000 mov r2, #0
108d9c: e58d2004 str r2, [sp, #4]
108da0: e59d1004 ldr r1, [sp, #4]
108da4: e351003f cmp r1, #63 ; 0x3f
108da8: 8a00000a bhi 108dd8 <gen_usb_rx+0x198>
108dac: e59f3048 ldr r3, [pc, #72] ; 108dfc <gen_usb_rx+0x1bc>
108db0: e59f1040 ldr r1, [pc, #64] ; 108df8 <gen_usb_rx+0x1b8>
*dst++=config_stack[i];
108db4: e59d0004 ldr r0, [sp, #4]
108db8: e7912100 ldr r2, [r1, r0, lsl #2]
108dbc: e4832004 str r2, [r3], #4
/* retrieve current content to allow partial flashing */
/* flash changes */
dst=(u_int32_t*)CONFIG_AREA_ADDR;
for(i=0;i<CONFIG_AREA_WORDS;i++)
108dc0: e59dc004 ldr ip, [sp, #4]
108dc4: e28ce001 add lr, ip, #1
108dc8: e58de004 str lr, [sp, #4]
108dcc: e59d0004 ldr r0, [sp, #4]
108dd0: e350003f cmp r0, #63 ; 0x3f
108dd4: 9afffff6 bls 108db4 <gen_usb_rx+0x174>
*dst++=config_stack[i];
flash_page(CONFIG_AREA_ADDR);
108dd8: e59f001c ldr r0, [pc, #28] ; 108dfc <gen_usb_rx+0x1bc>
108ddc: eb00015d bl 109358 <flash_page>
108de0: e5d40001 ldrb r0, [r4, #1]
break;
case OPENPCD_CMD_SET_ENVIRONMENT:
DEBUGP("CMD_SET_ENVIRONMENT (in_len=%u)\n", len);
gen_setenv(&poh->data,len);
break;
108de4: eaffffad b 108ca0 <gen_usb_rx+0x60>
108de8: a500000d .word 0xa500000d
108dec: 00000301 .word 0x00000301
108df0: 0010ab0c .word 0x0010ab0c
108df4: 00000302 .word 0x00000302
108df8: 00203a18 .word 0x00203a18
108dfc: 0011ff00 .word 0x0011ff00
00108e00 <usbcmd_gen_init>:
return USB_RET_RESPOND;
return 0;
}
void usbcmd_gen_init(void)
{
108e00: e92d4008 push {r3, lr}
DEBUGP("Inititalizing usbcmd_gen_init\n");
/* setup FLASH write support for environment storage */
flash_init();
108e04: eb00017b bl 1093f8 <flash_init>
/* retrieve default data from flash */
memcpy(&config_stack,CONFIG_AREA_ADDR,sizeof(config_stack));
108e08: e59f101c ldr r1, [pc, #28] ; 108e2c <usbcmd_gen_init+0x2c>
108e0c: e3a02c01 mov r2, #256 ; 0x100
108e10: e59f0018 ldr r0, [pc, #24] ; 108e30 <usbcmd_gen_init+0x30>
108e14: eb0004bc bl 10a10c <memcpy>
usb_hdlr_register(&gen_usb_rx, OPENPCD_CMD_CLS_GENERIC);
108e18: e3a01000 mov r1, #0
108e1c: e59f0010 ldr r0, [pc, #16] ; 108e34 <usbcmd_gen_init+0x34>
108e20: ebfffd0e bl 108260 <usb_hdlr_register>
}
108e24: e8bd4008 pop {r3, lr}
108e28: e12fff1e bx lr
108e2c: 0011ff00 .word 0x0011ff00
108e30: 00203a18 .word 0x00203a18
108e34: 00108c40 .word 0x00108c40
00108e38 <wdt_irq>:
#ifdef WDT_DEBUG
#undef WDT_DEBUG
#endif/*WDT_DEBUG*/
static void wdt_irq(u_int32_t sr)
{
108e38: e92d4008 push {r3, lr}
DEBUGPCRF("================> WATCHDOG EXPIRED !!!!!");
108e3c: e59f0010 ldr r0, [pc, #16] ; 108e54 <wdt_irq+0x1c>
108e40: e59f1010 ldr r1, [pc, #16] ; 108e58 <wdt_irq+0x20>
108e44: e3a02020 mov r2, #32
108e48: ebfffbf3 bl 107e1c <debugp>
}
108e4c: e8bd4008 pop {r3, lr}
108e50: e12fff1e bx lr
108e54: 0010ad24 .word 0x0010ad24
108e58: 0010ad1c .word 0x0010ad1c
00108e5c <wdt_restart>:
//* \brief Restart Watchdog
//*----------------------------------------------------------------------------
static inline void AT91F_WDTRestart(
AT91PS_WDTC pWDTC)
{
pWDTC->WDTC_WDCR = 0xA5000001;
108e5c: e59f2008 ldr r2, [pc, #8] ; 108e6c <wdt_restart+0x10>
108e60: e3e03c02 mvn r3, #512 ; 0x200
108e64: e50320bf str r2, [r3, #-191] ; 0xffffff41
void wdt_restart(void)
{
AT91F_WDTRestart(AT91C_BASE_WDTC);
}
108e68: e12fff1e bx lr
108e6c: a5000001 .word 0xa5000001
00108e70 <wdt_init>:
void wdt_init(void)
{
108e70: e92d4008 push {r3, lr}
sysirq_register(AT91SAM7_SYSIRQ_WDT, &wdt_irq);
108e74: e3a00003 mov r0, #3
108e78: e59f1014 ldr r1, [pc, #20] ; 108e94 <wdt_init+0x24>
108e7c: eb00011f bl 109300 <sysirq_register>
//*----------------------------------------------------------------------------
static inline void AT91F_WDTSetMode(
AT91PS_WDTC pWDTC,
unsigned int Mode)
{
pWDTC->WDTC_WDMR = Mode;
108e80: e59f2010 ldr r2, [pc, #16] ; 108e98 <wdt_init+0x28>
108e84: e3e03c02 mvn r3, #512 ; 0x200
108e88: e50320bb str r2, [r3, #-187] ; 0xffffff45
AT91C_WDTC_WDFIEN);
#else
AT91F_WDTSetMode(AT91C_BASE_WDTC, (0x80 << 16) |
AT91C_WDTC_WDRSTEN | 0x80);
#endif
}
108e8c: e8bd4008 pop {r3, lr}
108e90: e12fff1e bx lr
108e94: 00108e38 .word 0x00108e38
108e98: 00802080 .word 0x00802080
00108e9c <blinkcode_cb>:
};
static struct blinker blink_state[NUM_LEDS];
static void blinkcode_cb(void *data)
{
108e9c: e92d4030 push {r4, r5, lr}
/* we got called back by the timer */
struct blinker *bl = data;
DEBUGPCRF("(jiffies=%lu, data=%p, state=%u)",
108ea0: e59f513c ldr r5, [pc, #316] ; 108fe4 <blinkcode_cb+0x148>
108ea4: e5d0c010 ldrb ip, [r0, #16]
};
static struct blinker blink_state[NUM_LEDS];
static void blinkcode_cb(void *data)
{
108ea8: e24dd00c sub sp, sp, #12
108eac: e1a04000 mov r4, r0
/* we got called back by the timer */
struct blinker *bl = data;
DEBUGPCRF("(jiffies=%lu, data=%p, state=%u)",
108eb0: e5953000 ldr r3, [r5]
108eb4: e59f012c ldr r0, [pc, #300] ; 108fe8 <blinkcode_cb+0x14c>
108eb8: e59f112c ldr r1, [pc, #300] ; 108fec <blinkcode_cb+0x150>
108ebc: e3a0202a mov r2, #42 ; 0x2a
108ec0: e88d1010 stm sp, {r4, ip}
108ec4: ebfffbd4 bl 107e1c <debugp>
jiffies, data, bl->state);
switch (bl->state) {
108ec8: e5d43010 ldrb r3, [r4, #16]
108ecc: e3530005 cmp r3, #5
108ed0: 979ff103 ldrls pc, [pc, r3, lsl #2]
108ed4: ea00000d b 108f10 <blinkcode_cb+0x74>
108ed8: 00108f34 .word 0x00108f34
108edc: 00108f60 .word 0x00108f60
108ee0: 00108f84 .word 0x00108f84
108ee4: 00108fa8 .word 0x00108fa8
108ee8: 00108ef0 .word 0x00108ef0
108eec: 00108f24 .word 0x00108f24
if (bl->cur <= 0)
bl->state = BLINKCODE_STATE_DONE;
break;
case BLINKCODE_STATE_BLINK_ON:
/* we've been on, turn off */
led_switch(bl->led, 0);
108ef0: e5d4001c ldrb r0, [r4, #28]
108ef4: e3a01000 mov r1, #0
108ef8: ebfffbe0 bl 107e80 <led_switch>
bl->state = BLINKCODE_STATE_BLINK_OFF;
bl->timer.expires = jiffies + TIME_BLINK;
108efc: e5951000 ldr r1, [r5]
bl->state = BLINKCODE_STATE_DONE;
break;
case BLINKCODE_STATE_BLINK_ON:
/* we've been on, turn off */
led_switch(bl->led, 0);
bl->state = BLINKCODE_STATE_BLINK_OFF;
108f00: e3a02003 mov r2, #3
bl->timer.expires = jiffies + TIME_BLINK;
108f04: e2810019 add r0, r1, #25
bl->state = BLINKCODE_STATE_DONE;
break;
case BLINKCODE_STATE_BLINK_ON:
/* we've been on, turn off */
led_switch(bl->led, 0);
bl->state = BLINKCODE_STATE_BLINK_OFF;
108f08: e5c42010 strb r2, [r4, #16]
bl->timer.expires = jiffies + TIME_BLINK;
108f0c: e5840004 str r0, [r4, #4]
led_switch(bl->led, 0);
return;
break;
}
/* default case: re-add the timer */
timer_add(&bl->timer);
108f10: e1a00004 mov r0, r4
108f14: ebfffdf9 bl 108700 <timer_add>
}
108f18: e28dd00c add sp, sp, #12
108f1c: e8bd4030 pop {r4, r5, lr}
108f20: e12fff1e bx lr
bl->state = BLINKCODE_STATE_BLINK_OFF;
bl->timer.expires = jiffies + TIME_BLINK;
break;
case BLINKCODE_STATE_DONE:
/* we've been on, turn off */
led_switch(bl->led, 0);
108f24: e5d4001c ldrb r0, [r4, #28]
108f28: e3a01000 mov r1, #0
108f2c: ebfffbd3 bl 107e80 <led_switch>
return;
108f30: eafffff8 b 108f18 <blinkcode_cb+0x7c>
DEBUGPCRF("(jiffies=%lu, data=%p, state=%u)",
jiffies, data, bl->state);
switch (bl->state) {
case BLINKCODE_STATE_NONE:
led_switch(bl->led, 0);
108f34: e5d4001c ldrb r0, [r4, #28]
108f38: e3a01000 mov r1, #0
108f3c: ebfffbcf bl 107e80 <led_switch>
bl->state = BLINKCODE_STATE_SILENT;
bl->timer.expires = jiffies + TIME_SILENT;
108f40: e5953000 ldr r3, [r5]
bl->cur = bl->num;
108f44: e5940014 ldr r0, [r4, #20]
jiffies, data, bl->state);
switch (bl->state) {
case BLINKCODE_STATE_NONE:
led_switch(bl->led, 0);
bl->state = BLINKCODE_STATE_SILENT;
bl->timer.expires = jiffies + TIME_SILENT;
108f48: e2832064 add r2, r3, #100 ; 0x64
DEBUGPCRF("(jiffies=%lu, data=%p, state=%u)",
jiffies, data, bl->state);
switch (bl->state) {
case BLINKCODE_STATE_NONE:
led_switch(bl->led, 0);
bl->state = BLINKCODE_STATE_SILENT;
108f4c: e3a01001 mov r1, #1
108f50: e5c41010 strb r1, [r4, #16]
bl->timer.expires = jiffies + TIME_SILENT;
108f54: e5842004 str r2, [r4, #4]
bl->cur = bl->num;
108f58: e5840018 str r0, [r4, #24]
break;
108f5c: eaffffeb b 108f10 <blinkcode_cb+0x74>
case BLINKCODE_STATE_SILENT:
/* we've finished the period of silence, turn led on */
led_switch(bl->led, 1);
108f60: e5d4001c ldrb r0, [r4, #28]
108f64: e3a01001 mov r1, #1
108f68: ebfffbc4 bl 107e80 <led_switch>
bl->state = BLINKCODE_STATE_INIT;
bl->timer.expires = jiffies + TIME_INIT;
108f6c: e5952000 ldr r2, [r5]
bl->cur = bl->num;
break;
case BLINKCODE_STATE_SILENT:
/* we've finished the period of silence, turn led on */
led_switch(bl->led, 1);
bl->state = BLINKCODE_STATE_INIT;
108f70: e3a00002 mov r0, #2
bl->timer.expires = jiffies + TIME_INIT;
108f74: e282c064 add ip, r2, #100 ; 0x64
bl->cur = bl->num;
break;
case BLINKCODE_STATE_SILENT:
/* we've finished the period of silence, turn led on */
led_switch(bl->led, 1);
bl->state = BLINKCODE_STATE_INIT;
108f78: e5c40010 strb r0, [r4, #16]
bl->timer.expires = jiffies + TIME_INIT;
108f7c: e584c004 str ip, [r4, #4]
break;
108f80: eaffffe2 b 108f10 <blinkcode_cb+0x74>
case BLINKCODE_STATE_INIT:
/* we've finished the period of init */
led_switch(bl->led, 0);
108f84: e3a01000 mov r1, #0
108f88: e5d4001c ldrb r0, [r4, #28]
108f8c: ebfffbbb bl 107e80 <led_switch>
bl->state = BLINKCODE_STATE_BLINK_OFF;
bl->timer.expires = jiffies + TIME_INIT;
108f90: e595c000 ldr ip, [r5]
bl->timer.expires = jiffies + TIME_INIT;
break;
case BLINKCODE_STATE_INIT:
/* we've finished the period of init */
led_switch(bl->led, 0);
bl->state = BLINKCODE_STATE_BLINK_OFF;
108f94: e3a03003 mov r3, #3
bl->timer.expires = jiffies + TIME_INIT;
108f98: e28c1064 add r1, ip, #100 ; 0x64
bl->timer.expires = jiffies + TIME_INIT;
break;
case BLINKCODE_STATE_INIT:
/* we've finished the period of init */
led_switch(bl->led, 0);
bl->state = BLINKCODE_STATE_BLINK_OFF;
108f9c: e5c43010 strb r3, [r4, #16]
bl->timer.expires = jiffies + TIME_INIT;
108fa0: e5841004 str r1, [r4, #4]
break;
108fa4: eaffffd9 b 108f10 <blinkcode_cb+0x74>
case BLINKCODE_STATE_BLINK_OFF:
/* we've been off, turn on */
led_switch(bl->led, 1);
108fa8: e5d4001c ldrb r0, [r4, #28]
108fac: e3a01001 mov r1, #1
108fb0: ebfffbb2 bl 107e80 <led_switch>
bl->state = BLINKCODE_STATE_BLINK_ON;
bl->cur--;
108fb4: e5943018 ldr r3, [r4, #24]
bl->timer.expires = jiffies + TIME_BLINK;
108fb8: e595c000 ldr ip, [r5]
break;
case BLINKCODE_STATE_BLINK_OFF:
/* we've been off, turn on */
led_switch(bl->led, 1);
bl->state = BLINKCODE_STATE_BLINK_ON;
bl->cur--;
108fbc: e2430001 sub r0, r3, #1
bl->timer.expires = jiffies + TIME_BLINK;
if (bl->cur <= 0)
108fc0: e3500000 cmp r0, #0
case BLINKCODE_STATE_BLINK_OFF:
/* we've been off, turn on */
led_switch(bl->led, 1);
bl->state = BLINKCODE_STATE_BLINK_ON;
bl->cur--;
bl->timer.expires = jiffies + TIME_BLINK;
108fc4: e28c2019 add r2, ip, #25
bl->timer.expires = jiffies + TIME_INIT;
break;
case BLINKCODE_STATE_BLINK_OFF:
/* we've been off, turn on */
led_switch(bl->led, 1);
bl->state = BLINKCODE_STATE_BLINK_ON;
108fc8: e3a01004 mov r1, #4
bl->cur--;
108fcc: e5840018 str r0, [r4, #24]
bl->timer.expires = jiffies + TIME_BLINK;
if (bl->cur <= 0)
bl->state = BLINKCODE_STATE_DONE;
108fd0: d3a00005 movle r0, #5
bl->timer.expires = jiffies + TIME_INIT;
break;
case BLINKCODE_STATE_BLINK_OFF:
/* we've been off, turn on */
led_switch(bl->led, 1);
bl->state = BLINKCODE_STATE_BLINK_ON;
108fd4: e5c41010 strb r1, [r4, #16]
bl->cur--;
bl->timer.expires = jiffies + TIME_BLINK;
108fd8: e5842004 str r2, [r4, #4]
if (bl->cur <= 0)
bl->state = BLINKCODE_STATE_DONE;
108fdc: d5c40010 strble r0, [r4, #16]
108fe0: eaffffca b 108f10 <blinkcode_cb+0x74>
108fe4: 00203a14 .word 0x00203a14
108fe8: 0010ad78 .word 0x0010ad78
108fec: 0010ad58 .word 0x0010ad58
00108ff0 <blinkcode_set>:
/* default case: re-add the timer */
timer_add(&bl->timer);
}
void blinkcode_set(int led, enum blinkcode_num num)
{
108ff0: e92d4070 push {r4, r5, r6, lr}
DEBUGPCRF("(jiffies=%lu, led=%u, num=%u)", jiffies, led, num);
108ff4: e59f6074 ldr r6, [pc, #116] ; 109070 <blinkcode_set+0x80>
/* default case: re-add the timer */
timer_add(&bl->timer);
}
void blinkcode_set(int led, enum blinkcode_num num)
{
108ff8: e24dd008 sub sp, sp, #8
108ffc: e1a04000 mov r4, r0
109000: e1a05001 mov r5, r1
DEBUGPCRF("(jiffies=%lu, led=%u, num=%u)", jiffies, led, num);
109004: e58d4000 str r4, [sp]
109008: e5963000 ldr r3, [r6]
10900c: e59f0060 ldr r0, [pc, #96] ; 109074 <blinkcode_set+0x84>
109010: e59f1060 ldr r1, [pc, #96] ; 109078 <blinkcode_set+0x88>
109014: e3a02059 mov r2, #89 ; 0x59
if (--led > NUM_LEDS)
109018: e2444001 sub r4, r4, #1
timer_add(&bl->timer);
}
void blinkcode_set(int led, enum blinkcode_num num)
{
DEBUGPCRF("(jiffies=%lu, led=%u, num=%u)", jiffies, led, num);
10901c: e58d5004 str r5, [sp, #4]
109020: ebfffb7d bl 107e1c <debugp>
if (--led > NUM_LEDS)
109024: e3540002 cmp r4, #2
109028: da000002 ble 109038 <blinkcode_set+0x48>
blink_state[led].state = BLINKCODE_STATE_NONE;
blink_state[led].timer.expires = jiffies;
if (num != BLINKCODE_NONE)
timer_add(&blink_state[led].timer);
}
10902c: e28dd008 add sp, sp, #8
109030: e8bd4070 pop {r4, r5, r6, lr}
109034: e12fff1e bx lr
DEBUGPCRF("(jiffies=%lu, led=%u, num=%u)", jiffies, led, num);
if (--led > NUM_LEDS)
return;
timer_del(&blink_state[led].timer);
109038: e59f003c ldr r0, [pc, #60] ; 10907c <blinkcode_set+0x8c>
10903c: e0804284 add r4, r0, r4, lsl #5
109040: e1a00004 mov r0, r4
109044: ebfffd6d bl 108600 <timer_del>
blink_state[led].num = num;
blink_state[led].state = BLINKCODE_STATE_NONE;
blink_state[led].timer.expires = jiffies;
109048: e5963000 ldr r3, [r6]
return;
timer_del(&blink_state[led].timer);
blink_state[led].num = num;
blink_state[led].state = BLINKCODE_STATE_NONE;
10904c: e3a02000 mov r2, #0
blink_state[led].timer.expires = jiffies;
if (num != BLINKCODE_NONE)
109050: e3550000 cmp r5, #0
if (--led > NUM_LEDS)
return;
timer_del(&blink_state[led].timer);
blink_state[led].num = num;
109054: e5845014 str r5, [r4, #20]
blink_state[led].state = BLINKCODE_STATE_NONE;
109058: e5c42010 strb r2, [r4, #16]
blink_state[led].timer.expires = jiffies;
10905c: e5843004 str r3, [r4, #4]
if (num != BLINKCODE_NONE)
109060: 0afffff1 beq 10902c <blinkcode_set+0x3c>
timer_add(&blink_state[led].timer);
109064: e1a00004 mov r0, r4
109068: ebfffda4 bl 108700 <timer_add>
10906c: eaffffee b 10902c <blinkcode_set+0x3c>
109070: 00203a14 .word 0x00203a14
109074: 0010ada4 .word 0x0010ada4
109078: 0010ad68 .word 0x0010ad68
10907c: 002038cc .word 0x002038cc
00109080 <blinkcode_init>:
void blinkcode_init(void)
{
int i;
for (i = 0; i < NUM_LEDS; i++) {
blink_state[i].num = 0;
109080: e59f303c ldr r3, [pc, #60] ; 1090c4 <blinkcode_init+0x44>
109084: e3a02000 mov r2, #0
blink_state[i].state = BLINKCODE_STATE_NONE;
blink_state[i].led = i+1;
blink_state[i].timer.data = &blink_state[i];
blink_state[i].timer.function = &blinkcode_cb;
109088: e59f1038 ldr r1, [pc, #56] ; 1090c8 <blinkcode_init+0x48>
for (i = 0; i < NUM_LEDS; i++) {
blink_state[i].num = 0;
blink_state[i].state = BLINKCODE_STATE_NONE;
blink_state[i].led = i+1;
blink_state[i].timer.data = &blink_state[i];
10908c: e2830020 add r0, r3, #32
void blinkcode_init(void)
{
int i;
for (i = 0; i < NUM_LEDS; i++) {
blink_state[i].num = 0;
109090: e5832014 str r2, [r3, #20]
blink_state[i].state = BLINKCODE_STATE_NONE;
109094: e5c32010 strb r2, [r3, #16]
blink_state[i].led = i+1;
109098: e3a0c001 mov ip, #1
void blinkcode_init(void)
{
int i;
for (i = 0; i < NUM_LEDS; i++) {
blink_state[i].num = 0;
10909c: e5832034 str r2, [r3, #52] ; 0x34
blink_state[i].state = BLINKCODE_STATE_NONE;
1090a0: e5c32030 strb r2, [r3, #48] ; 0x30
blink_state[i].led = i+1;
1090a4: e3a02002 mov r2, #2
1090a8: e5c3c01c strb ip, [r3, #28]
blink_state[i].timer.data = &blink_state[i];
1090ac: e583300c str r3, [r3, #12]
blink_state[i].timer.function = &blinkcode_cb;
1090b0: e5831008 str r1, [r3, #8]
int i;
for (i = 0; i < NUM_LEDS; i++) {
blink_state[i].num = 0;
blink_state[i].state = BLINKCODE_STATE_NONE;
blink_state[i].led = i+1;
1090b4: e5c3203c strb r2, [r3, #60] ; 0x3c
blink_state[i].timer.data = &blink_state[i];
1090b8: e583002c str r0, [r3, #44] ; 0x2c
blink_state[i].timer.function = &blinkcode_cb;
1090bc: e5831028 str r1, [r3, #40] ; 0x28
}
}
1090c0: e12fff1e bx lr
1090c4: 002038cc .word 0x002038cc
1090c8: 00108e9c .word 0x00108e9c
001090cc <sys_irq>:
/* Somehow Atmel decided to do really stupid interrupt sharing
* for commonly-used interrupts such as the timer irq */
/* dbgu */
if (*AT91C_DBGU_IMR) {
1090cc: e3e02000 mvn r2, #0
#include "../openpcd.h"
static sysirq_hdlr *sysirq_hdlrs[AT91SAM7_SYSIRQ_COUNT];
static void sys_irq(void)
{
1090d0: e92d4008 push {r3, lr}
/* Somehow Atmel decided to do really stupid interrupt sharing
* for commonly-used interrupts such as the timer irq */
/* dbgu */
if (*AT91C_DBGU_IMR) {
1090d4: e5123def ldr r3, [r2, #-3567] ; 0xfffff211
1090d8: e3530000 cmp r3, #0
1090dc: 0a000003 beq 1090f0 <sys_irq+0x24>
sr = *AT91C_DBGU_CSR;
1090e0: e5120deb ldr r0, [r2, #-3563] ; 0xfffff215
if (sr & *AT91C_DBGU_IMR) {
1090e4: e5121def ldr r1, [r2, #-3567] ; 0xfffff211
1090e8: e1110000 tst r1, r0
1090ec: 1a000062 bne 10927c <sys_irq+0x1b0>
DEBUGP(") ");
}
}
/* pit_irq */
if (*AT91C_PITC_PIMR & AT91C_PITC_PITIEN) {
1090f0: e3e02000 mvn r2, #0
1090f4: e51232cf ldr r3, [r2, #-719] ; 0xfffffd31
1090f8: e3130402 tst r3, #33554432 ; 0x2000000
1090fc: 0a000002 beq 10910c <sys_irq+0x40>
sr = *AT91C_PITC_PISR;
109100: e51202cb ldr r0, [r2, #-715] ; 0xfffffd35
if (sr & AT91C_PITC_PITS) {
109104: e3100001 tst r0, #1
109108: 1a000054 bne 109260 <sys_irq+0x194>
}
}
}
/* rtt_irq */
if (*AT91C_RTTC_RTMR & (AT91C_RTTC_ALMIEN|AT91C_RTTC_RTTINCIEN)) {
10910c: e3e02000 mvn r2, #0
109110: e51232df ldr r3, [r2, #-735] ; 0xfffffd21
109114: e3130803 tst r3, #196608 ; 0x30000
109118: 0a000002 beq 109128 <sys_irq+0x5c>
sr = *AT91C_RTTC_RTSR;
10911c: e51202d3 ldr r0, [r2, #-723] ; 0xfffffd2d
if (sr) {
109120: e3500000 cmp r0, #0
109124: 1a000046 bne 109244 <sys_irq+0x178>
DEBUGP(") ");
}
}
/* pmc_irq */
if (*AT91C_PMC_IMR) {
109128: e3e02000 mvn r2, #0
10912c: e5123393 ldr r3, [r2, #-915] ; 0xfffffc6d
109130: e3530000 cmp r3, #0
109134: 0a000003 beq 109148 <sys_irq+0x7c>
sr = *AT91C_PMC_SR;
109138: e5120397 ldr r0, [r2, #-919] ; 0xfffffc69
if (sr & *AT91C_PMC_IMR) {
10913c: e5121393 ldr r1, [r2, #-915] ; 0xfffffc6d
109140: e1110000 tst r1, r0
109144: 1a000037 bne 109228 <sys_irq+0x15c>
DEBUGP(") ");
}
}
/* rstc_irq */
if (*AT91C_RSTC_RMR & (AT91C_RSTC_URSTIEN|AT91C_RSTC_BODIEN)) {
109148: e3e02000 mvn r2, #0
10914c: e51212f7 ldr r1, [r2, #-759] ; 0xfffffd09
109150: e59fc1a0 ldr ip, [pc, #416] ; 1092f8 <sys_irq+0x22c>
109154: e001300c and r3, r1, ip
109158: e3530000 cmp r3, #0
10915c: 0a000002 beq 10916c <sys_irq+0xa0>
sr = *AT91C_RSTC_RSR;
109160: e51202fb ldr r0, [r2, #-763] ; 0xfffffd05
if (sr & (AT91C_RSTC_URSTS|AT91C_RSTC_BODSTS)) {
109164: e3100003 tst r0, #3
109168: 1a000027 bne 10920c <sys_irq+0x140>
DEBUGP(") ");
}
}
/* mc_irq */
if (*AT91C_MC_FMR & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
10916c: e3e03000 mvn r3, #0
109170: e513209f ldr r2, [r3, #-159] ; 0xffffff61
109174: e312000c tst r2, #12
109178: 0a00000b beq 1091ac <sys_irq+0xe0>
sr = *AT91C_MC_FSR;
10917c: e5130097 ldr r0, [r3, #-151] ; 0xffffff69
if ((*AT91C_MC_FMR & AT91C_MC_LOCKE && (sr & AT91C_MC_LOCKE))||
109180: e513309f ldr r3, [r3, #-159] ; 0xffffff61
109184: e3130004 tst r3, #4
109188: 0a000018 beq 1091f0 <sys_irq+0x124>
10918c: e3100004 tst r0, #4
109190: 0a000016 beq 1091f0 <sys_irq+0x124>
(*AT91C_MC_FMR & AT91C_MC_PROGE && (sr & AT91C_MC_PROGE))){
DEBUGP("EFC(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_EFC]) {
109194: e59f2160 ldr r2, [pc, #352] ; 1092fc <sys_irq+0x230>
109198: e5923008 ldr r3, [r2, #8]
10919c: e3530000 cmp r3, #0
1091a0: 0a00004f beq 1092e4 <sys_irq+0x218>
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_EFC](sr);
1091a4: e1a0e00f mov lr, pc
1091a8: e12fff13 bx r3
DEBUGP(") ");
}
}
/* wdt_irq */
if (*AT91C_WDTC_WDMR & AT91C_WDTC_WDFIEN) {
1091ac: e3e03000 mvn r3, #0
1091b0: e51312bb ldr r1, [r3, #-699] ; 0xfffffd45
1091b4: e3110a01 tst r1, #4096 ; 0x1000
1091b8: 0a000007 beq 1091dc <sys_irq+0x110>
sr = *AT91C_WDTC_WDSR;
1091bc: e51302b7 ldr r0, [r3, #-695] ; 0xfffffd49
if (sr) {
1091c0: e3500000 cmp r0, #0
1091c4: 0a000004 beq 1091dc <sys_irq+0x110>
DEBUGP("WDT(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_WDT]) {
1091c8: e59f212c ldr r2, [pc, #300] ; 1092fc <sys_irq+0x230>
1091cc: e592300c ldr r3, [r2, #12]
1091d0: e3530000 cmp r3, #0
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_WDT](sr);
1091d4: 11a0e00f movne lr, pc
1091d8: 112fff13 bxne r3
static inline void AT91F_AIC_ClearIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id) // \arg interrupt number to initialize
{
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = (0x1 << irq_id);
1091dc: e3a00002 mov r0, #2
1091e0: e3e03c0f mvn r3, #3840 ; 0xf00
1091e4: e5830029 str r0, [r3, #41] ; 0x29
DEBUGP(") ");
}
}
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_SYS);
DEBUGPCR("END");
}
1091e8: e8bd4008 pop {r3, lr}
1091ec: e12fff1e bx lr
/* mc_irq */
if (*AT91C_MC_FMR & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
sr = *AT91C_MC_FSR;
if ((*AT91C_MC_FMR & AT91C_MC_LOCKE && (sr & AT91C_MC_LOCKE))||
(*AT91C_MC_FMR & AT91C_MC_PROGE && (sr & AT91C_MC_PROGE))){
1091f0: e3e01000 mvn r1, #0
1091f4: e511c09f ldr ip, [r1, #-159] ; 0xffffff61
}
/* mc_irq */
if (*AT91C_MC_FMR & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
sr = *AT91C_MC_FSR;
if ((*AT91C_MC_FMR & AT91C_MC_LOCKE && (sr & AT91C_MC_LOCKE))||
1091f8: e31c0008 tst ip, #8
1091fc: 0affffea beq 1091ac <sys_irq+0xe0>
(*AT91C_MC_FMR & AT91C_MC_PROGE && (sr & AT91C_MC_PROGE))){
109200: e3100008 tst r0, #8
109204: 0affffe8 beq 1091ac <sys_irq+0xe0>
109208: eaffffe1 b 109194 <sys_irq+0xc8>
/* rstc_irq */
if (*AT91C_RSTC_RMR & (AT91C_RSTC_URSTIEN|AT91C_RSTC_BODIEN)) {
sr = *AT91C_RSTC_RSR;
if (sr & (AT91C_RSTC_URSTS|AT91C_RSTC_BODSTS)) {
DEBUGP("RSTC(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_RSTC]) {
10920c: e59f30e8 ldr r3, [pc, #232] ; 1092fc <sys_irq+0x230>
109210: e5933014 ldr r3, [r3, #20]
109214: e3530000 cmp r3, #0
109218: 0a000025 beq 1092b4 <sys_irq+0x1e8>
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_RSTC](sr);
10921c: e1a0e00f mov lr, pc
109220: e12fff13 bx r3
109224: eaffffd0 b 10916c <sys_irq+0xa0>
/* pmc_irq */
if (*AT91C_PMC_IMR) {
sr = *AT91C_PMC_SR;
if (sr & *AT91C_PMC_IMR) {
DEBUGP("PMC(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_PMC]) {
109228: e59fc0cc ldr ip, [pc, #204] ; 1092fc <sys_irq+0x230>
10922c: e59c3018 ldr r3, [ip, #24]
109230: e3530000 cmp r3, #0
109234: 0a00001b beq 1092a8 <sys_irq+0x1dc>
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_PMC](sr);
109238: e1a0e00f mov lr, pc
10923c: e12fff13 bx r3
109240: eaffffc0 b 109148 <sys_irq+0x7c>
/* rtt_irq */
if (*AT91C_RTTC_RTMR & (AT91C_RTTC_ALMIEN|AT91C_RTTC_RTTINCIEN)) {
sr = *AT91C_RTTC_RTSR;
if (sr) {
DEBUGP("RTT(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_RTT]) {
109244: e59f10b0 ldr r1, [pc, #176] ; 1092fc <sys_irq+0x230>
109248: e5913010 ldr r3, [r1, #16]
10924c: e3530000 cmp r3, #0
109250: 0a000010 beq 109298 <sys_irq+0x1cc>
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_RTT](sr);
109254: e1a0e00f mov lr, pc
109258: e12fff13 bx r3
10925c: eaffffb1 b 109128 <sys_irq+0x5c>
/* pit_irq */
if (*AT91C_PITC_PIMR & AT91C_PITC_PITIEN) {
sr = *AT91C_PITC_PISR;
if (sr & AT91C_PITC_PITS) {
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_PIT]) {
109260: e59f1094 ldr r1, [pc, #148] ; 1092fc <sys_irq+0x230>
109264: e5913000 ldr r3, [r1]
109268: e3530000 cmp r3, #0
10926c: 0a000018 beq 1092d4 <sys_irq+0x208>
sysirq_hdlrs[AT91SAM7_SYSIRQ_PIT](sr);
109270: e1a0e00f mov lr, pc
109274: e12fff13 bx r3
109278: eaffffa3 b 10910c <sys_irq+0x40>
/* dbgu */
if (*AT91C_DBGU_IMR) {
sr = *AT91C_DBGU_CSR;
if (sr & *AT91C_DBGU_IMR) {
DEBUGP("DBGU(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_DBGU]) {
10927c: e59fc078 ldr ip, [pc, #120] ; 1092fc <sys_irq+0x230>
109280: e59c3004 ldr r3, [ip, #4]
109284: e3530000 cmp r3, #0
109288: 0a00000e beq 1092c8 <sys_irq+0x1fc>
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_DBGU](sr);
10928c: e1a0e00f mov lr, pc
109290: e12fff13 bx r3
109294: eaffff95 b 1090f0 <sys_irq+0x24>
DEBUGP("RTT(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_RTT]) {
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_RTT](sr);
} else {
*AT91C_RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN|
109298: e51202df ldr r0, [r2, #-735] ; 0xfffffd21
10929c: e3c0c803 bic ip, r0, #196608 ; 0x30000
1092a0: e502c2df str ip, [r2, #-735] ; 0xfffffd21
1092a4: eaffff9f b 109128 <sys_irq+0x5c>
DEBUGP("PMC(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_PMC]) {
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_PMC](sr);
} else {
*AT91C_PMC_IDR = *AT91C_PMC_IMR;
1092a8: e5120393 ldr r0, [r2, #-915] ; 0xfffffc6d
1092ac: e502039b str r0, [r2, #-923] ; 0xfffffc65
1092b0: eaffffa4 b 109148 <sys_irq+0x7c>
DEBUGP("RSTC(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_RSTC]) {
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_RSTC](sr);
} else {
*AT91C_RSTC_RMR &= ~(AT91C_RSTC_URSTIEN|
1092b4: e51212f7 ldr r1, [r2, #-759] ; 0xfffffd09
1092b8: e3c1c801 bic ip, r1, #65536 ; 0x10000
1092bc: e3cc0010 bic r0, ip, #16
1092c0: e50202f7 str r0, [r2, #-759] ; 0xfffffd09
1092c4: eaffffa8 b 10916c <sys_irq+0xa0>
DEBUGP("DBGU(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_DBGU]) {
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_DBGU](sr);
} else {
*AT91C_DBGU_IDR = *AT91C_DBGU_IMR;
1092c8: e5120def ldr r0, [r2, #-3567] ; 0xfffff211
1092cc: e5020df3 str r0, [r2, #-3571] ; 0xfffff20d
1092d0: eaffff86 b 1090f0 <sys_irq+0x24>
if (sr & AT91C_PITC_PITS) {
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_PIT]) {
sysirq_hdlrs[AT91SAM7_SYSIRQ_PIT](sr);
} else {
DEBUGP("no handler DISABLE_PIT ");
*AT91C_PITC_PIMR &= ~AT91C_PITC_PITIEN;
1092d4: e51202cf ldr r0, [r2, #-719] ; 0xfffffd31
1092d8: e3c0c402 bic ip, r0, #33554432 ; 0x2000000
1092dc: e502c2cf str ip, [r2, #-719] ; 0xfffffd31
1092e0: eaffff89 b 10910c <sys_irq+0x40>
DEBUGP("EFC(");
if (sysirq_hdlrs[AT91SAM7_SYSIRQ_EFC]) {
DEBUGP("handler ");
sysirq_hdlrs[AT91SAM7_SYSIRQ_EFC](sr);
} else {
*AT91C_MC_FMR &= ~(AT91C_MC_LOCKE |
1092e4: e3e03000 mvn r3, #0
1092e8: e513c09f ldr ip, [r3, #-159] ; 0xffffff61
1092ec: e3cc000c bic r0, ip, #12
1092f0: e503009f str r0, [r3, #-159] ; 0xffffff61
1092f4: eaffffac b 1091ac <sys_irq+0xe0>
1092f8: 00010010 .word 0x00010010
1092fc: 0020390c .word 0x0020390c
00109300 <sysirq_register>:
DEBUGPCR("END");
}
void sysirq_register(enum sysirqs irq, sysirq_hdlr *hdlr)
{
if (irq >= AT91SAM7_SYSIRQ_COUNT)
109300: e3500006 cmp r0, #6
return;
sysirq_hdlrs[irq] = hdlr;
109304: 959f3004 ldrls r3, [pc, #4] ; 109310 <sysirq_register+0x10>
109308: 97831100 strls r1, [r3, r0, lsl #2]
10930c: e12fff1e bx lr
109310: 0020390c .word 0x0020390c
00109314 <sysirq_init>:
}
void sysirq_init(void)
{
109314: e52de004 push {lr} ; (str lr, [sp, #-4]!)
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SYS,
109318: e59fc030 ldr ip, [pc, #48] ; 109350 <sysirq_init+0x3c>
sysirq_hdlrs[irq] = hdlr;
}
void sysirq_init(void)
{
10931c: e24dd00c sub sp, sp, #12
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SYS,
109320: e3a02005 mov r2, #5
109324: e3a03000 mov r3, #0
109328: e59f0024 ldr r0, [pc, #36] ; 109354 <sysirq_init+0x40>
10932c: e3a01001 mov r1, #1
109330: e58dc000 str ip, [sp]
109334: ebffec94 bl 10458c <AT91F_AIC_ConfigureIt>
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
109338: e3a02002 mov r2, #2
10933c: e3e03c0f mvn r3, #3840 ; 0xf00
109340: e5832021 str r2, [r3, #33] ; 0x21
OPENPCD_IRQ_PRIO_SYS,
AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL,
&sys_irq);
AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SYS);
}
109344: e28dd00c add sp, sp, #12
109348: e49de004 pop {lr} ; (ldr lr, [sp], #4)
10934c: e12fff1e bx lr
109350: 001090cc .word 0x001090cc
109354: fffff000 .word 0xfffff000
00109358 <flash_page>:
AT91C_MC_CORRECT_KEY | (page << 8));
}
void flash_page(u_int8_t *addr)
{
u_int16_t page = page_from_ramaddr(addr) & 0x3ff;
109358: e1a02700 lsl r2, r0, #14
AT91F_MC_EFC_PerformCmd(AT91C_BASE_MC, AT91C_MC_FCMD_UNLOCK |
AT91C_MC_CORRECT_KEY | (page << 8));
}
void flash_page(u_int8_t *addr)
{
10935c: e1a01000 mov r1, r0
u_int16_t page = page_from_ramaddr(addr) & 0x3ff;
109360: e1a00b22 lsr r0, r2, #22
AT91F_MC_EFC_PerformCmd(AT91C_BASE_MC, AT91C_MC_FCMD_UNLOCK |
AT91C_MC_CORRECT_KEY | (page << 8));
}
void flash_page(u_int8_t *addr)
{
109364: e92d40f8 push {r3, r4, r5, r6, r7, lr}
u_int16_t page = page_from_ramaddr(addr) & 0x3ff;
109368: e1a05800 lsl r5, r0, #16
10936c: e1a06825 lsr r6, r5, #16
//* \brief Return MC EFC Status
//*----------------------------------------------------------------------------
static inline unsigned int AT91F_MC_EFC_GetStatus(
AT91PS_MC pMC) // pointer to a MC controller
{
return pMC->MC_FSR;
109370: e3e04000 mvn r4, #0
u_int32_t fsr = AT91F_MC_EFC_GetStatus(AT91C_BASE_MC);
DEBUGP("flash_page(0x%x=%u) ", addr, page);
109374: e59f006c ldr r0, [pc, #108] ; 1093e8 <flash_page+0x90>
109378: e1a02006 mov r2, r6
10937c: e5147097 ldr r7, [r4, #-151] ; 0xffffff69
109380: ebfffaa5 bl 107e1c <debugp>
static int is_page_locked(u_int16_t page)
{
u_int16_t lockregion = LOCKREGION_FROM_PAGE(page);
return (AT91C_BASE_MC->MC_FSR & (lockregion << 16));
109384: e5143097 ldr r3, [r4, #-151] ; 0xffffff69
109388: e1a05a25 lsr r5, r5, #20
{
u_int16_t page = page_from_ramaddr(addr) & 0x3ff;
u_int32_t fsr = AT91F_MC_EFC_GetStatus(AT91C_BASE_MC);
DEBUGP("flash_page(0x%x=%u) ", addr, page);
if (is_page_locked(page)) {
10938c: e0135805 ands r5, r3, r5, lsl #16
109390: 1a00000d bne 1093cc <flash_page+0x74>
DEBUGP("unlocking ");
unlock_page(page);
}
if (!(fsr & AT91C_MC_FRDY)) {
109394: e3170001 tst r7, #1
109398: 0a000008 beq 1093c0 <flash_page+0x68>
DEBUGP("NOT_FLASHING ");
return;
}
DEBUGP("performing start_prog ");
10939c: e59f0048 ldr r0, [pc, #72] ; 1093ec <flash_page+0x94>
1093a0: ebfffa9d bl 107e1c <debugp>
AT91F_MC_EFC_PerformCmd(AT91C_BASE_MC, AT91C_MC_FCMD_START_PROG |
AT91C_MC_CORRECT_KEY | (page << 8));
1093a4: e1a02406 lsl r2, r6, #8
return;
}
DEBUGP("performing start_prog ");
AT91F_MC_EFC_PerformCmd(AT91C_BASE_MC, AT91C_MC_FCMD_START_PROG |
1093a8: e382645a orr r6, r2, #1509949440 ; 0x5a000000
1093ac: e3866001 orr r6, r6, #1
//*----------------------------------------------------------------------------
static inline void AT91F_MC_EFC_PerformCmd (
AT91PS_MC pMC, // pointer to a MC controller
unsigned int transfer_cmd)
{
pMC->MC_FCR = transfer_cmd;
1093b0: e3e00000 mvn r0, #0
1093b4: e500609b str r6, [r0, #-155] ; 0xffffff65
AT91C_MC_CORRECT_KEY | (page << 8));
}
1093b8: e8bd40f8 pop {r3, r4, r5, r6, r7, lr}
1093bc: e12fff1e bx lr
DEBUGP("unlocking ");
unlock_page(page);
}
if (!(fsr & AT91C_MC_FRDY)) {
DEBUGP("NOT_FLASHING ");
1093c0: e59f0028 ldr r0, [pc, #40] ; 1093f0 <flash_page+0x98>
1093c4: ebfffa94 bl 107e1c <debugp>
return;
1093c8: eafffffa b 1093b8 <flash_page+0x60>
u_int16_t page = page_from_ramaddr(addr) & 0x3ff;
u_int32_t fsr = AT91F_MC_EFC_GetStatus(AT91C_BASE_MC);
DEBUGP("flash_page(0x%x=%u) ", addr, page);
if (is_page_locked(page)) {
DEBUGP("unlocking ");
1093cc: e59f0020 ldr r0, [pc, #32] ; 1093f4 <flash_page+0x9c>
1093d0: ebfffa91 bl 107e1c <debugp>
static void unlock_page(u_int16_t page)
{
page &= 0x3ff;
AT91F_MC_EFC_PerformCmd(AT91C_BASE_MC, AT91C_MC_FCMD_UNLOCK |
AT91C_MC_CORRECT_KEY | (page << 8));
1093d4: e1a03406 lsl r3, r6, #8
}
static void unlock_page(u_int16_t page)
{
page &= 0x3ff;
AT91F_MC_EFC_PerformCmd(AT91C_BASE_MC, AT91C_MC_FCMD_UNLOCK |
1093d8: e383c45a orr ip, r3, #1509949440 ; 0x5a000000
1093dc: e38c1004 orr r1, ip, #4
1093e0: e504109b str r1, [r4, #-155] ; 0xffffff65
1093e4: eaffffea b 109394 <flash_page+0x3c>
1093e8: 0010adcc .word 0x0010adcc
1093ec: 0010ae00 .word 0x0010ae00
1093f0: 0010adf0 .word 0x0010adf0
1093f4: 0010ade4 .word 0x0010ade4
001093f8 <flash_init>:
static inline void AT91F_MC_EFC_CfgModeReg (
AT91PS_MC pMC, // pointer to a MC controller
unsigned int mode) // mode register
{
// Write to the FMR register
pMC->MC_FMR = mode;
1093f8: e59f2008 ldr r2, [pc, #8] ; 109408 <flash_init+0x10>
1093fc: e3e03000 mvn r3, #0
109400: e503209f str r2, [r3, #-159] ; 0xffffff61
{
unsigned int fmcn = AT91F_MC_EFC_ComputeFMCN(MCK);
AT91F_MC_EFC_CfgModeReg(AT91C_BASE_MC, (fmcn&0xff) << 16 |
AT91C_MC_FWS_3FWS);
}
109404: e12fff1e bx lr
109408: 00310300 .word 0x00310300
0010940c <spi_irq>:
static const AT91PS_SPI pSPI = AT91C_BASE_SPI;
/* SPI irq handler */
static void spi_irq(void)
{
u_int32_t status = pSPI->SPI_SR;
10940c: e59f002c ldr r0, [pc, #44] ; 109440 <spi_irq+0x34>
109410: e510c0ef ldr ip, [r0, #-239] ; 0xffffff11
if (status & AT91C_SPI_OVRES)
DEBUGPSPIIRQ("Overrun ");
if (status & AT91C_SPI_MODF)
DEBUGPSPIIRQ("ModeFault ");
if (status & AT91C_SPI_ENDRX) {
109414: e31c0010 tst ip, #16
pSPI->SPI_IDR = AT91C_SPI_ENDRX;
109418: 13a01010 movne r1, #16
10941c: 150010e7 strne r1, [r0, #-231] ; 0xffffff19
DEBUGPSPIIRQ("ENDRX ");
}
if (status & AT91C_SPI_ENDTX) {
109420: e31c0020 tst ip, #32
pSPI->SPI_IDR = AT91C_SPI_ENDTX;
109424: 159fc014 ldrne ip, [pc, #20] ; 109440 <spi_irq+0x34>
109428: 13a00020 movne r0, #32
static inline void AT91F_AIC_ClearIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id) // \arg interrupt number to initialize
{
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = (0x1 << irq_id);
10942c: e3a02020 mov r2, #32
109430: e3e03c0f mvn r3, #3840 ; 0xf00
109434: 150c00e7 strne r0, [ip, #-231] ; 0xffffff19
109438: e5832029 str r2, [r3, #41] ; 0x29
}
DEBUGPSPIIRQ("\r\n");
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_SPI);
}
10943c: e12fff1e bx lr
109440: fffe00ff .word 0xfffe00ff
00109444 <spi_transceive.clone.1>:
#ifdef SPI_USES_DMA
static int spi_transceive(const u_int8_t *tx_data, u_int16_t tx_len,
109444: e92d40f0 push {r4, r5, r6, r7, lr}
u_int8_t *rx_data, u_int16_t *rx_len)
{
DEBUGPSPI("DMA Xfer tx=%s\r\n", hexdump(tx_data, tx_len));
if (*rx_len < tx_len) {
109448: e1d230b0 ldrh r3, [r2]
10944c: e1530001 cmp r3, r1
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_SPI);
}
#ifdef SPI_USES_DMA
static int spi_transceive(const u_int8_t *tx_data, u_int16_t tx_len,
109450: e1a07000 mov r7, r0
109454: e24dd00c sub sp, sp, #12
109458: e1a05002 mov r5, r2
10945c: e1a04001 mov r4, r1
u_int8_t *rx_data, u_int16_t *rx_len)
{
DEBUGPSPI("DMA Xfer tx=%s\r\n", hexdump(tx_data, tx_len));
if (*rx_len < tx_len) {
DEBUGPCRF("rx_len=%u smaller tx_len=%u\n", *rx_len, tx_len);
return -1;
109460: 33e00000 mvncc r0, #0
#ifdef SPI_USES_DMA
static int spi_transceive(const u_int8_t *tx_data, u_int16_t tx_len,
u_int8_t *rx_data, u_int16_t *rx_len)
{
DEBUGPSPI("DMA Xfer tx=%s\r\n", hexdump(tx_data, tx_len));
if (*rx_len < tx_len) {
109464: 2a000002 bcs 109474 <spi_transceive.clone.1+0x30>
DEBUGPSPI("DMA Xfer finished rx=%s\r\n", hexdump(rx_data, tx_len));
*rx_len = tx_len;
return 0;
}
109468: e28dd00c add sp, sp, #12
10946c: e8bd40f0 pop {r4, r5, r6, r7, lr}
109470: e12fff1e bx lr
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
unsigned int mask = 0x1 << irq_id;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
109474: e3e0cc0f mvn ip, #3840 ; 0xf00
unsigned char *pBuffer,
unsigned int szBuffer,
unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_ReceiveFrame(
109478: e3a06000 mov r6, #0
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
unsigned int mask = 0x1 << irq_id;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
10947c: e3a0e102 mov lr, #-2147483648 ; 0x80000000
109480: e58ce025 str lr, [ip, #37] ; 0x25
unsigned char *pBuffer,
unsigned int szBuffer,
unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_ReceiveFrame(
109484: e59f1070 ldr r1, [pc, #112] ; 1094fc <spi_transceive.clone.1+0xb8>
{
unsigned int mask = 0x1 << irq_id;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = mask ;
109488: e58ce029 str lr, [ip, #41] ; 0x29
unsigned char *pBuffer,
unsigned int szBuffer,
unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_ReceiveFrame(
10948c: e1a02004 mov r2, r4
109490: e1a03006 mov r3, r6
109494: e59f0064 ldr r0, [pc, #100] ; 109500 <spi_transceive.clone.1+0xbc>
109498: e58d6000 str r6, [sp]
10949c: ebffecb9 bl 104788 <AT91F_PDC_ReceiveFrame>
const unsigned char *pBuffer,
unsigned int szBuffer,
const unsigned char *pNextBuffer,
unsigned int szNextBuffer )
{
return AT91F_PDC_SendFrame(
1094a0: e1a01007 mov r1, r7
1094a4: e1a02004 mov r2, r4
1094a8: e1a03006 mov r3, r6
1094ac: e59f004c ldr r0, [pc, #76] ; 109500 <spi_transceive.clone.1+0xbc>
1094b0: e58d6000 str r6, [sp]
1094b4: ebffeca0 bl 10473c <AT91F_PDC_SendFrame>
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
1094b8: e59fc044 ldr ip, [pc, #68] ; 109504 <spi_transceive.clone.1+0xc0>
AT91F_SPI_SendFrame(pSPI, tx_data, tx_len, NULL, 0);
AT91F_PDC_EnableRx(AT91C_BASE_PDC_SPI);
AT91F_PDC_EnableTx(AT91C_BASE_PDC_SPI);
pSPI->SPI_IER = AT91C_SPI_ENDTX|AT91C_SPI_ENDRX;
1094bc: e59f2044 ldr r2, [pc, #68] ; 109508 <spi_transceive.clone.1+0xc4>
1094c0: e3a03001 mov r3, #1
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
1094c4: e3a01c01 mov r1, #256 ; 0x100
1094c8: e3a00030 mov r0, #48 ; 0x30
//* \brief Enable receive
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableRx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
1094cc: e50c30df str r3, [ip, #-223] ; 0xffffff21
//* \brief Enable transmit
//*----------------------------------------------------------------------------
static inline void AT91F_PDC_EnableTx (
AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
{
pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
1094d0: e50c10df str r1, [ip, #-223] ; 0xffffff21
1094d4: e50200eb str r0, [r2, #-235] ; 0xffffff15
while (! (pSPI->SPI_SR & AT91C_SPI_ENDRX)) ;
1094d8: e51200ef ldr r0, [r2, #-239] ; 0xffffff11
1094dc: e3100010 tst r0, #16
1094e0: 0afffffc beq 1094d8 <spi_transceive.clone.1+0x94>
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
1094e4: e3a02102 mov r2, #-2147483648 ; 0x80000000
1094e8: e3e01c0f mvn r1, #3840 ; 0xf00
1094ec: e5812021 str r2, [r1, #33] ; 0x21
DEBUGPSPI("DMA Xfer finished rx=%s\r\n", hexdump(rx_data, tx_len));
*rx_len = tx_len;
return 0;
1094f0: e3a00000 mov r0, #0
/* Re-enable RC632 interrupts */
AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
DEBUGPSPI("DMA Xfer finished rx=%s\r\n", hexdump(rx_data, tx_len));
*rx_len = tx_len;
1094f4: e1c540b0 strh r4, [r5]
1094f8: eaffffda b 109468 <spi_transceive.clone.1+0x24>
1094fc: 00203928 .word 0x00203928
109500: fffe0100 .word 0xfffe0100
109504: fffe01ff .word 0xfffe01ff
109508: fffe00ff .word 0xfffe00ff
0010950c <opcd_rc632_reg_write>:
/* RC632 access primitives */
int opcd_rc632_reg_write(struct rfid_asic_handle *hdl,
u_int8_t addr, u_int8_t data)
{
10950c: e92d4010 push {r4, lr}
109510: e24dd008 sub sp, sp, #8
u_int16_t rx_len = 2;
109514: e3a0e002 mov lr, #2
109518: e28dc008 add ip, sp, #8
DEBUG632("[0x%02x] <= 0x%02x", addr, data);
addr = RC632_WRITE_ADDR(addr);
spi_outbuf[0] = addr;
10951c: e59f302c ldr r3, [pc, #44] ; 109550 <opcd_rc632_reg_write+0x44>
/* RC632 access primitives */
int opcd_rc632_reg_write(struct rfid_asic_handle *hdl,
u_int8_t addr, u_int8_t data)
{
u_int16_t rx_len = 2;
109520: e16ce0b2 strh lr, [ip, #-2]!
DEBUG632("[0x%02x] <= 0x%02x", addr, data);
addr = RC632_WRITE_ADDR(addr);
109524: e1a01081 lsl r1, r1, #1
109528: e201407e and r4, r1, #126 ; 0x7e
spi_outbuf[0] = addr;
spi_outbuf[1] = data;
10952c: e5c32045 strb r2, [r3, #69] ; 0x45
return spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
109530: e2830044 add r0, r3, #68 ; 0x44
109534: e1a0100e mov r1, lr
109538: e1a0200c mov r2, ip
DEBUG632("[0x%02x] <= 0x%02x", addr, data);
addr = RC632_WRITE_ADDR(addr);
spi_outbuf[0] = addr;
10953c: e5c34044 strb r4, [r3, #68] ; 0x44
spi_outbuf[1] = data;
return spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
109540: ebffffbf bl 109444 <spi_transceive.clone.1>
}
109544: e28dd008 add sp, sp, #8
109548: e8bd4010 pop {r4, lr}
10954c: e12fff1e bx lr
109550: 00203928 .word 0x00203928
00109554 <opcd_rc632_reg_write_set>:
#define RC632_REGSET_MAXSIZE (RC632_REGSET_END-RC632_REGSET_START)
static u_int8_t regset_buf[RC632_REGSET_MAXSIZE * 2];
int opcd_rc632_reg_write_set(struct rfid_asic_handle *hdl,
u_int8_t *regs, int len)
{
109554: e92d4010 push {r4, lr}
u_int8_t i, j = 0;
u_int16_t rx_len;
if (len > RC632_REGSET_MAXSIZE)
109558: e352002f cmp r2, #47 ; 0x2f
#define RC632_REGSET_MAXSIZE (RC632_REGSET_END-RC632_REGSET_START)
static u_int8_t regset_buf[RC632_REGSET_MAXSIZE * 2];
int opcd_rc632_reg_write_set(struct rfid_asic_handle *hdl,
u_int8_t *regs, int len)
{
10955c: e24dd008 sub sp, sp, #8
u_int8_t i, j = 0;
u_int16_t rx_len;
if (len > RC632_REGSET_MAXSIZE)
return -E2BIG;
109560: c3e00006 mvngt r0, #6
u_int8_t *regs, int len)
{
u_int8_t i, j = 0;
u_int16_t rx_len;
if (len > RC632_REGSET_MAXSIZE)
109564: ca00001d bgt 1095e0 <opcd_rc632_reg_write_set+0x8c>
109568: e3a00000 mov r0, #0
10956c: e1a0c001 mov ip, r1
109570: e3a03010 mov r3, #16
109574: e1a01000 mov r1, r0
for (i = RC632_REGSET_START; i <= RC632_REGSET_END; i++) {
/* skip bank registers */
if (i % 8 == 0)
continue;
regset_buf[j++] = RC632_WRITE_ADDR(i);
109578: e59fe06c ldr lr, [pc, #108] ; 1095ec <opcd_rc632_reg_write_set+0x98>
10957c: ea00000f b 1095c0 <opcd_rc632_reg_write_set+0x6c>
if (len > RC632_REGSET_MAXSIZE)
return -E2BIG;
for (i = RC632_REGSET_START; i <= RC632_REGSET_END; i++) {
/* skip bank registers */
if (i % 8 == 0)
109580: e3120007 tst r2, #7
109584: 0a00000b beq 1095b8 <opcd_rc632_reg_write_set+0x64>
#define RC632_REGSET_START 0x10
#define RC632_REGSET_END 0x3f
#define RC632_REGSET_MAXSIZE (RC632_REGSET_END-RC632_REGSET_START)
static u_int8_t regset_buf[RC632_REGSET_MAXSIZE * 2];
int opcd_rc632_reg_write_set(struct rfid_asic_handle *hdl,
109588: e2802011 add r2, r0, #17
for (i = RC632_REGSET_START; i <= RC632_REGSET_END; i++) {
/* skip bank registers */
if (i % 8 == 0)
continue;
regset_buf[j++] = RC632_WRITE_ADDR(i);
10958c: e1a04082 lsl r4, r2, #1
109590: e204407e and r4, r4, #126 ; 0x7e
109594: e08e2001 add r2, lr, r1
109598: e5c24088 strb r4, [r2, #136] ; 0x88
10959c: e2814001 add r4, r1, #1
1095a0: e20410ff and r1, r4, #255 ; 0xff
regset_buf[j++] = regs[i - RC632_REGSET_START];
1095a4: e5dc4001 ldrb r4, [ip, #1]
1095a8: e08e2001 add r2, lr, r1
1095ac: e5c24088 strb r4, [r2, #136] ; 0x88
1095b0: e2811001 add r1, r1, #1
1095b4: e20110ff and r1, r1, #255 ; 0xff
1095b8: e2800001 add r0, r0, #1
1095bc: e28cc001 add ip, ip, #1
u_int16_t rx_len;
if (len > RC632_REGSET_MAXSIZE)
return -E2BIG;
for (i = RC632_REGSET_START; i <= RC632_REGSET_END; i++) {
1095c0: e2832001 add r2, r3, #1
1095c4: e20230ff and r3, r2, #255 ; 0xff
1095c8: e3530040 cmp r3, #64 ; 0x40
1095cc: 1affffeb bne 109580 <opcd_rc632_reg_write_set+0x2c>
continue;
regset_buf[j++] = RC632_WRITE_ADDR(i);
regset_buf[j++] = regs[i - RC632_REGSET_START];
}
rx_len = j;
1095d0: e28d2008 add r2, sp, #8
1095d4: e16210b2 strh r1, [r2, #-2]!
return spi_transceive(regset_buf, j, spi_inbuf, &rx_len);
1095d8: e59f0010 ldr r0, [pc, #16] ; 1095f0 <opcd_rc632_reg_write_set+0x9c>
1095dc: ebffff98 bl 109444 <spi_transceive.clone.1>
}
1095e0: e28dd008 add sp, sp, #8
1095e4: e8bd4010 pop {r4, lr}
1095e8: e12fff1e bx lr
1095ec: 00203928 .word 0x00203928
1095f0: 002039b0 .word 0x002039b0
001095f4 <opcd_rc632_fifo_write>:
int opcd_rc632_fifo_write(struct rfid_asic_handle *hdl,
u_int8_t len, u_int8_t *data, u_int8_t flags)
{
1095f4: e92d4070 push {r4, r5, r6, lr}
u_int16_t rx_len = sizeof(spi_inbuf);
if (len > sizeof(spi_outbuf)-1)
len = sizeof(spi_outbuf)-1;
spi_outbuf[0] = FIFO_ADDR;
1095f8: e59f0050 ldr r0, [pc, #80] ; 109650 <opcd_rc632_fifo_write+0x5c>
return spi_transceive(regset_buf, j, spi_inbuf, &rx_len);
}
int opcd_rc632_fifo_write(struct rfid_asic_handle *hdl,
u_int8_t len, u_int8_t *data, u_int8_t flags)
{
1095fc: e24dd008 sub sp, sp, #8
u_int16_t rx_len = sizeof(spi_inbuf);
109600: e3510040 cmp r1, #64 ; 0x40
109604: 31a06001 movcc r6, r1
109608: 23a06040 movcs r6, #64 ; 0x40
if (len > sizeof(spi_outbuf)-1)
len = sizeof(spi_outbuf)-1;
spi_outbuf[0] = FIFO_ADDR;
10960c: e1a05000 mov r5, r0
}
int opcd_rc632_fifo_write(struct rfid_asic_handle *hdl,
u_int8_t len, u_int8_t *data, u_int8_t flags)
{
u_int16_t rx_len = sizeof(spi_inbuf);
109610: e28d4008 add r4, sp, #8
if (len > sizeof(spi_outbuf)-1)
len = sizeof(spi_outbuf)-1;
spi_outbuf[0] = FIFO_ADDR;
memcpy(&spi_outbuf[1], data, len);
109614: e1a01002 mov r1, r2
{
u_int16_t rx_len = sizeof(spi_inbuf);
if (len > sizeof(spi_outbuf)-1)
len = sizeof(spi_outbuf)-1;
spi_outbuf[0] = FIFO_ADDR;
109618: e3a03004 mov r3, #4
}
int opcd_rc632_fifo_write(struct rfid_asic_handle *hdl,
u_int8_t len, u_int8_t *data, u_int8_t flags)
{
u_int16_t rx_len = sizeof(spi_inbuf);
10961c: e3a02041 mov r2, #65 ; 0x41
109620: e16420b2 strh r2, [r4, #-2]!
if (len > sizeof(spi_outbuf)-1)
len = sizeof(spi_outbuf)-1;
spi_outbuf[0] = FIFO_ADDR;
109624: e5e53044 strb r3, [r5, #68]! ; 0x44
memcpy(&spi_outbuf[1], data, len);
109628: e1a02006 mov r2, r6
10962c: e2800045 add r0, r0, #69 ; 0x45
109630: eb0002b5 bl 10a10c <memcpy>
DEBUG632("[FIFO] <= %s", hexdump(data, len));
return spi_transceive(spi_outbuf, len+1, spi_inbuf, &rx_len);
109634: e1a00005 mov r0, r5
109638: e2861001 add r1, r6, #1
10963c: e1a02004 mov r2, r4
109640: ebffff7f bl 109444 <spi_transceive.clone.1>
}
109644: e28dd008 add sp, sp, #8
109648: e8bd4070 pop {r4, r5, r6, lr}
10964c: e12fff1e bx lr
109650: 00203928 .word 0x00203928
00109654 <opcd_rc632_reg_read>:
int opcd_rc632_reg_read(struct rfid_asic_handle *hdl,
u_int8_t addr, u_int8_t *val)
{
109654: e92d4070 push {r4, r5, r6, lr}
109658: e24dd008 sub sp, sp, #8
u_int16_t rx_len = 2;
10965c: e3a0e002 mov lr, #2
109660: e28dc008 add ip, sp, #8
addr = (addr << 1) & 0x7e;
109664: e1a05081 lsl r5, r1, #1
spi_outbuf[0] = addr | 0x80;
109668: e59f4044 ldr r4, [pc, #68] ; 1096b4 <opcd_rc632_reg_read+0x60>
}
int opcd_rc632_reg_read(struct rfid_asic_handle *hdl,
u_int8_t addr, u_int8_t *val)
{
u_int16_t rx_len = 2;
10966c: e16ce0b2 strh lr, [ip, #-2]!
addr = (addr << 1) & 0x7e;
109670: e205107e and r1, r5, #126 ; 0x7e
spi_outbuf[0] = addr | 0x80;
109674: e1e00c81 mvn r0, r1, lsl #25
109678: e1e03ca0 mvn r3, r0, lsr #25
return spi_transceive(spi_outbuf, len+1, spi_inbuf, &rx_len);
}
int opcd_rc632_reg_read(struct rfid_asic_handle *hdl,
u_int8_t addr, u_int8_t *val)
{
10967c: e1a06002 mov r6, r2
u_int16_t rx_len = 2;
addr = (addr << 1) & 0x7e;
spi_outbuf[0] = addr | 0x80;
spi_outbuf[1] = 0x00;
109680: e3a05000 mov r5, #0
spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
109684: e2840044 add r0, r4, #68 ; 0x44
109688: e1a0100e mov r1, lr
10968c: e1a0200c mov r2, ip
{
u_int16_t rx_len = 2;
addr = (addr << 1) & 0x7e;
spi_outbuf[0] = addr | 0x80;
109690: e5c43044 strb r3, [r4, #68] ; 0x44
spi_outbuf[1] = 0x00;
109694: e5c45045 strb r5, [r4, #69] ; 0x45
spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
109698: ebffff69 bl 109444 <spi_transceive.clone.1>
*val = spi_inbuf[1];
10969c: e5d43001 ldrb r3, [r4, #1]
DEBUG632("[0x%02x] => 0x%02x", addr>>1, *val);
return 0;
}
1096a0: e1a00005 mov r0, r5
spi_outbuf[0] = addr | 0x80;
spi_outbuf[1] = 0x00;
spi_transceive(spi_outbuf, 2, spi_inbuf, &rx_len);
*val = spi_inbuf[1];
1096a4: e5c63000 strb r3, [r6]
DEBUG632("[0x%02x] => 0x%02x", addr>>1, *val);
return 0;
}
1096a8: e28dd008 add sp, sp, #8
1096ac: e8bd4070 pop {r4, r5, r6, lr}
1096b0: e12fff1e bx lr
1096b4: 00203928 .word 0x00203928
001096b8 <rc632_irq>:
}
/* RC632 interrupt handling */
static void rc632_irq(void)
{
1096b8: e52de004 push {lr} ; (str lr, [sp, #-4]!)
struct req_ctx *irq_rctx;
struct openpcd_hdr *irq_opcdh;
u_int8_t cause;
/* CL RC632 has interrupted us */
opcd_rc632_reg_read(NULL, RC632_REG_INTERRUPT_RQ, &cause);
1096bc: e3a01007 mov r1, #7
}
/* RC632 interrupt handling */
static void rc632_irq(void)
{
1096c0: e24dd00c sub sp, sp, #12
struct req_ctx *irq_rctx;
struct openpcd_hdr *irq_opcdh;
u_int8_t cause;
/* CL RC632 has interrupted us */
opcd_rc632_reg_read(NULL, RC632_REG_INTERRUPT_RQ, &cause);
1096c4: e08d2001 add r2, sp, r1
1096c8: e3a00000 mov r0, #0
1096cc: ebffffe0 bl 109654 <opcd_rc632_reg_read>
/* ACK all interrupts */
//rc632_reg_write(NULL, RC632_REG_INTERRUPT_RQ, cause);
opcd_rc632_reg_write(NULL, RC632_REG_INTERRUPT_RQ, RC632_INT_TIMER);
1096d0: e3a01007 mov r1, #7
1096d4: e3a02020 mov r2, #32
1096d8: e3a00000 mov r0, #0
1096dc: ebffff8a bl 10950c <opcd_rc632_reg_write>
DEBUGP("RxComplete ");
if (cause & RC632_INT_TX)
DEBUGP("TxComplete ");
irq_rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
1096e0: e59f3064 ldr r3, [pc, #100] ; 10974c <rc632_irq+0x94>
1096e4: e3a00000 mov r0, #0
1096e8: e3a010fe mov r1, #254 ; 0xfe
1096ec: e3a02004 mov r2, #4
1096f0: e1a0e00f mov lr, pc
1096f4: e12fff13 bx r3
RCTX_STATE_RC632IRQ_BUSY);
if (!irq_rctx) {
1096f8: e2503000 subs r3, r0, #0
1096fc: 0a00000d beq 109738 <rc632_irq+0x80>
/* disable rc632 interrupt until RCTX is free */
AT91F_AIC_DisableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
return;
}
irq_opcdh = (struct openpcd_hdr *) irq_rctx->data;
109700: e593e008 ldr lr, [r3, #8]
/* initialize static part of openpcd_hdr for USB IRQ reporting */
irq_opcdh->cmd = OPENPCD_CMD_IRQ;
irq_opcdh->flags = 0x00;
irq_opcdh->reg = 0x07;
109704: e3a01007 mov r1, #7
}
irq_opcdh = (struct openpcd_hdr *) irq_rctx->data;
/* initialize static part of openpcd_hdr for USB IRQ reporting */
irq_opcdh->cmd = OPENPCD_CMD_IRQ;
109708: e3a0201a mov r2, #26
irq_opcdh->flags = 0x00;
10970c: e3a03000 mov r3, #0
irq_opcdh->reg = 0x07;
109710: e5ce1002 strb r1, [lr, #2]
}
irq_opcdh = (struct openpcd_hdr *) irq_rctx->data;
/* initialize static part of openpcd_hdr for USB IRQ reporting */
irq_opcdh->cmd = OPENPCD_CMD_IRQ;
109714: e5ce2000 strb r2, [lr]
irq_opcdh->flags = 0x00;
109718: e5ce3001 strb r3, [lr, #1]
irq_opcdh->reg = 0x07;
irq_opcdh->val = cause;
10971c: e5ddc007 ldrb ip, [sp, #7]
req_ctx_set_state(irq_rctx, RCTX_STATE_UDP_EP3_PENDING);
109720: e3a01012 mov r1, #18
/* initialize static part of openpcd_hdr for USB IRQ reporting */
irq_opcdh->cmd = OPENPCD_CMD_IRQ;
irq_opcdh->flags = 0x00;
irq_opcdh->reg = 0x07;
irq_opcdh->val = cause;
109724: e5cec003 strb ip, [lr, #3]
req_ctx_set_state(irq_rctx, RCTX_STATE_UDP_EP3_PENDING);
109728: ebfffa11 bl 107f74 <req_ctx_set_state>
DEBUGPCR("");
}
10972c: e28dd00c add sp, sp, #12
109730: e49de004 pop {lr} ; (ldr lr, [sp], #4)
109734: e12fff1e bx lr
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
unsigned int mask = 0x1 << irq_id;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
109738: e3e00c0f mvn r0, #3840 ; 0xf00
10973c: e3a02102 mov r2, #-2147483648 ; 0x80000000
109740: e5802025 str r2, [r0, #37] ; 0x25
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = mask ;
109744: e5802029 str r2, [r0, #41] ; 0x29
RCTX_STATE_RC632IRQ_BUSY);
if (!irq_rctx) {
DEBUGPCRF("NO RCTX!");
/* disable rc632 interrupt until RCTX is free */
AT91F_AIC_DisableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
return;
109748: eafffff7 b 10972c <rc632_irq+0x74>
10974c: 00200080 .word 0x00200080
00109750 <rc632_reg_write_verify.clone.0>:
AT91F_SPI_Disable(pSPI);
}
#endif
#ifdef DEBUG
static int rc632_reg_write_verify(struct rfid_asic_handle *hdl,
109750: e92d4030 push {r4, r5, lr}
u_int8_t reg, u_int8_t val)
{
u_int8_t tmp;
opcd_rc632_reg_write(hdl, reg, val);
109754: e1a02001 mov r2, r1
AT91F_SPI_Disable(pSPI);
}
#endif
#ifdef DEBUG
static int rc632_reg_write_verify(struct rfid_asic_handle *hdl,
109758: e24dd00c sub sp, sp, #12
10975c: e1a04001 mov r4, r1
109760: e1a05000 mov r5, r0
u_int8_t reg, u_int8_t val)
{
u_int8_t tmp;
opcd_rc632_reg_write(hdl, reg, val);
109764: e3a01021 mov r1, #33 ; 0x21
109768: ebffff67 bl 10950c <opcd_rc632_reg_write>
opcd_rc632_reg_read(hdl, reg, &tmp);
10976c: e1a00005 mov r0, r5
109770: e3a01021 mov r1, #33 ; 0x21
109774: e28d2007 add r2, sp, #7
109778: ebffffb5 bl 109654 <opcd_rc632_reg_read>
DEBUGPCRF("reg=0x%02x, write=0x%02x, read=0x%02x ", reg, val, tmp);
return (val == tmp);
10977c: e5dd1007 ldrb r1, [sp, #7]
}
109780: e0643001 rsb r3, r4, r1
109784: e2730000 rsbs r0, r3, #0
109788: e0a00003 adc r0, r0, r3
10978c: e28dd00c add sp, sp, #12
109790: e8bd4030 pop {r4, r5, lr}
109794: e12fff1e bx lr
00109798 <opcd_rc632_fifo_read>:
return 0;
}
int opcd_rc632_fifo_read(struct rfid_asic_handle *hdl,
u_int8_t max_len, u_int8_t *data)
{
109798: e92d4070 push {r4, r5, r6, lr}
10979c: e24dd008 sub sp, sp, #8
1097a0: e1a04001 mov r4, r1
1097a4: e1a06002 mov r6, r2
int ret;
u_int8_t fifo_length;
u_int8_t i;
u_int16_t rx_len;
ret = opcd_rc632_reg_read(hdl, RC632_REG_FIFO_LENGTH, &fifo_length);
1097a8: e3a01004 mov r1, #4
1097ac: e28d2007 add r2, sp, #7
1097b0: ebffffa7 bl 109654 <opcd_rc632_reg_read>
if (ret < 0)
1097b4: e2505000 subs r5, r0, #0
1097b8: ba00002e blt 109878 <opcd_rc632_fifo_read+0xe0>
return ret;
rx_len = fifo_length+1;
1097bc: e5ddc007 ldrb ip, [sp, #7]
if (max_len < fifo_length)
1097c0: e15c0004 cmp ip, r4
ret = opcd_rc632_reg_read(hdl, RC632_REG_FIFO_LENGTH, &fifo_length);
if (ret < 0)
return ret;
rx_len = fifo_length+1;
1097c4: e28c1001 add r1, ip, #1
if (max_len < fifo_length)
fifo_length = max_len;
1097c8: 81a0c004 movhi ip, r4
ret = opcd_rc632_reg_read(hdl, RC632_REG_FIFO_LENGTH, &fifo_length);
if (ret < 0)
return ret;
rx_len = fifo_length+1;
1097cc: e1cd10b4 strh r1, [sp, #4]
if (max_len < fifo_length)
fifo_length = max_len;
1097d0: 85cd4007 strbhi r4, [sp, #7]
1097d4: 82841001 addhi r1, r4, #1
for (i = 0; i < fifo_length; i++)
1097d8: e35c0000 cmp ip, #0
1097dc: 0a000014 beq 109834 <opcd_rc632_fifo_read+0x9c>
1097e0: e59fe0a0 ldr lr, [pc, #160] ; 109888 <opcd_rc632_fifo_read+0xf0>
DEBUG632("[0x%02x] => 0x%02x", addr>>1, *val);
return 0;
}
int opcd_rc632_fifo_read(struct rfid_asic_handle *hdl,
1097e4: e24c0001 sub r0, ip, #1
1097e8: e20020ff and r2, r0, #255 ; 0xff
1097ec: e1a0300e mov r3, lr
1097f0: e082e00e add lr, r2, lr
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
spi_outbuf[i] = FIFO_ADDR;
1097f4: e3a00004 mov r0, #4
rx_len = fifo_length+1;
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
1097f8: e153000e cmp r3, lr
1097fc: e2022001 and r2, r2, #1
spi_outbuf[i] = FIFO_ADDR;
109800: e5c30000 strb r0, [r3]
rx_len = fifo_length+1;
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
109804: 0a00000a beq 109834 <opcd_rc632_fifo_read+0x9c>
109808: e3520000 cmp r2, #0
10980c: 0a000002 beq 10981c <opcd_rc632_fifo_read+0x84>
spi_outbuf[i] = FIFO_ADDR;
109810: e5e30001 strb r0, [r3, #1]!
rx_len = fifo_length+1;
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
109814: e153000e cmp r3, lr
109818: 0a000005 beq 109834 <opcd_rc632_fifo_read+0x9c>
DEBUG632("[0x%02x] => 0x%02x", addr>>1, *val);
return 0;
}
int opcd_rc632_fifo_read(struct rfid_asic_handle *hdl,
10981c: e2834001 add r4, r3, #1
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
spi_outbuf[i] = FIFO_ADDR;
109820: e5c30001 strb r0, [r3, #1]
DEBUG632("[0x%02x] => 0x%02x", addr>>1, *val);
return 0;
}
int opcd_rc632_fifo_read(struct rfid_asic_handle *hdl,
109824: e2833002 add r3, r3, #2
rx_len = fifo_length+1;
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
109828: e153000e cmp r3, lr
spi_outbuf[i] = FIFO_ADDR;
10982c: e5c40001 strb r0, [r4, #1]
rx_len = fifo_length+1;
if (max_len < fifo_length)
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
109830: 1afffff9 bne 10981c <opcd_rc632_fifo_read+0x84>
spi_outbuf[i] = FIFO_ADDR;
spi_outbuf[0] |= 0x80;
109834: e59f4050 ldr r4, [pc, #80] ; 10988c <opcd_rc632_fifo_read+0xf4>
109838: e5d40044 ldrb r0, [r4, #68] ; 0x44
10983c: e1e02c80 mvn r2, r0, lsl #25
109840: e1e0eca2 mvn lr, r2, lsr #25
spi_outbuf[fifo_length] = 0x00;
109844: e084c00c add ip, r4, ip
109848: e3a03000 mov r3, #0
spi_transceive(spi_outbuf, fifo_length+1, spi_inbuf, &rx_len);
10984c: e28d2004 add r2, sp, #4
fifo_length = max_len;
for (i = 0; i < fifo_length; i++)
spi_outbuf[i] = FIFO_ADDR;
spi_outbuf[0] |= 0x80;
109850: e5c4e044 strb lr, [r4, #68] ; 0x44
spi_outbuf[fifo_length] = 0x00;
spi_transceive(spi_outbuf, fifo_length+1, spi_inbuf, &rx_len);
109854: e2840044 add r0, r4, #68 ; 0x44
for (i = 0; i < fifo_length; i++)
spi_outbuf[i] = FIFO_ADDR;
spi_outbuf[0] |= 0x80;
spi_outbuf[fifo_length] = 0x00;
109858: e5cc3044 strb r3, [ip, #68] ; 0x44
spi_transceive(spi_outbuf, fifo_length+1, spi_inbuf, &rx_len);
10985c: ebfffef8 bl 109444 <spi_transceive.clone.1>
memcpy(data, spi_inbuf+1, rx_len-1);
109860: e1dd50b4 ldrh r5, [sp, #4]
109864: e2455001 sub r5, r5, #1
109868: e1a00006 mov r0, r6
10986c: e2841001 add r1, r4, #1
109870: e1a02005 mov r2, r5
109874: eb000224 bl 10a10c <memcpy>
DEBUG632("[FIFO] => %s", hexdump(data, rx_len-1));
return rx_len-1;
}
109878: e1a00005 mov r0, r5
10987c: e28dd008 add sp, sp, #8
109880: e8bd4070 pop {r4, r5, r6, lr}
109884: e12fff1e bx lr
109888: 0020396c .word 0x0020396c
10988c: 00203928 .word 0x00203928
00109890 <opcd_rc632_set_bits>:
int opcd_rc632_set_bits(struct rfid_asic_handle *hdl,
u_int8_t reg, u_int8_t bits)
{
109890: e92d4070 push {r4, r5, r6, lr}
109894: e24dd008 sub sp, sp, #8
109898: e1a06002 mov r6, r2
u_int8_t val;
int ret;
ret = opcd_rc632_reg_read(hdl, reg, &val);
10989c: e28d2007 add r2, sp, #7
return rx_len-1;
}
int opcd_rc632_set_bits(struct rfid_asic_handle *hdl,
u_int8_t reg, u_int8_t bits)
{
1098a0: e1a05000 mov r5, r0
1098a4: e1a04001 mov r4, r1
u_int8_t val;
int ret;
ret = opcd_rc632_reg_read(hdl, reg, &val);
1098a8: ebffff69 bl 109654 <opcd_rc632_reg_read>
if (ret < 0)
1098ac: e3500000 cmp r0, #0
1098b0: ba000006 blt 1098d0 <opcd_rc632_set_bits+0x40>
return ret;
val |= bits;
1098b4: e5dd3007 ldrb r3, [sp, #7]
1098b8: e1866003 orr r6, r6, r3
return opcd_rc632_reg_write(hdl, reg, val);
1098bc: e1a00005 mov r0, r5
1098c0: e1a01004 mov r1, r4
1098c4: e1a02006 mov r2, r6
ret = opcd_rc632_reg_read(hdl, reg, &val);
if (ret < 0)
return ret;
val |= bits;
1098c8: e5cd6007 strb r6, [sp, #7]
return opcd_rc632_reg_write(hdl, reg, val);
1098cc: ebffff0e bl 10950c <opcd_rc632_reg_write>
}
1098d0: e28dd008 add sp, sp, #8
1098d4: e8bd4070 pop {r4, r5, r6, lr}
1098d8: e12fff1e bx lr
001098dc <opcd_rc632_clear_bits>:
int opcd_rc632_clear_bits(struct rfid_asic_handle *hdl,
u_int8_t reg, u_int8_t bits)
{
1098dc: e92d4070 push {r4, r5, r6, lr}
1098e0: e24dd008 sub sp, sp, #8
1098e4: e1a06002 mov r6, r2
u_int8_t val;
int ret;
ret = opcd_rc632_reg_read(hdl, reg, &val);
1098e8: e28d2007 add r2, sp, #7
return opcd_rc632_reg_write(hdl, reg, val);
}
int opcd_rc632_clear_bits(struct rfid_asic_handle *hdl,
u_int8_t reg, u_int8_t bits)
{
1098ec: e1a05000 mov r5, r0
1098f0: e1a04001 mov r4, r1
u_int8_t val;
int ret;
ret = opcd_rc632_reg_read(hdl, reg, &val);
1098f4: ebffff56 bl 109654 <opcd_rc632_reg_read>
if (ret < 0)
1098f8: e3500000 cmp r0, #0
1098fc: ba000006 blt 10991c <opcd_rc632_clear_bits+0x40>
return ret;
val &= ~bits;
109900: e5dd3007 ldrb r3, [sp, #7]
109904: e1c36006 bic r6, r3, r6
return opcd_rc632_reg_write(hdl, reg, val);
109908: e1a00005 mov r0, r5
10990c: e1a01004 mov r1, r4
109910: e1a02006 mov r2, r6
ret = opcd_rc632_reg_read(hdl, reg, &val);
if (ret < 0)
return ret;
val &= ~bits;
109914: e5cd6007 strb r6, [sp, #7]
return opcd_rc632_reg_write(hdl, reg, val);
109918: ebfffefb bl 10950c <opcd_rc632_reg_write>
}
10991c: e28dd008 add sp, sp, #8
109920: e8bd4070 pop {r4, r5, r6, lr}
109924: e12fff1e bx lr
00109928 <rc632_usb_in>:
/* turn off register paging */
opcd_rc632_reg_write(NULL, RC632_REG_PAGE0, 0x00);
}
static int rc632_usb_in(struct req_ctx *rctx)
{
109928: e92d4038 push {r3, r4, r5, lr}
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
u_int16_t len = rctx->tot_len-sizeof(*poh);
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
10992c: e3a03004 mov r3, #4
}
static int rc632_usb_in(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
u_int16_t len = rctx->tot_len-sizeof(*poh);
109930: e1d0c0b6 ldrh ip, [r0, #6]
opcd_rc632_reg_write(NULL, RC632_REG_PAGE0, 0x00);
}
static int rc632_usb_in(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
109934: e5904008 ldr r4, [r0, #8]
u_int16_t len = rctx->tot_len-sizeof(*poh);
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
109938: e1c030b6 strh r3, [r0, #6]
/* turn off register paging */
opcd_rc632_reg_write(NULL, RC632_REG_PAGE0, 0x00);
}
static int rc632_usb_in(struct req_ctx *rctx)
{
10993c: e1a05000 mov r5, r0
u_int16_t len = rctx->tot_len-sizeof(*poh);
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
switch (poh->cmd) {
109940: e5d40000 ldrb r0, [r4]
}
static int rc632_usb_in(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
u_int16_t len = rctx->tot_len-sizeof(*poh);
109944: e24c1004 sub r1, ip, #4
109948: e1a02801 lsl r2, r1, #16
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
switch (poh->cmd) {
10994c: e2403011 sub r3, r0, #17
}
static int rc632_usb_in(struct req_ctx *rctx)
{
struct openpcd_hdr *poh = (struct openpcd_hdr *) rctx->data;
u_int16_t len = rctx->tot_len-sizeof(*poh);
109950: e1a02822 lsr r2, r2, #16
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
switch (poh->cmd) {
109954: e353000a cmp r3, #10
109958: 979ff103 ldrls pc, [pc, r3, lsl #2]
10995c: ea00000d b 109998 <rc632_usb_in+0x70>
109960: 001099a0 .word 0x001099a0
109964: 001099c4 .word 0x001099c4
109968: 0010998c .word 0x0010998c
10996c: 001099f4 .word 0x001099f4
109970: 00109a10 .word 0x00109a10
109974: 00109a2c .word 0x00109a2c
109978: 00109a4c .word 0x00109a4c
10997c: 0010998c .word 0x0010998c
109980: 0010998c .word 0x0010998c
109984: 00109998 .word 0x00109998
109988: 001099e0 .word 0x001099e0
}
return (poh->flags & OPENPCD_FLAG_RESPOND) ? USB_RET_RESPOND : 0;
not_impl:
DEBUGP("NOT IMPLEMENTED YET ");
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
10998c: e59f00f0 ldr r0, [pc, #240] ; 109a84 <rc632_usb_in+0x15c>
}
109990: e8bd4038 pop {r3, r4, r5, lr}
109994: e12fff1e bx lr
DEBUGP("DUMP REGS ");
goto not_impl;
break;
default:
DEBUGP("UNKNOWN ");
return USB_ERR(USB_ERR_CMD_UNKNOWN);
109998: e59f00e8 ldr r0, [pc, #232] ; 109a88 <rc632_usb_in+0x160>
10999c: eafffffb b 109990 <rc632_usb_in+0x68>
//}
}
break;
case OPENPCD_CMD_WRITE_REG:
DEBUGP("WRITE_REG(0x%02x, 0x%02x) ", poh->reg, poh->val);
opcd_rc632_reg_write(NULL, poh->reg, poh->val);
1099a0: e3a00000 mov r0, #0
1099a4: e5d41002 ldrb r1, [r4, #2]
1099a8: e5d42003 ldrb r2, [r4, #3]
1099ac: ebfffed6 bl 10950c <opcd_rc632_reg_write>
1099b0: e5d43001 ldrb r3, [r4, #1]
default:
DEBUGP("UNKNOWN ");
return USB_ERR(USB_ERR_CMD_UNKNOWN);
}
return (poh->flags & OPENPCD_FLAG_RESPOND) ? USB_RET_RESPOND : 0;
1099b4: e2132001 ands r2, r3, #1
1099b8: 01a00002 moveq r0, r2
1099bc: 13a00c01 movne r0, #256 ; 0x100
1099c0: eafffff2 b 109990 <rc632_usb_in+0x68>
opcd_rc632_reg_write_set(NULL, poh->data, len);
break;
case OPENPCD_CMD_WRITE_FIFO:
DEBUGP("WRITE FIFO(len=%u): %s ", len,
hexdump(poh->data, len));
opcd_rc632_fifo_write(NULL, len, poh->data, 0);
1099c4: e3a00000 mov r0, #0
1099c8: e20210ff and r1, r2, #255 ; 0xff
1099cc: e1a03000 mov r3, r0
1099d0: e2842004 add r2, r4, #4
1099d4: ebffff06 bl 1095f4 <opcd_rc632_fifo_write>
1099d8: e5d43001 ldrb r3, [r4, #1]
break;
1099dc: eafffff4 b 1099b4 <rc632_usb_in+0x8c>
DEBUGP("WRITE_REG(0x%02x, 0x%02x) ", poh->reg, poh->val);
opcd_rc632_reg_write(NULL, poh->reg, poh->val);
break;
case OPENPCD_CMD_WRITE_REG_SET:
DEBUGP("WRITE_REG_SET(%s) ", hexdump(poh->data, len));
opcd_rc632_reg_write_set(NULL, poh->data, len);
1099e0: e3a00000 mov r0, #0
1099e4: e2841004 add r1, r4, #4
1099e8: ebfffed9 bl 109554 <opcd_rc632_reg_write_set>
1099ec: e5d43001 ldrb r3, [r4, #1]
break;
1099f0: eaffffef b 1099b4 <rc632_usb_in+0x8c>
DEBUGP("WRITE VFIFO ");
goto not_impl;
break;
case OPENPCD_CMD_REG_BITS_CLEAR:
DEBUGP("CLEAR BITS ");
poh->val = opcd_rc632_clear_bits(NULL, poh->reg, poh->val);
1099f4: e3a00000 mov r0, #0
1099f8: e5d41002 ldrb r1, [r4, #2]
1099fc: e5d42003 ldrb r2, [r4, #3]
109a00: ebffffb5 bl 1098dc <opcd_rc632_clear_bits>
109a04: e5d43001 ldrb r3, [r4, #1]
109a08: e5c40003 strb r0, [r4, #3]
break;
109a0c: eaffffe8 b 1099b4 <rc632_usb_in+0x8c>
case OPENPCD_CMD_REG_BITS_SET:
DEBUGP("SET BITS ");
poh->val = opcd_rc632_set_bits(NULL, poh->reg, poh->val);
109a10: e3a00000 mov r0, #0
109a14: e5d41002 ldrb r1, [r4, #2]
109a18: e5d42003 ldrb r2, [r4, #3]
109a1c: ebffff9b bl 109890 <opcd_rc632_set_bits>
109a20: e5d43001 ldrb r3, [r4, #1]
109a24: e5c40003 strb r0, [r4, #3]
break;
109a28: eaffffe1 b 1099b4 <rc632_usb_in+0x8c>
/* initialize transmit length to header length */
rctx->tot_len = sizeof(*poh);
switch (poh->cmd) {
case OPENPCD_CMD_READ_REG:
opcd_rc632_reg_read(NULL, poh->reg, &poh->val);
109a2c: e2842003 add r2, r4, #3
109a30: e3a00000 mov r0, #0
109a34: e5d41002 ldrb r1, [r4, #2]
109a38: ebffff05 bl 109654 <opcd_rc632_reg_read>
DEBUGP("READ REG(0x%02x)=0x%02x ", poh->reg, poh->val);
/* register read always has to provoke a response */
poh->flags &= OPENPCD_FLAG_RESPOND;
109a3c: e5d42001 ldrb r2, [r4, #1]
109a40: e2023001 and r3, r2, #1
109a44: e5c43001 strb r3, [r4, #1]
break;
109a48: eaffffd9 b 1099b4 <rc632_usb_in+0x8c>
case OPENPCD_CMD_READ_FIFO:
/* FIFO read always has to provoke a response */
poh->flags &= OPENPCD_FLAG_RESPOND;
109a4c: e5d43001 ldrb r3, [r4, #1]
109a50: e203e001 and lr, r3, #1
hexdump(poh->data, pih_len));
/* don't set state of second rctx, main function
* body will do this after switch statement */
} else {
#endif
poh->val = opcd_rc632_fifo_read(NULL, req_len, poh->data);
109a54: e5d41003 ldrb r1, [r4, #3]
/* register read always has to provoke a response */
poh->flags &= OPENPCD_FLAG_RESPOND;
break;
case OPENPCD_CMD_READ_FIFO:
/* FIFO read always has to provoke a response */
poh->flags &= OPENPCD_FLAG_RESPOND;
109a58: e5c4e001 strb lr, [r4, #1]
hexdump(poh->data, pih_len));
/* don't set state of second rctx, main function
* body will do this after switch statement */
} else {
#endif
poh->val = opcd_rc632_fifo_read(NULL, req_len, poh->data);
109a5c: e3a00000 mov r0, #0
109a60: e2842004 add r2, r4, #4
109a64: ebffff4b bl 109798 <opcd_rc632_fifo_read>
109a68: e20010ff and r1, r0, #255 ; 0xff
109a6c: e5c41003 strb r1, [r4, #3]
rctx->tot_len += poh->val;
109a70: e1d5c0b6 ldrh ip, [r5, #6]
109a74: e081000c add r0, r1, ip
109a78: e1c500b6 strh r0, [r5, #6]
109a7c: e5d43001 ldrb r3, [r4, #1]
DEBUGP("READ FIFO(len=%u)=%s ", poh->val,
hexdump(poh->data, poh->val));
//}
}
break;
109a80: eaffffcb b 1099b4 <rc632_usb_in+0x8c>
109a84: 00000302 .word 0x00000302
109a88: 00000301 .word 0x00000301
00109a8c <rc632_unthrottle>:
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
109a8c: e3a02102 mov r2, #-2147483648 ; 0x80000000
109a90: e3e03c0f mvn r3, #3840 ; 0xf00
109a94: e5832021 str r2, [r3, #33] ; 0x21
}
void rc632_unthrottle(void)
{
AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
}
109a98: e12fff1e bx lr
00109a9c <rc632_power>:
void rc632_power(u_int8_t up)
{
DEBUGPCRF("powering %s RC632", up ? "up" : "down");
if (up)
109a9c: e3500000 cmp r0, #0
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
109aa0: e3a02020 mov r2, #32
109aa4: e3e03c0b mvn r3, #2816 ; 0xb00
109aa8: 150320cb strne r2, [r3, #-203] ; 0xffffff35
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_SetOutput(
const AT91PS_PIO pPio, // \arg pointer to a PIO controller
const unsigned int flag) // \arg output to be set
{
pPio->PIO_SODR = flag;
109aac: 050320cf streq r2, [r3, #-207] ; 0xffffff31
109ab0: e12fff1e bx lr
00109ab4 <rc632_reset>:
AT91F_PIO_SetOutput(AT91C_BASE_PIOA,
OPENPCD_PIO_RC632_RESET);
}
void rc632_reset(void)
{
109ab4: e52de004 push {lr} ; (str lr, [sp, #-4]!)
109ab8: e3a02020 mov r2, #32
109abc: e24dd00c sub sp, sp, #12
109ac0: e3e01c0b mvn r1, #2816 ; 0xb00
volatile int i;
rc632_power(0);
for (i = 0; i < 0xffff; i++)
109ac4: e3a00000 mov r0, #0
109ac8: e50120cf str r2, [r1, #-207] ; 0xffffff31
109acc: e58d0000 str r0, [sp]
109ad0: e59d3000 ldr r3, [sp]
109ad4: e59f205c ldr r2, [pc, #92] ; 109b38 <rc632_reset+0x84>
109ad8: e1530002 cmp r3, r2
109adc: ca000005 bgt 109af8 <rc632_reset+0x44>
109ae0: e59d3000 ldr r3, [sp]
109ae4: e283e001 add lr, r3, #1
109ae8: e58de000 str lr, [sp]
109aec: e59dc000 ldr ip, [sp]
109af0: e15c0002 cmp ip, r2
109af4: dafffff9 ble 109ae0 <rc632_reset+0x2c>
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_ClearOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int flag) // \arg output to be cleared
{
pPio->PIO_CODR = flag;
109af8: e3a00020 mov r0, #32
109afc: e3e02c0b mvn r2, #2816 ; 0xb00
109b00: e50200cb str r0, [r2, #-203] ; 0xffffff35
rc632_power(1);
/* wait for startup phase to finish */
while (1) {
u_int8_t val;
opcd_rc632_reg_read(NULL, RC632_REG_COMMAND, &val);
109b04: e3a00000 mov r0, #0
109b08: e3a01001 mov r1, #1
109b0c: e28d2007 add r2, sp, #7
109b10: ebfffecf bl 109654 <opcd_rc632_reg_read>
if (val == 0x00)
109b14: e5dd0007 ldrb r0, [sp, #7]
109b18: e3500000 cmp r0, #0
109b1c: 1afffff8 bne 109b04 <rc632_reset+0x50>
break;
}
/* turn off register paging */
opcd_rc632_reg_write(NULL, RC632_REG_PAGE0, 0x00);
109b20: e1a01000 mov r1, r0
109b24: e1a02000 mov r2, r0
109b28: ebfffe77 bl 10950c <opcd_rc632_reg_write>
}
109b2c: e28dd00c add sp, sp, #12
109b30: e49de004 pop {lr} ; (ldr lr, [sp], #4)
109b34: e12fff1e bx lr
109b38: 0000fffe .word 0x0000fffe
00109b3c <rc632_init>:
DEBUGP("NOT IMPLEMENTED YET ");
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
}
void rc632_init(void)
{
109b3c: e92d45f0 push {r4, r5, r6, r7, r8, sl, lr}
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA,
AT91C_PA11_NPCS0|AT91C_PA12_MISO|
AT91C_PA13_MOSI |AT91C_PA14_SPCK, 0);
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SPI,
109b40: e59f70ec ldr r7, [pc, #236] ; 109c34 <rc632_init+0xf8>
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
pPio->PIO_BSR = periphBEnable;
109b44: e3a04000 mov r4, #0
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
109b48: e3a05020 mov r5, #32
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
109b4c: e3e06c0b mvn r6, #2816 ; 0xb00
109b50: e3a0ab1e mov sl, #30720 ; 0x7800
//*----------------------------------------------------------------------------
static inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
109b54: e3e0cc03 mvn ip, #768 ; 0x300
109b58: e59f80d8 ldr r8, [pc, #216] ; 109c38 <rc632_init+0xfc>
DEBUGP("NOT IMPLEMENTED YET ");
return USB_ERR(USB_ERR_CMD_NOT_IMPL);
}
void rc632_init(void)
{
109b5c: e24dd00c sub sp, sp, #12
109b60: e50c50ef str r5, [ip, #-239] ; 0xffffff11
AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA,
AT91C_PA11_NPCS0|AT91C_PA12_MISO|
AT91C_PA13_MOSI |AT91C_PA14_SPCK, 0);
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SPI,
109b64: e1a03004 mov r3, r4
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int periphAEnable, // \arg PERIPH A to enable
unsigned int periphBEnable) // \arg PERIPH B to enable
{
pPio->PIO_ASR = periphAEnable;
109b68: e506a08f str sl, [r6, #-143] ; 0xffffff71
109b6c: e3a01005 mov r1, #5
pPio->PIO_BSR = periphBEnable;
109b70: e506408b str r4, [r6, #-139] ; 0xffffff75
109b74: e3a02007 mov r2, #7
pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
109b78: e506a0fb str sl, [r6, #-251] ; 0xffffff05
109b7c: e1a00007 mov r0, r7
109b80: e58d8000 str r8, [sp]
109b84: ebffea80 bl 10458c <AT91F_AIC_ConfigureIt>
static inline void AT91F_SPI_EnableIt (
AT91PS_SPI pSPI, // pointer to a SPI controller
unsigned int flag) // IT to be enabled
{
//* Write to the IER register
pSPI->SPI_IER = flag;
109b88: e59fc0ac ldr ip, [pc, #172] ; 109c3c <rc632_init+0x100>
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
109b8c: e3e08c0f mvn r8, #3840 ; 0xf00
static inline void AT91F_SPI_EnableIt (
AT91PS_SPI pSPI, // pointer to a SPI controller
unsigned int flag) // IT to be enabled
{
//* Write to the IER register
pSPI->SPI_IER = flag;
109b90: e3a0e00c mov lr, #12
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
109b94: e5885021 str r5, [r8, #33] ; 0x21
static inline void AT91F_SPI_EnableIt (
AT91PS_SPI pSPI, // pointer to a SPI controller
unsigned int flag) // IT to be enabled
{
//* Write to the IER register
pSPI->SPI_IER = flag;
109b98: e50ce0eb str lr, [ip, #-235] ; 0xffffff15
109b9c: e3a0e030 mov lr, #48 ; 0x30
109ba0: e50ce0eb str lr, [ip, #-235] ; 0xffffff15
static inline void AT91F_SPI_CfgMode (
AT91PS_SPI pSPI, // pointer to a SPI controller
int mode) // mode register
{
//* Write to the MR register
pSPI->SPI_MR = mode;
109ba4: e3a0e011 mov lr, #17
109ba8: e50ce0fb str lr, [ip, #-251] ; 0xffffff05
AT91PS_SPI pSPI, // pointer to a SPI controller
int cs, // SPI cs number (0 to 3)
int val) // chip select register
{
//* Write to the CSR register
*(pSPI->SPI_CSR + cs) = val;
109bac: e59fe08c ldr lr, [pc, #140] ; 109c40 <rc632_init+0x104>
static inline void AT91F_SPI_Enable (
AT91PS_SPI pSPI // pointer to a SPI controller
)
{
//* Write to the CR register
pSPI->SPI_CR = AT91C_SPI_SPIEN;
109bb0: e3a0a001 mov sl, #1
AT91PS_SPI pSPI, // pointer to a SPI controller
int cs, // SPI cs number (0 to 3)
int val) // chip select register
{
//* Write to the CSR register
*(pSPI->SPI_CSR + cs) = val;
109bb4: e50ce0cf str lr, [ip, #-207] ; 0xffffff31
static inline void AT91F_SPI_Enable (
AT91PS_SPI pSPI // pointer to a SPI controller
)
{
//* Write to the CR register
pSPI->SPI_CR = AT91C_SPI_SPIEN;
109bb8: e50ca0ff str sl, [ip, #-255] ; 0xffffff01
AT91F_SPI_CfgCs(pSPI, 0, AT91C_SPI_BITS_8|AT91C_SPI_NCPHA|(0x7f<<8));
#endif
AT91F_SPI_Enable(pSPI);
/* Register rc632_irq */
AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632,
109bbc: e59fc080 ldr ip, [pc, #128] ; 109c44 <rc632_init+0x108>
109bc0: e1a02004 mov r2, r4
109bc4: e1a03004 mov r3, r4
109bc8: e3a0101f mov r1, #31
109bcc: e1a00007 mov r0, r7
109bd0: e58dc000 str ip, [sp]
109bd4: ebffea6c bl 10458c <AT91F_AIC_ConfigureIt>
static inline void AT91F_AIC_EnableIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
109bd8: e3a03102 mov r3, #-2147483648 ; 0x80000000
109bdc: e5883021 str r3, [r8, #33] ; 0x21
//*----------------------------------------------------------------------------
static inline void AT91F_PIO_CfgOutput(
AT91PS_PIO pPio, // \arg pointer to a PIO controller
unsigned int pioEnable) // \arg PIO to be enabled
{
pPio->PIO_PER = pioEnable; // Set in PIO mode
109be0: e50650ff str r5, [r6, #-255] ; 0xffffff01
pPio->PIO_OER = pioEnable; // Configure in Output
109be4: e50650ef str r5, [r6, #-239] ; 0xffffff11
AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &rc632_irq);
AT91F_AIC_EnableIt(AT91C_BASE_AIC, OPENPCD_IRQ_RC632);
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPCD_PIO_RC632_RESET);
rc632_reset();
109be8: ebffffb1 bl 109ab4 <rc632_reset>
/* configure IRQ pin */
opcd_rc632_reg_write(NULL, RC632_REG_IRQ_PIN_CONFIG,
109bec: e1a00004 mov r0, r4
109bf0: e3a0102d mov r1, #45 ; 0x2d
109bf4: e3a02003 mov r2, #3
109bf8: ebfffe43 bl 10950c <opcd_rc632_reg_write>
RC632_IRQCFG_CMOS|RC632_IRQCFG_INV);
/* enable interrupts */
opcd_rc632_reg_write(NULL, RC632_REG_INTERRUPT_EN, RC632_INT_TIMER);
109bfc: e1a02005 mov r2, r5
109c00: e1a00004 mov r0, r4
109c04: e3a01006 mov r1, #6
109c08: ebfffe3f bl 10950c <opcd_rc632_reg_write>
/* configure AUX to test signal four */
opcd_rc632_reg_write(NULL, RC632_REG_TEST_ANA_SELECT, 0x04);
109c0c: e1a00004 mov r0, r4
109c10: e3a0103a mov r1, #58 ; 0x3a
109c14: e3a02004 mov r2, #4
109c18: ebfffe3b bl 10950c <opcd_rc632_reg_write>
usb_hdlr_register(&rc632_usb_in, OPENPCD_CMD_CLS_RC632);
109c1c: e1a0100a mov r1, sl
109c20: e59f0020 ldr r0, [pc, #32] ; 109c48 <rc632_init+0x10c>
109c24: ebfff98d bl 108260 <usb_hdlr_register>
};
109c28: e28dd00c add sp, sp, #12
109c2c: e8bd45f0 pop {r4, r5, r6, r7, r8, sl, lr}
109c30: e12fff1e bx lr
109c34: fffff000 .word 0xfffff000
109c38: 0010940c .word 0x0010940c
109c3c: fffe00ff .word 0xfffe00ff
109c40: 00000a02 .word 0x00000a02
109c44: 001096b8 .word 0x001096b8
109c48: 00109928 .word 0x00109928
00109c4c <rc632_dump>:
return (val == tmp);
}
int rc632_dump(void)
{
109c4c: e92d40f0 push {r4, r5, r6, r7, lr}
109c50: e59fc09c ldr ip, [pc, #156] ; 109cf4 <rc632_dump+0xa8>
109c54: e24dd00c sub sp, sp, #12
u_int8_t i;
u_int16_t rx_len = sizeof(spi_inbuf);
109c58: e3a01000 mov r1, #0
109c5c: e3a03041 mov r3, #65 ; 0x41
109c60: e1cd30b6 strh r3, [sp, #6]
109c64: e3a00001 mov r0, #1
for (i = 0; i <= 0x3f; i++) {
u_int8_t reg = i;
if (reg == RC632_REG_FIFO_DATA)
reg = 0x3e;
spi_outbuf[i] = reg << 1;
109c68: e28c7046 add r7, ip, #70 ; 0x46
109c6c: e3a0607c mov r6, #124 ; 0x7c
spi_inbuf[i] = 0x00;
109c70: e1a05001 mov r5, r1
109c74: ea000008 b 109c9c <rc632_dump+0x50>
int rc632_dump(void)
{
u_int8_t i;
u_int16_t rx_len = sizeof(spi_inbuf);
for (i = 0; i <= 0x3f; i++) {
109c78: e350003f cmp r0, #63 ; 0x3f
u_int8_t reg = i;
if (reg == RC632_REG_FIFO_DATA)
reg = 0x3e;
spi_outbuf[i] = reg << 1;
109c7c: e5ce4044 strb r4, [lr, #68] ; 0x44
109c80: e59f306c ldr r3, [pc, #108] ; 109cf4 <rc632_dump+0xa8>
spi_inbuf[i] = 0x00;
109c84: e3a04000 mov r4, #0
109c88: e7cc5002 strb r5, [ip, r2]
int rc632_dump(void)
{
u_int8_t i;
u_int16_t rx_len = sizeof(spi_inbuf);
for (i = 0; i <= 0x3f; i++) {
109c8c: 8a00000a bhi 109cbc <rc632_dump+0x70>
}
int rc632_dump(void)
{
u_int8_t i;
u_int16_t rx_len = sizeof(spi_inbuf);
109c90: e2800001 add r0, r0, #1
109c94: e2811001 add r1, r1, #1
109c98: e20000ff and r0, r0, #255 ; 0xff
109c9c: e20120ff and r2, r1, #255 ; 0xff
for (i = 0; i <= 0x3f; i++) {
u_int8_t reg = i;
if (reg == RC632_REG_FIFO_DATA)
109ca0: e3520002 cmp r2, #2
reg = 0x3e;
spi_outbuf[i] = reg << 1;
109ca4: e08ce002 add lr, ip, r2
109ca8: e1a04082 lsl r4, r2, #1
u_int8_t i;
u_int16_t rx_len = sizeof(spi_inbuf);
for (i = 0; i <= 0x3f; i++) {
u_int8_t reg = i;
if (reg == RC632_REG_FIFO_DATA)
109cac: 1afffff1 bne 109c78 <rc632_dump+0x2c>
reg = 0x3e;
spi_outbuf[i] = reg << 1;
109cb0: e5c76000 strb r6, [r7]
spi_inbuf[i] = 0x00;
109cb4: e7cc5002 strb r5, [ip, r2]
109cb8: eafffff4 b 109c90 <rc632_dump+0x44>
}
/* MSB of first byte of read spi transfer is high */
spi_outbuf[0] |= 0x80;
109cbc: e5d32044 ldrb r2, [r3, #68] ; 0x44
109cc0: e1e01c82 mvn r1, r2, lsl #25
109cc4: e1e0cca1 mvn ip, r1, lsr #25
/* last byte of read spi transfer is 0x00 */
spi_outbuf[0x40] = 0x00;
spi_inbuf[0x40] = 0x00;
spi_transceive(spi_outbuf, 0x41, spi_inbuf, &rx_len);
109cc8: e2830044 add r0, r3, #68 ; 0x44
109ccc: e3a01041 mov r1, #65 ; 0x41
109cd0: e28d2006 add r2, sp, #6
spi_outbuf[i] = reg << 1;
spi_inbuf[i] = 0x00;
}
/* MSB of first byte of read spi transfer is high */
spi_outbuf[0] |= 0x80;
109cd4: e5c3c044 strb ip, [r3, #68] ; 0x44
/* last byte of read spi transfer is 0x00 */
spi_outbuf[0x40] = 0x00;
109cd8: e5c34084 strb r4, [r3, #132] ; 0x84
spi_inbuf[0x40] = 0x00;
109cdc: e5c34040 strb r4, [r3, #64] ; 0x40
spi_transceive(spi_outbuf, 0x41, spi_inbuf, &rx_len);
109ce0: ebfffdd7 bl 109444 <spi_transceive.clone.1>
else
DEBUGPCR("REG 0x%02x = 0x%02x", i, spi_inbuf[i+1]);
}
return 0;
}
109ce4: e1a00004 mov r0, r4
109ce8: e28dd00c add sp, sp, #12
109cec: e8bd40f0 pop {r4, r5, r6, r7, lr}
109cf0: e12fff1e bx lr
109cf4: 00203928 .word 0x00203928
00109cf8 <rc632_test>:
int rc632_test(struct rfid_asic_handle *hdl)
{
109cf8: e92d4010 push {r4, lr}
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0x55) != 1)
109cfc: e3a01055 mov r1, #85 ; 0x55
return 0;
}
int rc632_test(struct rfid_asic_handle *hdl)
{
109d00: e1a04000 mov r4, r0
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0x55) != 1)
109d04: ebfffe91 bl 109750 <rc632_reg_write_verify.clone.0>
109d08: e3500001 cmp r0, #1
return -1;
109d0c: 13e00000 mvnne r0, #0
return 0;
}
int rc632_test(struct rfid_asic_handle *hdl)
{
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0x55) != 1)
109d10: 0a000001 beq 109d1c <rc632_test+0x24>
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0xAA) != 1)
return -1;
return 0;
}
109d14: e8bd4010 pop {r4, lr}
109d18: e12fff1e bx lr
int rc632_test(struct rfid_asic_handle *hdl)
{
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0x55) != 1)
return -1;
if (rc632_reg_write_verify(hdl, RC632_REG_RX_WAIT, 0xAA) != 1)
109d1c: e1a00004 mov r0, r4
109d20: e3a010aa mov r1, #170 ; 0xaa
109d24: ebfffe89 bl 109750 <rc632_reg_write_verify.clone.0>
109d28: e3500001 cmp r0, #1
return -1;
109d2c: 03a00000 moveq r0, #0
109d30: 13e00000 mvnne r0, #0
109d34: eafffff6 b 109d14 <rc632_test+0x1c>
00109d38 <rc632_turn_on_rf>:
return opcd_rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
}
int
rc632_turn_on_rf(struct rfid_asic_handle *handle)
{
109d38: e92d4008 push {r3, lr}
ENTER();
return opcd_rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
109d3c: e3a01011 mov r1, #17
109d40: e3a02003 mov r2, #3
109d44: ebfffed1 bl 109890 <opcd_rc632_set_bits>
}
109d48: e8bd4008 pop {r3, lr}
109d4c: e12fff1e bx lr
00109d50 <rc632_turn_off_rf>:
int
rc632_turn_off_rf(struct rfid_asic_handle *handle)
{
109d50: e92d4008 push {r3, lr}
ENTER();
return opcd_rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
109d54: e3a01011 mov r1, #17
109d58: e3a02003 mov r2, #3
109d5c: ebfffede bl 1098dc <opcd_rc632_clear_bits>
}
109d60: e8bd4008 pop {r3, lr}
109d64: e12fff1e bx lr
00109d68 <rc632_write_eeprom>:
#define MAX_WRITE_LEN 16 /* see Sec. 18.6.1.2 of RC632 Spec Rev. 3.2. */
int
rc632_write_eeprom(struct rfid_asic_handle *handle,
u_int16_t addr, u_int8_t len, u_int8_t *data)
{
109d68: e92d4030 push {r4, r5, lr}
u_int8_t sndbuf[MAX_WRITE_LEN + 2];
u_int8_t reg;
int ret;
if (len > MAX_WRITE_LEN)
109d6c: e3520010 cmp r2, #16
#define MAX_WRITE_LEN 16 /* see Sec. 18.6.1.2 of RC632 Spec Rev. 3.2. */
int
rc632_write_eeprom(struct rfid_asic_handle *handle,
u_int16_t addr, u_int8_t len, u_int8_t *data)
{
109d70: e24dd01c sub sp, sp, #28
109d74: e1a04002 mov r4, r2
109d78: e1a05000 mov r5, r0
109d7c: e1a0c001 mov ip, r1
u_int8_t sndbuf[MAX_WRITE_LEN + 2];
u_int8_t reg;
int ret;
if (len > MAX_WRITE_LEN)
109d80: 9a000003 bls 109d94 <rc632_write_eeprom+0x2c>
return -EINVAL;
if (addr < 0x10)
return -EPERM;
if (addr > 0x1ff)
return -EINVAL;
109d84: e3e00015 mvn r0, #21
break;
}
}
return ret;
}
109d88: e28dd01c add sp, sp, #28
109d8c: e8bd4030 pop {r4, r5, lr}
109d90: e12fff1e bx lr
u_int8_t reg;
int ret;
if (len > MAX_WRITE_LEN)
return -EINVAL;
if (addr < 0x10)
109d94: e351000f cmp r1, #15
109d98: 8a000001 bhi 109da4 <rc632_write_eeprom+0x3c>
ret = opcd_rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
if (ret < 0)
return ret;
if (reg & RC632_ERR_FLAG_ACCESS_ERR)
return -EPERM;
109d9c: e3e00000 mvn r0, #0
109da0: eafffff8 b 109d88 <rc632_write_eeprom+0x20>
if (len > MAX_WRITE_LEN)
return -EINVAL;
if (addr < 0x10)
return -EPERM;
if (addr > 0x1ff)
109da4: e3510c02 cmp r1, #512 ; 0x200
109da8: 2afffff5 bcs 109d84 <rc632_write_eeprom+0x1c>
return -EINVAL;
sndbuf[0] = addr & 0x00ff; /* LSB */
sndbuf[1] = addr >> 8; /* MSB */
109dac: e1a0e421 lsr lr, r1, #8
memcpy(&sndbuf[2], data, len);
109db0: e28d0006 add r0, sp, #6
109db4: e1a01003 mov r1, r3
if (addr < 0x10)
return -EPERM;
if (addr > 0x1ff)
return -EINVAL;
sndbuf[0] = addr & 0x00ff; /* LSB */
109db8: e5cdc004 strb ip, [sp, #4]
sndbuf[1] = addr >> 8; /* MSB */
109dbc: e5cde005 strb lr, [sp, #5]
memcpy(&sndbuf[2], data, len);
109dc0: eb0000d1 bl 10a10c <memcpy>
ret = opcd_rc632_fifo_write(handle, len + 2, sndbuf, 0x03);
109dc4: e2841002 add r1, r4, #2
109dc8: e1a00005 mov r0, r5
109dcc: e20110ff and r1, r1, #255 ; 0xff
109dd0: e28d2004 add r2, sp, #4
109dd4: e3a03003 mov r3, #3
109dd8: ebfffe05 bl 1095f4 <opcd_rc632_fifo_write>
if (ret < 0)
109ddc: e3500000 cmp r0, #0
109de0: baffffe8 blt 109d88 <rc632_write_eeprom+0x20>
return ret;
ret = opcd_rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_WRITE_E2);
109de4: e3a01001 mov r1, #1
109de8: e1a00005 mov r0, r5
109dec: e1a02001 mov r2, r1
109df0: ebfffdc5 bl 10950c <opcd_rc632_reg_write>
if (ret < 0)
109df4: e3500000 cmp r0, #0
109df8: baffffe2 blt 109d88 <rc632_write_eeprom+0x20>
return ret;
ret = opcd_rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
109dfc: e1a00005 mov r0, r5
109e00: e3a0100a mov r1, #10
109e04: e28d2017 add r2, sp, #23
109e08: ebfffe11 bl 109654 <opcd_rc632_reg_read>
if (ret < 0)
109e0c: e3500000 cmp r0, #0
109e10: baffffdc blt 109d88 <rc632_write_eeprom+0x20>
return ret;
if (reg & RC632_ERR_FLAG_ACCESS_ERR)
109e14: e5dd3017 ldrb r3, [sp, #23]
109e18: e3130020 tst r3, #32
109e1c: 1affffde bne 109d9c <rc632_write_eeprom+0x34>
return -EPERM;
while (1) {
ret = opcd_rc632_reg_read(handle, RC632_REG_SECONDARY_STATUS, &reg);
109e20: e1a00005 mov r0, r5
109e24: e3a01005 mov r1, #5
109e28: e28d2017 add r2, sp, #23
109e2c: ebfffe08 bl 109654 <opcd_rc632_reg_read>
if (ret < 0)
109e30: e3500000 cmp r0, #0
109e34: baffffd3 blt 109d88 <rc632_write_eeprom+0x20>
return ret;
if (reg & RC632_SEC_ST_E2_READY) {
109e38: e5dd0017 ldrb r0, [sp, #23]
109e3c: e3100040 tst r0, #64 ; 0x40
109e40: 0afffff6 beq 109e20 <rc632_write_eeprom+0xb8>
/* the E2Write command must be terminated, See sec. 18.6.1.3 */
ret = opcd_rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
109e44: e1a00005 mov r0, r5
109e48: e3a01001 mov r1, #1
109e4c: e3a02000 mov r2, #0
109e50: ebfffdad bl 10950c <opcd_rc632_reg_write>
break;
}
}
return ret;
109e54: eaffffcb b 109d88 <rc632_write_eeprom+0x20>
00109e58 <rc632_read_eeprom>:
}
int
rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr, u_int8_t len,
u_int8_t *recvbuf)
{
109e58: e92d4070 push {r4, r5, r6, lr}
109e5c: e1a0c001 mov ip, r1
109e60: e24dd008 sub sp, sp, #8
sndbuf[0] = (addr & 0xff);
sndbuf[1] = addr >> 8;
sndbuf[2] = len;
ret = opcd_rc632_fifo_write(handle, 3, sndbuf, 0x03);
109e64: e3a01003 mov r1, #3
}
int
rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr, u_int8_t len,
u_int8_t *recvbuf)
{
109e68: e1a04002 mov r4, r2
u_int8_t sndbuf[3];
u_int8_t err;
int ret;
sndbuf[0] = (addr & 0xff);
sndbuf[1] = addr >> 8;
109e6c: e1a0e42c lsr lr, ip, #8
}
int
rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr, u_int8_t len,
u_int8_t *recvbuf)
{
109e70: e1a06003 mov r6, r3
sndbuf[0] = (addr & 0xff);
sndbuf[1] = addr >> 8;
sndbuf[2] = len;
ret = opcd_rc632_fifo_write(handle, 3, sndbuf, 0x03);
109e74: e28d2004 add r2, sp, #4
109e78: e1a03001 mov r3, r1
}
int
rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr, u_int8_t len,
u_int8_t *recvbuf)
{
109e7c: e1a05000 mov r5, r0
u_int8_t sndbuf[3];
u_int8_t err;
int ret;
sndbuf[0] = (addr & 0xff);
109e80: e5cdc004 strb ip, [sp, #4]
sndbuf[1] = addr >> 8;
109e84: e5cde005 strb lr, [sp, #5]
sndbuf[2] = len;
109e88: e5cd4006 strb r4, [sp, #6]
ret = opcd_rc632_fifo_write(handle, 3, sndbuf, 0x03);
109e8c: ebfffdd8 bl 1095f4 <opcd_rc632_fifo_write>
if (ret < 0)
109e90: e3500000 cmp r0, #0
109e94: ba000005 blt 109eb0 <rc632_read_eeprom+0x58>
return ret;
ret = opcd_rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
109e98: e1a00005 mov r0, r5
109e9c: e3a01001 mov r1, #1
109ea0: e3a02003 mov r2, #3
109ea4: ebfffd98 bl 10950c <opcd_rc632_reg_write>
if (ret < 0)
109ea8: e3500000 cmp r0, #0
109eac: aa000002 bge 109ebc <rc632_read_eeprom+0x64>
ret = opcd_rc632_fifo_read(handle, len, recvbuf);
if (ret < 0)
return ret;
return len;
}
109eb0: e28dd008 add sp, sp, #8
109eb4: e8bd4070 pop {r4, r5, r6, lr}
109eb8: e12fff1e bx lr
if (ret < 0)
return ret;
/* usleep(20000); */
ret = opcd_rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
109ebc: e1a00005 mov r0, r5
109ec0: e3a0100a mov r1, #10
109ec4: e28d2007 add r2, sp, #7
109ec8: ebfffde1 bl 109654 <opcd_rc632_reg_read>
if (err & RC632_ERR_FLAG_ACCESS_ERR)
109ecc: e5dd3007 ldrb r3, [sp, #7]
109ed0: e3130020 tst r3, #32
return -EPERM;
109ed4: 13e00000 mvnne r0, #0
return ret;
/* usleep(20000); */
ret = opcd_rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
if (err & RC632_ERR_FLAG_ACCESS_ERR)
109ed8: 1afffff4 bne 109eb0 <rc632_read_eeprom+0x58>
return -EPERM;
ret = opcd_rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &err);
109edc: e3a01004 mov r1, #4
109ee0: e28d2007 add r2, sp, #7
109ee4: e1a00005 mov r0, r5
109ee8: ebfffdd9 bl 109654 <opcd_rc632_reg_read>
109eec: e5dd0007 ldrb r0, [sp, #7]
109ef0: e1540000 cmp r4, r0
109ef4: 21a04000 movcs r4, r0
if (err < len)
len = err;
ret = opcd_rc632_fifo_read(handle, len, recvbuf);
109ef8: e1a01004 mov r1, r4
109efc: e1a00005 mov r0, r5
109f00: e1a02006 mov r2, r6
109f04: ebfffe23 bl 109798 <opcd_rc632_fifo_read>
if (ret < 0)
return ret;
return len;
109f08: e3500000 cmp r0, #0
109f0c: a1a00004 movge r0, r4
109f10: eaffffe6 b 109eb0 <rc632_read_eeprom+0x58>
00109f14 <rc632_get_serial>:
#define RC632_E2_PRODUCT_SERIAL 8
#define RC632_E2_RS_MAX_P 14
int rc632_get_serial(struct rfid_asic_handle *handle,
u_int32_t *serial)
{
109f14: e1a03001 mov r3, r1
return rc632_read_eeprom(handle, RC632_E2_PRODUCT_SERIAL,
109f18: e3a02004 mov r2, #4
109f1c: e3a01008 mov r1, #8
109f20: eaffffcc b 109e58 <rc632_read_eeprom>
00109f24 <_init_func>:
#include <os/main.h>
#define RAH NULL
void _init_func(void)
{
109f24: e92d4008 push {r3, lr}
rc632_init();
109f28: ebffff03 bl 109b3c <rc632_init>
}
109f2c: e8bd4008 pop {r3, lr}
109f30: e12fff1e bx lr
00109f34 <_main_dbgu>:
int _main_dbgu(char key)
{
109f34: e52de004 push {lr} ; (str lr, [sp, #-4]!)
unsigned char value;
switch (key) {
109f38: e2400034 sub r0, r0, #52 ; 0x34
{
rc632_init();
}
int _main_dbgu(char key)
{
109f3c: e24dd00c sub sp, sp, #12
unsigned char value;
switch (key) {
109f40: e350003c cmp r0, #60 ; 0x3c
109f44: 979ff100 ldrls pc, [pc, r0, lsl #2]
109f48: ea00003f b 10a04c <_main_dbgu+0x118>
109f4c: 0010a068 .word 0x0010a068
109f50: 0010a08c .word 0x0010a08c
109f54: 0010a0a0 .word 0x0010a0a0
109f58: 0010a0b4 .word 0x0010a0b4
109f5c: 0010a04c .word 0x0010a04c
109f60: 0010a04c .word 0x0010a04c
109f64: 0010a04c .word 0x0010a04c
109f68: 0010a04c .word 0x0010a04c
109f6c: 0010a04c .word 0x0010a04c
109f70: 0010a04c .word 0x0010a04c
109f74: 0010a04c .word 0x0010a04c
109f78: 0010a04c .word 0x0010a04c
109f7c: 0010a04c .word 0x0010a04c
109f80: 0010a04c .word 0x0010a04c
109f84: 0010a04c .word 0x0010a04c
109f88: 0010a04c .word 0x0010a04c
109f8c: 0010a04c .word 0x0010a04c
109f90: 0010a04c .word 0x0010a04c
109f94: 0010a04c .word 0x0010a04c
109f98: 0010a04c .word 0x0010a04c
109f9c: 0010a04c .word 0x0010a04c
109fa0: 0010a04c .word 0x0010a04c
109fa4: 0010a04c .word 0x0010a04c
109fa8: 0010a04c .word 0x0010a04c
109fac: 0010a04c .word 0x0010a04c
109fb0: 0010a04c .word 0x0010a04c
109fb4: 0010a04c .word 0x0010a04c
109fb8: 0010a04c .word 0x0010a04c
109fbc: 0010a040 .word 0x0010a040
109fc0: 0010a04c .word 0x0010a04c
109fc4: 0010a04c .word 0x0010a04c
109fc8: 0010a04c .word 0x0010a04c
109fcc: 0010a04c .word 0x0010a04c
109fd0: 0010a04c .word 0x0010a04c
109fd4: 0010a04c .word 0x0010a04c
109fd8: 0010a04c .word 0x0010a04c
109fdc: 0010a04c .word 0x0010a04c
109fe0: 0010a04c .word 0x0010a04c
109fe4: 0010a04c .word 0x0010a04c
109fe8: 0010a04c .word 0x0010a04c
109fec: 0010a04c .word 0x0010a04c
109ff0: 0010a04c .word 0x0010a04c
109ff4: 0010a04c .word 0x0010a04c
109ff8: 0010a04c .word 0x0010a04c
109ffc: 0010a04c .word 0x0010a04c
10a000: 0010a04c .word 0x0010a04c
10a004: 0010a04c .word 0x0010a04c
10a008: 0010a04c .word 0x0010a04c
10a00c: 0010a04c .word 0x0010a04c
10a010: 0010a04c .word 0x0010a04c
10a014: 0010a04c .word 0x0010a04c
10a018: 0010a04c .word 0x0010a04c
10a01c: 0010a04c .word 0x0010a04c
10a020: 0010a04c .word 0x0010a04c
10a024: 0010a04c .word 0x0010a04c
10a028: 0010a04c .word 0x0010a04c
10a02c: 0010a04c .word 0x0010a04c
10a030: 0010a04c .word 0x0010a04c
10a034: 0010a04c .word 0x0010a04c
10a038: 0010a04c .word 0x0010a04c
10a03c: 0010a05c .word 0x0010a05c
break;
case '7':
rc632_dump();
break;
case 'P':
rc632_power(1);
10a040: e3a00001 mov r0, #1
10a044: ebfffe94 bl 109a9c <rc632_power>
rc632_init();
10a048: ebfffebb bl 109b3c <rc632_init>
rc632_power(0);
break;
}
return -EINVAL;
}
10a04c: e3e00015 mvn r0, #21
10a050: e28dd00c add sp, sp, #12
10a054: e49de004 pop {lr} ; (ldr lr, [sp], #4)
10a058: e12fff1e bx lr
case 'P':
rc632_power(1);
rc632_init();
break;
case 'p':
rc632_power(0);
10a05c: e3a00000 mov r0, #0
10a060: ebfffe8d bl 109a9c <rc632_power>
break;
10a064: eafffff8 b 10a04c <_main_dbgu+0x118>
{
unsigned char value;
switch (key) {
case '4':
AT91F_DBGU_Printk("Testing RC632 : ");
10a068: e59f004c ldr r0, [pc, #76] ; 10a0bc <_main_dbgu+0x188>
10a06c: ebfff664 bl 107a04 <AT91F_DBGU_Printk>
if (rc632_test(RAH) == 0)
10a070: e3a00000 mov r0, #0
10a074: ebffff1f bl 109cf8 <rc632_test>
10a078: e3500000 cmp r0, #0
AT91F_DBGU_Printk("SUCCESS!\n\r");
10a07c: 059f003c ldreq r0, [pc, #60] ; 10a0c0 <_main_dbgu+0x18c>
else
AT91F_DBGU_Printk("ERROR!\n\r");
10a080: 159f003c ldrne r0, [pc, #60] ; 10a0c4 <_main_dbgu+0x190>
10a084: ebfff65e bl 107a04 <AT91F_DBGU_Printk>
10a088: eaffffef b 10a04c <_main_dbgu+0x118>
break;
case '5':
opcd_rc632_reg_read(RAH, RC632_REG_RX_WAIT, &value);
10a08c: e3a01021 mov r1, #33 ; 0x21
10a090: e28d2007 add r2, sp, #7
10a094: e3a00000 mov r0, #0
10a098: ebfffd6d bl 109654 <opcd_rc632_reg_read>
DEBUGPCR("Reading RC632 Reg RxWait: 0x%02xr", value);
break;
10a09c: eaffffea b 10a04c <_main_dbgu+0x118>
case '6':
DEBUGPCR("Writing RC632 Reg RxWait: 0x55");
opcd_rc632_reg_write(RAH, RC632_REG_RX_WAIT, 0x55);
10a0a0: e3a01021 mov r1, #33 ; 0x21
10a0a4: e3a02055 mov r2, #85 ; 0x55
10a0a8: e3a00000 mov r0, #0
10a0ac: ebfffd16 bl 10950c <opcd_rc632_reg_write>
break;
10a0b0: eaffffe5 b 10a04c <_main_dbgu+0x118>
case '7':
rc632_dump();
10a0b4: ebfffee4 bl 109c4c <rc632_dump>
break;
10a0b8: eaffffe3 b 10a04c <_main_dbgu+0x118>
10a0bc: 0010ae18 .word 0x0010ae18
10a0c0: 0010ae2c .word 0x0010ae2c
10a0c4: 0010ae38 .word 0x0010ae38
0010a0c8 <_main_func>:
return -EINVAL;
}
void _main_func(void)
{
10a0c8: e92d4010 push {r4, lr}
static int i;
if(i<4096)
10a0cc: e59f4034 ldr r4, [pc, #52] ; 10a108 <_main_func+0x40>
10a0d0: e5943000 ldr r3, [r4]
10a0d4: e3530a01 cmp r3, #4096 ; 0x1000
i++;
10a0d8: b2833001 addlt r3, r3, #1
10a0dc: b5843000 strlt r3, [r4]
void _main_func(void)
{
static int i;
if(i<4096)
10a0e0: ba000003 blt 10a0f4 <_main_func+0x2c>
i++;
else
{
led_toggle(1);
10a0e4: e3a00001 mov r0, #1
10a0e8: ebfff77d bl 107ee4 <led_toggle>
i=0;
10a0ec: e3a00000 mov r0, #0
10a0f0: e5840000 str r0, [r4]
}
/* first we try to get rid of pending to-be-sent stuff */
usb_out_process();
10a0f4: ebfff863 bl 108288 <usb_out_process>
/* next we deal with incoming reqyests from USB EP1 (OUT) */
usb_in_process();
10a0f8: ebfff869 bl 1082a4 <usb_in_process>
rc632_unthrottle();
10a0fc: ebfffe62 bl 109a8c <rc632_unthrottle>
}
10a100: e8bd4010 pop {r4, lr}
10a104: e12fff1e bx lr
10a108: 00203a10 .word 0x00203a10
0010a10c <memcpy>:
10a10c: e3520003 cmp r2, #3
10a110: e92d01f0 push {r4, r5, r6, r7, r8}
10a114: 8a000009 bhi 10a140 <memcpy+0x34>
10a118: e3520000 cmp r2, #0
10a11c: 0a000005 beq 10a138 <memcpy+0x2c>
10a120: e3a03000 mov r3, #0
10a124: e7d1c003 ldrb ip, [r1, r3]
10a128: e7c0c003 strb ip, [r0, r3]
10a12c: e2833001 add r3, r3, #1
10a130: e1530002 cmp r3, r2
10a134: 1afffffa bne 10a124 <memcpy+0x18>
10a138: e8bd01f0 pop {r4, r5, r6, r7, r8}
10a13c: e12fff1e bx lr
10a140: e1a03001 mov r3, r1
10a144: e0802002 add r2, r0, r2
10a148: e1a01000 mov r1, r0
10a14c: ea000002 b 10a15c <memcpy+0x50>
10a150: e5dcc000 ldrb ip, [ip]
10a154: e4c1c001 strb ip, [r1], #1
10a158: e2833001 add r3, r3, #1
10a15c: e3110003 tst r1, #3
10a160: e1a0c003 mov ip, r3
10a164: 1afffff9 bne 10a150 <memcpy+0x44>
10a168: e2134003 ands r4, r3, #3
10a16c: 0a000034 beq 10a244 <memcpy+0x138>
10a170: e2645000 rsb r5, r4, #0
10a174: e2647004 rsb r7, r4, #4
10a178: e7933005 ldr r3, [r3, r5]
10a17c: e1a04184 lsl r4, r4, #3
10a180: e1a07187 lsl r7, r7, #3
10a184: ea000005 b 10a1a0 <memcpy+0x94>
10a188: e28cc004 add ip, ip, #4
10a18c: e79c6005 ldr r6, [ip, r5]
10a190: e1a08716 lsl r8, r6, r7
10a194: e1883433 orr r3, r8, r3, lsr r4
10a198: e4813004 str r3, [r1], #4
10a19c: e1a03006 mov r3, r6
10a1a0: e0616002 rsb r6, r1, r2
10a1a4: e3560003 cmp r6, #3
10a1a8: cafffff6 bgt 10a188 <memcpy+0x7c>
10a1ac: ea000001 b 10a1b8 <memcpy+0xac>
10a1b0: e4dc3001 ldrb r3, [ip], #1
10a1b4: e4c13001 strb r3, [r1], #1
10a1b8: e1520001 cmp r2, r1
10a1bc: 8afffffb bhi 10a1b0 <memcpy+0xa4>
10a1c0: eaffffdc b 10a138 <memcpy+0x2c>
10a1c4: e513c040 ldr ip, [r3, #-64] ; 0xffffffc0
10a1c8: e501c040 str ip, [r1, #-64] ; 0xffffffc0
10a1cc: e513c03c ldr ip, [r3, #-60] ; 0xffffffc4
10a1d0: e501c03c str ip, [r1, #-60] ; 0xffffffc4
10a1d4: e513c038 ldr ip, [r3, #-56] ; 0xffffffc8
10a1d8: e501c038 str ip, [r1, #-56] ; 0xffffffc8
10a1dc: e513c034 ldr ip, [r3, #-52] ; 0xffffffcc
10a1e0: e501c034 str ip, [r1, #-52] ; 0xffffffcc
10a1e4: e513c030 ldr ip, [r3, #-48] ; 0xffffffd0
10a1e8: e501c030 str ip, [r1, #-48] ; 0xffffffd0
10a1ec: e513c02c ldr ip, [r3, #-44] ; 0xffffffd4
10a1f0: e501c02c str ip, [r1, #-44] ; 0xffffffd4
10a1f4: e513c028 ldr ip, [r3, #-40] ; 0xffffffd8
10a1f8: e501c028 str ip, [r1, #-40] ; 0xffffffd8
10a1fc: e513c024 ldr ip, [r3, #-36] ; 0xffffffdc
10a200: e501c024 str ip, [r1, #-36] ; 0xffffffdc
10a204: e513c020 ldr ip, [r3, #-32] ; 0xffffffe0
10a208: e501c020 str ip, [r1, #-32] ; 0xffffffe0
10a20c: e513c01c ldr ip, [r3, #-28] ; 0xffffffe4
10a210: e501c01c str ip, [r1, #-28] ; 0xffffffe4
10a214: e513c018 ldr ip, [r3, #-24] ; 0xffffffe8
10a218: e501c018 str ip, [r1, #-24] ; 0xffffffe8
10a21c: e513c014 ldr ip, [r3, #-20] ; 0xffffffec
10a220: e501c014 str ip, [r1, #-20] ; 0xffffffec
10a224: e513c010 ldr ip, [r3, #-16]
10a228: e501c010 str ip, [r1, #-16]
10a22c: e513c00c ldr ip, [r3, #-12]
10a230: e501c00c str ip, [r1, #-12]
10a234: e513c008 ldr ip, [r3, #-8]
10a238: e501c008 str ip, [r1, #-8]
10a23c: e513c004 ldr ip, [r3, #-4]
10a240: e501c004 str ip, [r1, #-4]
10a244: e061c002 rsb ip, r1, r2
10a248: e35c003f cmp ip, #63 ; 0x3f
10a24c: e1a04003 mov r4, r3
10a250: e1a0c001 mov ip, r1
10a254: e2833040 add r3, r3, #64 ; 0x40
10a258: e2811040 add r1, r1, #64 ; 0x40
10a25c: caffffd8 bgt 10a1c4 <memcpy+0xb8>
10a260: e1a03004 mov r3, r4
10a264: ea000007 b 10a288 <memcpy+0x17c>
10a268: e5131010 ldr r1, [r3, #-16]
10a26c: e50c1010 str r1, [ip, #-16]
10a270: e513100c ldr r1, [r3, #-12]
10a274: e50c100c str r1, [ip, #-12]
10a278: e5131008 ldr r1, [r3, #-8]
10a27c: e50c1008 str r1, [ip, #-8]
10a280: e5131004 ldr r1, [r3, #-4]
10a284: e50c1004 str r1, [ip, #-4]
10a288: e1a0100c mov r1, ip
10a28c: e06cc002 rsb ip, ip, r2
10a290: e35c000f cmp ip, #15
10a294: e1a04003 mov r4, r3
10a298: e281c010 add ip, r1, #16
10a29c: e2833010 add r3, r3, #16
10a2a0: cafffff0 bgt 10a268 <memcpy+0x15c>
10a2a4: e1a03004 mov r3, r4
10a2a8: ea000002 b 10a2b8 <memcpy+0x1ac>
10a2ac: e59cc000 ldr ip, [ip]
10a2b0: e481c004 str ip, [r1], #4
10a2b4: e2833004 add r3, r3, #4
10a2b8: e061c002 rsb ip, r1, r2
10a2bc: e35c0003 cmp ip, #3
10a2c0: e1a0c003 mov ip, r3
10a2c4: cafffff8 bgt 10a2ac <memcpy+0x1a0>
10a2c8: eaffffba b 10a1b8 <memcpy+0xac>
0010a2cc <memset>:
10a2cc: e3520003 cmp r2, #3
10a2d0: e52d4004 push {r4} ; (str r4, [sp, #-4]!)
10a2d4: e20110ff and r1, r1, #255 ; 0xff
10a2d8: 8a000008 bhi 10a300 <memset+0x34>
10a2dc: e3520000 cmp r2, #0
10a2e0: 0a000004 beq 10a2f8 <memset+0x2c>
10a2e4: e1a03000 mov r3, r0
10a2e8: e0822000 add r2, r2, r0
10a2ec: e4c31001 strb r1, [r3], #1
10a2f0: e1530002 cmp r3, r2
10a2f4: 1afffffc bne 10a2ec <memset+0x20>
10a2f8: e49d4004 pop {r4} ; (ldr r4, [sp], #4)
10a2fc: e12fff1e bx lr
10a300: e0802002 add r2, r0, r2
10a304: e1a0c000 mov ip, r0
10a308: ea000000 b 10a310 <memset+0x44>
10a30c: e4cc1001 strb r1, [ip], #1
10a310: e31c0003 tst ip, #3
10a314: 1afffffc bne 10a30c <memset+0x40>
10a318: e0813401 add r3, r1, r1, lsl #8
10a31c: e0833803 add r3, r3, r3, lsl #16
10a320: ea00000f b 10a364 <memset+0x98>
10a324: e50c3040 str r3, [ip, #-64] ; 0xffffffc0
10a328: e50c303c str r3, [ip, #-60] ; 0xffffffc4
10a32c: e50c3038 str r3, [ip, #-56] ; 0xffffffc8
10a330: e50c3034 str r3, [ip, #-52] ; 0xffffffcc
10a334: e50c3030 str r3, [ip, #-48] ; 0xffffffd0
10a338: e50c302c str r3, [ip, #-44] ; 0xffffffd4
10a33c: e50c3028 str r3, [ip, #-40] ; 0xffffffd8
10a340: e50c3024 str r3, [ip, #-36] ; 0xffffffdc
10a344: e50c3020 str r3, [ip, #-32] ; 0xffffffe0
10a348: e50c301c str r3, [ip, #-28] ; 0xffffffe4
10a34c: e50c3018 str r3, [ip, #-24] ; 0xffffffe8
10a350: e50c3014 str r3, [ip, #-20] ; 0xffffffec
10a354: e50c3010 str r3, [ip, #-16]
10a358: e50c300c str r3, [ip, #-12]
10a35c: e50c3008 str r3, [ip, #-8]
10a360: e50c3004 str r3, [ip, #-4]
10a364: e06c4002 rsb r4, ip, r2
10a368: e354003f cmp r4, #63 ; 0x3f
10a36c: e1a0400c mov r4, ip
10a370: e28cc040 add ip, ip, #64 ; 0x40
10a374: caffffea bgt 10a324 <memset+0x58>
10a378: e1a0c004 mov ip, r4
10a37c: ea000003 b 10a390 <memset+0xc4>
10a380: e50c3010 str r3, [ip, #-16]
10a384: e50c300c str r3, [ip, #-12]
10a388: e50c3008 str r3, [ip, #-8]
10a38c: e50c3004 str r3, [ip, #-4]
10a390: e06c4002 rsb r4, ip, r2
10a394: e354000f cmp r4, #15
10a398: e1a0400c mov r4, ip
10a39c: e28cc010 add ip, ip, #16
10a3a0: cafffff6 bgt 10a380 <memset+0xb4>
10a3a4: ea000000 b 10a3ac <memset+0xe0>
10a3a8: e4843004 str r3, [r4], #4
10a3ac: e064c002 rsb ip, r4, r2
10a3b0: e35c0003 cmp ip, #3
10a3b4: cafffffb bgt 10a3a8 <memset+0xdc>
10a3b8: ea000000 b 10a3c0 <memset+0xf4>
10a3bc: e4c41001 strb r1, [r4], #1
10a3c0: e1540002 cmp r4, r2
10a3c4: 3afffffc bcc 10a3bc <memset+0xf0>
10a3c8: eaffffca b 10a2f8 <memset+0x2c>
0010a3cc <strlen>:
10a3cc: e3c01003 bic r1, r0, #3
10a3d0: e2100003 ands r0, r0, #3
10a3d4: e2600000 rsb r0, r0, #0
10a3d8: e4913004 ldr r3, [r1], #4
10a3dc: e280c004 add ip, r0, #4
10a3e0: e1a0c18c lsl ip, ip, #3
10a3e4: e3e02000 mvn r2, #0
10a3e8: 11833c32 orrne r3, r3, r2, lsr ip
10a3ec: e3a0c001 mov ip, #1
10a3f0: e18cc40c orr ip, ip, ip, lsl #8
10a3f4: e18cc80c orr ip, ip, ip, lsl #16
10a3f8: e043200c sub r2, r3, ip
10a3fc: e1c22003 bic r2, r2, r3
10a400: e012238c ands r2, r2, ip, lsl #7
10a404: 04913004 ldreq r3, [r1], #4
10a408: 02800004 addeq r0, r0, #4
10a40c: 0afffff9 beq 10a3f8 <strlen+0x2c>
10a410: e31300ff tst r3, #255 ; 0xff
10a414: 12800001 addne r0, r0, #1
10a418: 13130cff tstne r3, #65280 ; 0xff00
10a41c: 12800001 addne r0, r0, #1
10a420: 131308ff tstne r3, #16711680 ; 0xff0000
10a424: 12800001 addne r0, r0, #1
10a428: e12fff1e bx lr
0010a42c <__aeabi_uidiv>:
10a42c: e2512001 subs r2, r1, #1
10a430: 012fff1e bxeq lr
10a434: 3a000036 bcc 10a514 <__aeabi_uidiv+0xe8>
10a438: e1500001 cmp r0, r1
10a43c: 9a000022 bls 10a4cc <__aeabi_uidiv+0xa0>
10a440: e1110002 tst r1, r2
10a444: 0a000023 beq 10a4d8 <__aeabi_uidiv+0xac>
10a448: e311020e tst r1, #-536870912 ; 0xe0000000
10a44c: 01a01181 lsleq r1, r1, #3
10a450: 03a03008 moveq r3, #8
10a454: 13a03001 movne r3, #1
10a458: e3510201 cmp r1, #268435456 ; 0x10000000
10a45c: 31510000 cmpcc r1, r0
10a460: 31a01201 lslcc r1, r1, #4
10a464: 31a03203 lslcc r3, r3, #4
10a468: 3afffffa bcc 10a458 <__aeabi_uidiv+0x2c>
10a46c: e3510102 cmp r1, #-2147483648 ; 0x80000000
10a470: 31510000 cmpcc r1, r0
10a474: 31a01081 lslcc r1, r1, #1
10a478: 31a03083 lslcc r3, r3, #1
10a47c: 3afffffa bcc 10a46c <__aeabi_uidiv+0x40>
10a480: e3a02000 mov r2, #0
10a484: e1500001 cmp r0, r1
10a488: 20400001 subcs r0, r0, r1
10a48c: 21822003 orrcs r2, r2, r3
10a490: e15000a1 cmp r0, r1, lsr #1
10a494: 204000a1 subcs r0, r0, r1, lsr #1
10a498: 218220a3 orrcs r2, r2, r3, lsr #1
10a49c: e1500121 cmp r0, r1, lsr #2
10a4a0: 20400121 subcs r0, r0, r1, lsr #2
10a4a4: 21822123 orrcs r2, r2, r3, lsr #2
10a4a8: e15001a1 cmp r0, r1, lsr #3
10a4ac: 204001a1 subcs r0, r0, r1, lsr #3
10a4b0: 218221a3 orrcs r2, r2, r3, lsr #3
10a4b4: e3500000 cmp r0, #0
10a4b8: 11b03223 lsrsne r3, r3, #4
10a4bc: 11a01221 lsrne r1, r1, #4
10a4c0: 1affffef bne 10a484 <__aeabi_uidiv+0x58>
10a4c4: e1a00002 mov r0, r2
10a4c8: e12fff1e bx lr
10a4cc: 03a00001 moveq r0, #1
10a4d0: 13a00000 movne r0, #0
10a4d4: e12fff1e bx lr
10a4d8: e3510801 cmp r1, #65536 ; 0x10000
10a4dc: 21a01821 lsrcs r1, r1, #16
10a4e0: 23a02010 movcs r2, #16
10a4e4: 33a02000 movcc r2, #0
10a4e8: e3510c01 cmp r1, #256 ; 0x100
10a4ec: 21a01421 lsrcs r1, r1, #8
10a4f0: 22822008 addcs r2, r2, #8
10a4f4: e3510010 cmp r1, #16
10a4f8: 21a01221 lsrcs r1, r1, #4
10a4fc: 22822004 addcs r2, r2, #4
10a500: e3510004 cmp r1, #4
10a504: 82822003 addhi r2, r2, #3
10a508: 908220a1 addls r2, r2, r1, lsr #1
10a50c: e1a00230 lsr r0, r0, r2
10a510: e12fff1e bx lr
10a514: e3500000 cmp r0, #0
10a518: 13e00000 mvnne r0, #0
10a51c: ea000007 b 10a540 <__aeabi_idiv0>
0010a520 <__aeabi_uidivmod>:
10a520: e3510000 cmp r1, #0
10a524: 0afffffa beq 10a514 <__aeabi_uidiv+0xe8>
10a528: e92d4003 push {r0, r1, lr}
10a52c: ebffffbe bl 10a42c <__aeabi_uidiv>
10a530: e8bd4006 pop {r1, r2, lr}
10a534: e0030092 mul r3, r2, r0
10a538: e0411003 sub r1, r1, r3
10a53c: e12fff1e bx lr
0010a540 <__aeabi_idiv0>:
10a540: e12fff1e bx lr
0010a544 <__ffssi2>:
10a544: e3500000 cmp r0, #0
10a548: e92d4008 push {r3, lr}
10a54c: 0a000003 beq 10a560 <__ffssi2+0x1c>
10a550: e2603000 rsb r3, r0, #0
10a554: e0030000 and r0, r3, r0
10a558: eb000002 bl 10a568 <__clzsi2>
10a55c: e2600020 rsb r0, r0, #32
10a560: e8bd4008 pop {r3, lr}
10a564: e12fff1e bx lr
0010a568 <__clzsi2>:
10a568: e3a0101c mov r1, #28
10a56c: e3500801 cmp r0, #65536 ; 0x10000
10a570: 21a00820 lsrcs r0, r0, #16
10a574: 22411010 subcs r1, r1, #16
10a578: e3500c01 cmp r0, #256 ; 0x100
10a57c: 21a00420 lsrcs r0, r0, #8
10a580: 22411008 subcs r1, r1, #8
10a584: e3500010 cmp r0, #16
10a588: 21a00220 lsrcs r0, r0, #4
10a58c: 22411004 subcs r1, r1, #4
10a590: e28f2008 add r2, pc, #8
10a594: e7d20000 ldrb r0, [r2, r0]
10a598: e0800001 add r0, r0, r1
10a59c: e12fff1e bx lr
10a5a0: 02020304 .word 0x02020304
10a5a4: 01010101 .word 0x01010101
...
0010a5b0 <large_digits.4362>:
10a5b0: 33323130 37363534 42413938 46454443 0123456789ABCDEF
10a5c0: 4a494847 4e4d4c4b 5251504f 56555453 GHIJKLMNOPQRSTUV
10a5d0: 5a595857 00000000 WXYZ....
0010a5d8 <small_digits.4361>:
10a5d8: 33323130 37363534 62613938 66656463 0123456789abcdef
10a5e8: 6a696867 6e6d6c6b 7271706f 76757473 ghijklmnopqrstuv
10a5f8: 7a797877 00000000 wxyz....
0010a600 <epstate>:
10a600: 000000ff 00000000 000000ff 00000000 ................
10a610: 00000011 00000010 00000013 00000012 ................
0010a620 <dev_descriptor>:
10a620: 01000112 08ffffff 076b16c0 00000030 ..........k.0...
10a630: 00000100 ....
0010a634 <cfg_descriptor>:
10a634: 00390209 80000103 000409fa 00ff0300 ..9.............
10a644: 050700ff 00400201 82050700 00004002 ......@......@..
10a654: 03830507 09ff0040 00000104 000101fe ....@...........
10a664: 00020409 0101fe00 00000000 ............
0010a670 <__FUNCTION__.6158>:
10a670: 5f706475 6e65706f 00000000 646e6573 udp_open....send
10a680: 7461645f 25203a61 79622075 20736574 _data: %u bytes
10a690: 00000000 6f666966 6c69665f 0000206c ....fifo_fill ..
10a6a0: 74696177 6378745f 5f706d6f 61656c63 wait_txcomp_clea
10a6b0: 00002072 5f746573 6b707874 79647274 r ..set_txpktrdy
10a6c0: 00000020 74696177 6378745f 20706d6f ...wait_txcomp
10a6d0: 00000000 706f7473 20646570 73207962 ....stopped by s
10a6e0: 75746174 756f2073 00002074 61656c63 tatus out ..clea
10a6f0: 78745f72 706d6f63 00000020 656e6f64 r_txcomp ...done
10a700: 00000020 3d525343 30257830 00207834 ...CSR=0x%04x .
10a710: 5f4b4341 4c415453 4e45534c 00002054 ACK_STALLSENT ..
10a720: 5f4b4341 4b4e4142 00002030 73206f6e ACK_BANK0 ..no s
10a730: 70757465 63617020 2074656b 00000000 etup packet ....
10a740: 3d6e656c 00206425 74706d65 61702079 len=%d .empty pa
10a750: 74656b63 00000020 65526d62 73657571 cket ...bmReques
10a760: 70795474 78303d65 20783225 00000000 tType=0x%2x ....
10a770: 41544144 3d4e495f 00002031 5f756664 DATA_IN=1 ..dfu_
10a780: 74617473 203d2065 00207525 5f544547 state = %u .GET_
10a790: 43534544 54504952 7728524f 756c6156 DESCRIPTOR(wValu
10a7a0: 78303d65 78343025 4977202c 7865646e e=0x%04x, wIndex
10a7b0: 2578303d 29783430 00000020 5f544553 =0x%04x) ...SET_
10a7c0: 52444441 20535345 00000000 5f544553 ADDRESS ....SET_
10a7d0: 464e4f43 00204749 554c4156 303d3d45 CONFIG .VALUE==0
10a7e0: 00000020 554c4156 303d2145 00000020 ...VALUE!=0 ...
10a7f0: 5f544547 464e4f43 00204749 5f544547 GET_CONFIG .GET_
10a800: 45544e49 43414652 00002045 5f544547 INTERFACE ..GET_
10a810: 54415453 5a5f5355 204f5245 00000000 STATUS_ZERO ....
10a820: 5f544547 54415453 495f5355 5245544e GET_STATUS_INTER
10a830: 45434146 00000020 5f544547 54415453 FACE ...GET_STAT
10a840: 455f5355 4f50444e 28544e49 64695045 US_ENDPOINT(EPid
10a850: 75253d78 00002029 5f544553 54414546 x=%u) ..SET_FEAT
10a860: 5f455255 4f52455a 00000020 5f544553 URE_ZERO ...SET_
10a870: 54414546 5f455255 45544e49 43414652 FEATURE_INTERFAC
10a880: 00002045 5f544553 54414546 5f455255 E ..SET_FEATURE_
10a890: 50444e45 544e494f 00000020 41454c43 ENDPOINT ...CLEA
10a8a0: 45465f52 52555441 455a5f45 00204f52 R_FEATURE_ZERO .
10a8b0: 41454c43 45465f52 52555441 4e495f45 CLEAR_FEATURE_IN
10a8c0: 46524554 20454341 00000000 41454c43 TERFACE ....CLEA
10a8d0: 45465f52 52555441 4e455f45 494f5044 R_FEATURE_ENDPOI
10a8e0: 4528544e 78646950 2975253d 00000020 NT(EPidx=%u) ...
10a8f0: 20544553 45544e49 43414652 00002045 SET INTERFACE ..
10a900: 41464544 28544c55 3d716572 30257830 DEFAULT(req=0x%0
10a910: 202c7832 65707974 2578303d 29783230 2x, type=0x%02x)
10a920: 00000020 4c415453 2021214c 00000000 ...STALL!! ....
10a930: 525f4f4e 5f585443 49415641 0020214c NO_RCTX_AVAIL! .
10a940: 25287325 203a2964 65746e65 676e6972 %s(%d): entering
10a950: 00000a0d 50415257 52554420 20474e49 ....WRAP DURING
10a960: 45505041 0a0d444e 00000000 61656c43 APPEND......Clea
10a970: 75502072 75206c6c 000d0a70 20746553 r Pull up...Set
10a980: 6c6c7550 0a707520 0000000d 67676f54 Pull up.....Togg
10a990: 676e696c 44454c20 0d0a3120 00000000 ling LED 1......
10a9a0: 67676f54 676e696c 44454c20 0d0a3220 Toggling LED 2..
10a9b0: 00000000 65736552 6e697474 41532067 ....Resetting SA
10a9c0: 0d0a374d 00000000 32302520 00000078 M7...... %02x...
10a9d0: 20294328 36303032 20796220 61726148 (C) 2006 by Hara
10a9e0: 5720646c 65746c65 77683c20 65746c65 ld Welte <hwelte
10a9f0: 776d6840 6e6f632d 746c7573 2e676e69 @hmw-consulting.
10aa00: 0a3e6564 6968540d 6f732073 61777466 de>..This softwa
10aa10: 69206572 52462073 53204545 5754464f re is FREE SOFTW
10aa20: 20455241 6563696c 6465736e 646e7520 ARE licensed und
10aa30: 47207265 4720554e 0d0a4c50 00000000 er GNU GPL......
10aa40: 73726556 206e6f69 2d353934 6c636e75 Version 495-uncl
10aa50: 206e6165 706d6f63 64656c69 31303220 ean compiled 201
10aa60: 31353031 36312d30 33303630 20796220 10510-160603 by
10aa70: 7a74656e 756c4240 69466262 0d0a6873 netz@BlubbFish..
10aa80: 00000d0a 45440d0a 20475542 65746e49 ......DEBUG Inte
10aa90: 63616672 0d0a3a65 53202930 50207465 rface:..0) Set P
10aaa0: 2d6c6c75 31207075 6c432029 20726165 ull-up 1) Clear
10aab0: 6c6c7550 2070752d 54202932 6c67676f Pull-up 2) Toggl
10aac0: 454c2065 33203144 6f542029 656c6767 e LED1 3) Toggle
10aad0: 44454c20 390a0d32 65522029 0a746573 LED2..9) Reset.
10aae0: 0000000d 204e454c 5942203e 5f534554 ....LEN > BYTES_
10aaf0: 5446454c 00000a0d LEFT....
0010aaf8 <ledport>:
10aaf8: 00000000 02000000 04000000 ............
0010ab04 <__FUNCTION__.6256>:
10ab04: 6e69616d 00000000 main....
0010ab0c <opcd_version>:
10ab0c: 2d353934 6c636e75 006e6165 00000000 495-unclean.....
10ab1c: 7a74656e 756c4240 69466262 00006873 netz@BlubbFish..
10ab2c: 31313032 30313530 3036312d 00333036 20110510-160603.
10ab3c: 25287325 203a2964 65746e65 676e6972 %s(%d): entering
10ab4c: 69616d20 6928206e 29656c64 6f6f6c20 main (idle) loo
10ab5c: 000a0d70 68206f6e 6c646e61 66207265 p...no handler f
10ab6c: 7420726f 20736968 73616c63 0a0d2073 or this class ..
10ab7c: 00000000 54425355 5f545345 00204e49 ....USBTEST_IN .
10ab8c: 52204f4e 20585443 00000000 5f424354 NO RCTX ....TCB_
10ab9c: 3d524d42 30257830 00207838 5f304354 BMR=0x%08x .TC0_
10abac: 303d5643 38302578 00002078 5f304354 CV=0x%08x ..TC0_
10abbc: 3d524d43 30257830 00207838 5f304354 CMR=0x%08x .TC0_
10abcc: 303d5253 38302578 000a0d78 5f304354 SR=0x%08x...TC0_
10abdc: 303d4152 34302578 54202c78 525f3043 RA=0x%04x, TC0_R
10abec: 78303d42 78343025 4354202c 43525f30 B=0x%04x, TC0_RC
10abfc: 2578303d 0d783430 0000000a =0x%04x.....
0010ac08 <__FUNCTION__.6063>:
10ac08: 5f6d7770 71657266 7465735f 00000000 pwm_freq_set....
0010ac18 <__FUNCTION__.6075>:
10ac18: 5f6d7770 79747564 7465735f 7265705f pwm_duty_set_per
10ac28: 746e6563 00000000 25287325 203a2964 cent....%s(%d):
10ac38: 6b6c636d 2c75253d 65726620 75253d71 mclk=%u, freq=%u
10ac48: 766f202c 6c617265 69645f6c 75253d76 , overall_div=%u
10ac58: 00000a0d 25287325 203a2964 65727063 ....%s(%d): cpre
10ac68: 2c75253d 72706320 75253d64 00000a0d =%u, cprd=%u....
10ac78: 25287325 203a2964 74697257 20676e69 %s(%d): Writing
10ac88: 74207525 7055206f 65746164 67657220 %u to Update reg
10ac98: 65747369 0a0d0a72 00000000 ister.......
0010aca4 <__FUNCTION__.5785>:
10aca4: 69705f5f 72695f6f 65645f71 0078756d __pio_irq_demux.
0010acb4 <__FUNCTION__.5807>:
10acb4: 5f6f6970 5f717269 69676572 72657473 pio_irq_register
10acc4: 00000000 25287325 203a2964 5f4f4950 ....%s(%d): PIO_
10acd4: 5f525349 54415453 3d205355 25783020 ISR_STATUS = 0x%
10ace4: 0d783830 0000000a 25287325 203a2964 08x.....%s(%d):
10acf4: 69676572 72657473 20676e69 646e6168 registering hand
10ad04: 2072656c 66207025 5020726f 20414f49 ler %p for PIOA
10ad14: 0a0d7525 00000000 %u......
0010ad1c <__FUNCTION__.5603>:
10ad1c: 5f746477 00717269 25287325 203a2964 wdt_irq.%s(%d):
10ad2c: 3d3d3d3d 3d3d3d3d 3d3d3d3d 3d3d3d3d ================
10ad3c: 4157203e 44484354 4520474f 52495058 > WATCHDOG EXPIR
10ad4c: 21204445 21212121 00000a0d ED !!!!!....
0010ad58 <__FUNCTION__.4079>:
10ad58: 6e696c62 646f636b 62635f65 00000000 blinkcode_cb....
0010ad68 <__FUNCTION__.4091>:
10ad68: 6e696c62 646f636b 65735f65 00000074 blinkcode_set...
10ad78: 25287325 203a2964 66696a28 73656966 %s(%d): (jiffies
10ad88: 756c253d 6164202c 253d6174 73202c70 =%lu, data=%p, s
10ad98: 65746174 2975253d 00000a0d 25287325 tate=%u)....%s(%
10ada8: 203a2964 66696a28 73656966 756c253d d): (jiffies=%lu
10adb8: 656c202c 75253d64 756e202c 75253d6d , led=%u, num=%u
10adc8: 000a0d29 73616c66 61705f68 30286567 )...flash_page(0
10add8: 3d782578 20297525 00000000 6f6c6e75 x%x=%u) ....unlo
10ade8: 6e696b63 00002067 5f544f4e 53414c46 cking ..NOT_FLAS
10adf8: 474e4948 00000020 66726570 696d726f HING ...performi
10ae08: 7320676e 74726174 6f72705f 00002067 ng start_prog ..
10ae18: 74736554 20676e69 33364352 203a2032 Testing RC632 :
10ae28: 00000000 43435553 21535345 00000d0a ....SUCCESS!....
10ae38: 4f525245 0d0a2152 00000000 ERROR!......
Disassembly of section .data:
00200028 <_data>:
r12 AT91C_BASE_TC0
r13 stack
r14 lr
*/
ldr r8, [r10, #PIOA_ISR]
200028: e59a804c ldr r8, [sl, #76] ; 0x4c
tst r8, #PIO_DATA /* check for PIO_DATA change */
20002c: e3180302 tst r8, #134217728 ; 0x8000000
ldrne r11, [r10, #PIOA_PDSR]
200030: 159ab03c ldrne fp, [sl, #60] ; 0x3c
tstne r11, #PIO_DATA /* check for PIO_DATA == 1 */
200034: 131b0302 tstne fp, #134217728 ; 0x8000000
strne r9, [r12, #TC_CCR] /* software trigger */
200038: 158c9000 strne r9, [ip]
#ifdef LED_TRIGGER
movne r11, #PIO_LED1
20003c: 13a0b402 movne fp, #33554432 ; 0x2000000
strne r11, [r10, #PIOA_CODR] /* enable LED */
200040: 158ab034 strne fp, [sl, #52] ; 0x34
#endif
#if 1
movne r11, #PIO_DATA
200044: 13a0b302 movne fp, #134217728 ; 0x8000000
strne r11, [r10, #PIOA_IDR] /* disable further PIO_DATA FIQ */
200048: 158ab044 strne fp, [sl, #68] ; 0x44
#endif
/*- Mark the End of Interrupt on the AIC */
ldr r11, =AT91C_BASE_AIC
20004c: e59fb024 ldr fp, [pc, #36] ; 200078 <_data+0x50>
str r11, [r11, #AIC_EOICR]
200050: e58bb130 str fp, [fp, #304] ; 0x130
#ifdef LED_TRIGGER
mov r11, #PIO_LED1
200054: e3a0b402 mov fp, #33554432 ; 0x2000000
str r11, [r10, #PIOA_SODR] /* disable LED */
200058: e58ab030 str fp, [sl, #48] ; 0x30
#endif
#ifdef CALL_PIO_IRQ_DEMUX
/* push r0, r1-r3, r12, r14 onto FIQ stack */
stmfd sp!, { r0-r3, r12, lr}
20005c: e92d500f push {r0, r1, r2, r3, ip, lr}
mov r0, r8
200060: e1a00008 mov r0, r8
/* enable interrupts while handling demux */
/* msr CPSR_c, #F_BIT | ARM_MODE_SVC */
/* Call C function, give PIOA_ISR as argument */
ldr r11, =__pio_irq_demux
200064: e59fb010 ldr fp, [pc, #16] ; 20007c <_data+0x54>
mov r14, pc
200068: e1a0e00f mov lr, pc
bx r11
20006c: e12fff1b bx fp
/* msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ */
ldmia sp!, { r0-r3, r12, lr }
200070: e8bd500f pop {r0, r1, r2, r3, ip, lr}
#endif
/*- Restore the Program Counter using the LR_fiq directly in the PC */
subs pc, lr, #4
200074: e25ef004 subs pc, lr, #4
200078: fffff000 .word 0xfffff000
20007c: 002000e8 .word 0x002000e8
00200080 <req_ctx_find_get>:
static struct req_ctx req_ctx[NUM_REQ_CTX];
struct req_ctx __ramfunc *req_ctx_find_get(int large,
unsigned long old_state,
unsigned long new_state)
{
200080: e92d0030 push {r4, r5}
unsigned long flags;
u_int8_t i;
if (large)
i = NUM_RCTX_SMALL;
200084: e3500000 cmp r0, #0
200088: e59f3054 ldr r3, [pc, #84] ; 2000e4 <req_ctx_find_get+0x64>
20008c: 13a00008 movne r0, #8
200090: 03a00000 moveq r0, #0
else
i = 0;
for (; i < NUM_REQ_CTX; i++) {
local_irq_save(flags);
200094: e10f4000 mrs r4, CPSR
200098: e384c080 orr ip, r4, #128 ; 0x80
20009c: e121f00c msr CPSR_c, ip
if (req_ctx[i].state == old_state) {
2000a0: e080c080 add ip, r0, r0, lsl #1
2000a4: e793510c ldr r5, [r3, ip, lsl #2]
2000a8: e1550001 cmp r5, r1
2000ac: e083c10c add ip, r3, ip, lsl #2
2000b0: 0a000007 beq 2000d4 <req_ctx_find_get+0x54>
req_ctx[i].state = new_state;
local_irq_restore(flags);
return &req_ctx[i];
}
local_irq_restore(flags);
2000b4: e121f004 msr CPSR_c, r4
if (large)
i = NUM_RCTX_SMALL;
else
i = 0;
for (; i < NUM_REQ_CTX; i++) {
2000b8: e2800001 add r0, r0, #1
2000bc: e20000ff and r0, r0, #255 ; 0xff
2000c0: e350000b cmp r0, #11
2000c4: 9afffff2 bls 200094 <req_ctx_find_get+0x14>
return &req_ctx[i];
}
local_irq_restore(flags);
}
return NULL;
2000c8: e3a00000 mov r0, #0
}
2000cc: e8bd0030 pop {r4, r5}
2000d0: e12fff1e bx lr
i = 0;
for (; i < NUM_REQ_CTX; i++) {
local_irq_save(flags);
if (req_ctx[i].state == old_state) {
req_ctx[i].state = new_state;
2000d4: e58c2000 str r2, [ip]
local_irq_restore(flags);
2000d8: e121f004 msr CPSR_c, r4
return &req_ctx[i];
2000dc: e1a0000c mov r0, ip
2000e0: eafffff9 b 2000cc <req_ctx_find_get+0x4c>
2000e4: 00201554 .word 0x00201554
002000e8 <__pio_irq_demux>:
static struct pioirq_state pirqs;
/* low-level handler, used by Cstartup_app.S PIOA fast forcing and
* by regular interrupt handler below */
void __ramfunc __pio_irq_demux(u_int32_t pio)
{
2000e8: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
2000ec: e1a04000 mov r4, r0
u_int8_t send_usb = 0;
int i;
DEBUGPCRF("PIO_ISR_STATUS = 0x%08x", pio);
2000f0: e59f1104 ldr r1, [pc, #260] ; 2001fc <__pio_irq_demux+0x114>
2000f4: e59f0104 ldr r0, [pc, #260] ; 200200 <__pio_irq_demux+0x118>
2000f8: e3a0202b mov r2, #43 ; 0x2b
2000fc: e1a03004 mov r3, r4
200100: ebfc1f45 bl 107e1c <debugp>
200104: e59f60f8 ldr r6, [pc, #248] ; 200204 <__pio_irq_demux+0x11c>
for (i = 0; i < NR_PIO; i++) {
200108: e3a00000 mov r0, #0
/* low-level handler, used by Cstartup_app.S PIOA fast forcing and
* by regular interrupt handler below */
void __ramfunc __pio_irq_demux(u_int32_t pio)
{
u_int8_t send_usb = 0;
20010c: e1a0a000 mov sl, r0
int i;
DEBUGPCRF("PIO_ISR_STATUS = 0x%08x", pio);
for (i = 0; i < NR_PIO; i++) {
if (pio & (1 << i) && pirqs.handlers[i])
200110: e3a09001 mov r9, #1
200114: e1a08019 lsl r8, r9, r0
u_int8_t send_usb = 0;
int i;
DEBUGPCRF("PIO_ISR_STATUS = 0x%08x", pio);
for (i = 0; i < NR_PIO; i++) {
200118: e2805001 add r5, r0, #1
if (pio & (1 << i) && pirqs.handlers[i])
20011c: e1180004 tst r8, r4
200120: e1a07519 lsl r7, r9, r5
200124: 0a000003 beq 200138 <__pio_irq_demux+0x50>
200128: e7963100 ldr r3, [r6, r0, lsl #2]
20012c: e3530000 cmp r3, #0
pirqs.handlers[i](i);
200130: 11a0e00f movne lr, pc
200134: 112fff13 bxne r3
if (pirqs.usbmask & (1 << i))
200138: e5963080 ldr r3, [r6, #128] ; 0x80
send_usb = 1;
20013c: e1180003 tst r8, r3
200140: 13a0a001 movne sl, #1
int i;
DEBUGPCRF("PIO_ISR_STATUS = 0x%08x", pio);
for (i = 0; i < NR_PIO; i++) {
if (pio & (1 << i) && pirqs.handlers[i])
200144: e1170004 tst r7, r4
200148: 0a000004 beq 200160 <__pio_irq_demux+0x78>
20014c: e7963105 ldr r3, [r6, r5, lsl #2]
200150: e3530000 cmp r3, #0
pirqs.handlers[i](i);
200154: e1a00005 mov r0, r5
200158: 11a0e00f movne lr, pc
20015c: 112fff13 bxne r3
if (pirqs.usbmask & (1 << i))
200160: e596e080 ldr lr, [r6, #128] ; 0x80
u_int8_t send_usb = 0;
int i;
DEBUGPCRF("PIO_ISR_STATUS = 0x%08x", pio);
for (i = 0; i < NR_PIO; i++) {
200164: e2850001 add r0, r5, #1
if (pio & (1 << i) && pirqs.handlers[i])
pirqs.handlers[i](i);
if (pirqs.usbmask & (1 << i))
send_usb = 1;
200168: e117000e tst r7, lr
20016c: 13a0a001 movne sl, #1
u_int8_t send_usb = 0;
int i;
DEBUGPCRF("PIO_ISR_STATUS = 0x%08x", pio);
for (i = 0; i < NR_PIO; i++) {
200170: e3500020 cmp r0, #32
200174: 1affffe6 bne 200114 <__pio_irq_demux+0x2c>
pirqs.handlers[i](i);
if (pirqs.usbmask & (1 << i))
send_usb = 1;
}
if (send_usb && !pirqs.usb_throttled) {
200178: e35a0000 cmp sl, #0
20017c: 0a000002 beq 20018c <__pio_irq_demux+0xa4>
200180: e5964084 ldr r4, [r6, #132] ; 0x84
200184: e3540000 cmp r4, #0
200188: 0a000004 beq 2001a0 <__pio_irq_demux+0xb8>
static inline void AT91F_AIC_ClearIt (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id) // \arg interrupt number to initialize
{
//* Clear the interrupt on the Interrupt Controller ( if one is pending )
pAic->AIC_ICCR = (0x1 << irq_id);
20018c: e3a02004 mov r2, #4
200190: e3e03c0f mvn r3, #3840 ; 0xf00
200194: e5832029 str r2, [r3, #41] ; 0x29
req_ctx_set_state(irq_rctx, RCTX_STATE_UDP_EP3_PENDING);
}
}
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_PIOA);
}
200198: e8bd47f0 pop {r4, r5, r6, r7, r8, r9, sl, lr}
20019c: e12fff1e bx lr
send_usb = 1;
}
if (send_usb && !pirqs.usb_throttled) {
struct req_ctx *irq_rctx;
irq_rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
2001a0: e1a00004 mov r0, r4
2001a4: e3a010fe mov r1, #254 ; 0xfe
2001a8: e3a02080 mov r2, #128 ; 0x80
2001ac: e59fc054 ldr ip, [pc, #84] ; 200208 <__pio_irq_demux+0x120>
2001b0: e1a0e00f mov lr, pc
2001b4: e12fff1c bx ip
RCTX_STATE_PIOIRQ_BUSY);
if (!irq_rctx) {
2001b8: e2503000 subs r3, r0, #0
2001bc: 0a00000a beq 2001ec <__pio_irq_demux+0x104>
* non-usb listeners */
pirqs.usb_throttled = 1;
} else {
struct openpcd_hdr *opcdh;
u_int32_t *regmask;
opcdh = (struct openpcd_hdr *) irq_rctx->data;
2001c0: e593c008 ldr ip, [r3, #8]
regmask = (u_int32_t *) (irq_rctx->data + sizeof(*opcdh));
opcdh->cmd = OPENPCD_CMD_PIO_IRQ;
2001c4: e3e0100c mvn r1, #12
opcdh->reg = 0x00;
opcdh->flags = 0x00;
opcdh->val = 0x00;
irq_rctx->tot_len = sizeof(*opcdh) + sizeof(u_int32_t);
2001c8: e3a0e008 mov lr, #8
} else {
struct openpcd_hdr *opcdh;
u_int32_t *regmask;
opcdh = (struct openpcd_hdr *) irq_rctx->data;
regmask = (u_int32_t *) (irq_rctx->data + sizeof(*opcdh));
opcdh->cmd = OPENPCD_CMD_PIO_IRQ;
2001cc: e5cc1000 strb r1, [ip]
opcdh->reg = 0x00;
2001d0: e5cc4002 strb r4, [ip, #2]
opcdh->flags = 0x00;
2001d4: e5cc4001 strb r4, [ip, #1]
opcdh->val = 0x00;
2001d8: e5cc4003 strb r4, [ip, #3]
irq_rctx->tot_len = sizeof(*opcdh) + sizeof(u_int32_t);
req_ctx_set_state(irq_rctx, RCTX_STATE_UDP_EP3_PENDING);
2001dc: e3a01012 mov r1, #18
opcdh->cmd = OPENPCD_CMD_PIO_IRQ;
opcdh->reg = 0x00;
opcdh->flags = 0x00;
opcdh->val = 0x00;
irq_rctx->tot_len = sizeof(*opcdh) + sizeof(u_int32_t);
2001e0: e1c3e0b6 strh lr, [r3, #6]
req_ctx_set_state(irq_rctx, RCTX_STATE_UDP_EP3_PENDING);
2001e4: ebfc1f62 bl 107f74 <req_ctx_set_state>
2001e8: eaffffe7 b 20018c <__pio_irq_demux+0xa4>
irq_rctx = req_ctx_find_get(0, RCTX_STATE_FREE,
RCTX_STATE_PIOIRQ_BUSY);
if (!irq_rctx) {
/* we cannot disable the interrupt, since we have
* non-usb listeners */
pirqs.usb_throttled = 1;
2001ec: e59f0010 ldr r0, [pc, #16] ; 200204 <__pio_irq_demux+0x11c>
2001f0: e3a02001 mov r2, #1
2001f4: e5802084 str r2, [r0, #132] ; 0x84
2001f8: eaffffe3 b 20018c <__pio_irq_demux+0xa4>
2001fc: 0010aca4 .word 0x0010aca4
200200: 0010acc8 .word 0x0010acc8
200204: 00203844 .word 0x00203844
200208: 00200080 .word 0x00200080
0020020c <_ctype>:
20020c: 08080808 08080808 28282808 08082828 .........(((((..
20021c: 08080808 08080808 08080808 08080808 ................
20022c: 101010a0 10101010 10101010 10101010 ................
20023c: 04040404 04040404 10100404 10101010 ................
20024c: 41414110 01414141 01010101 01010101 .AAAAAA.........
20025c: 01010101 01010101 10010101 10101010 ................
20026c: 42424210 02424242 02020202 02020202 .BBBBBB.........
20027c: 02020202 02020202 10020202 08101010 ................
...
2002ac: 101010a0 10101010 10101010 10101010 ................
2002bc: 10101010 10101010 10101010 10101010 ................
2002cc: 01010101 01010101 01010101 01010101 ................
2002dc: 01010101 10010101 01010101 02010101 ................
2002ec: 02020202 02020202 02020202 02020202 ................
2002fc: 02020202 10020202 02020202 02020202 ................
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