254 lines
8.6 KiB
Plaintext
254 lines
8.6 KiB
Plaintext
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Motor.elf: file format elf32-avr
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .data 00000010 00800100 0000013a 000001ce 2**0
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CONTENTS, ALLOC, LOAD, DATA
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1 .text 0000013a 00000000 00000000 00000094 2**1
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .bss 00000001 00800110 00800110 000001de 2**0
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ALLOC
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3 .stab 000006cc 00000000 00000000 000001e0 2**2
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CONTENTS, READONLY, DEBUGGING
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4 .stabstr 00000085 00000000 00000000 000008ac 2**0
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CONTENTS, READONLY, DEBUGGING
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5 .debug_aranges 00000020 00000000 00000000 00000931 2**0
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CONTENTS, READONLY, DEBUGGING
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6 .debug_pubnames 00000062 00000000 00000000 00000951 2**0
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CONTENTS, READONLY, DEBUGGING
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7 .debug_info 00000196 00000000 00000000 000009b3 2**0
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CONTENTS, READONLY, DEBUGGING
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8 .debug_abbrev 00000100 00000000 00000000 00000b49 2**0
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CONTENTS, READONLY, DEBUGGING
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9 .debug_line 00000174 00000000 00000000 00000c49 2**0
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CONTENTS, READONLY, DEBUGGING
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10 .debug_frame 00000050 00000000 00000000 00000dc0 2**2
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CONTENTS, READONLY, DEBUGGING
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11 .debug_str 000000a1 00000000 00000000 00000e10 2**0
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CONTENTS, READONLY, DEBUGGING
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12 .debug_loc 00000013 00000000 00000000 00000eb1 2**0
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CONTENTS, READONLY, DEBUGGING
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13 .debug_pubtypes 0000001e 00000000 00000000 00000ec4 2**0
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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00000000 <__vectors>:
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0: 19 c0 rjmp .+50 ; 0x34 <__ctors_end>
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2: 33 c0 rjmp .+102 ; 0x6a <__bad_interrupt>
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4: 32 c0 rjmp .+100 ; 0x6a <__bad_interrupt>
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6: 31 c0 rjmp .+98 ; 0x6a <__bad_interrupt>
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8: 30 c0 rjmp .+96 ; 0x6a <__bad_interrupt>
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a: 2f c0 rjmp .+94 ; 0x6a <__bad_interrupt>
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c: 2e c0 rjmp .+92 ; 0x6a <__bad_interrupt>
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e: 2d c0 rjmp .+90 ; 0x6a <__bad_interrupt>
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10: 2c c0 rjmp .+88 ; 0x6a <__bad_interrupt>
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12: 2b c0 rjmp .+86 ; 0x6a <__bad_interrupt>
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14: 2a c0 rjmp .+84 ; 0x6a <__bad_interrupt>
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16: 29 c0 rjmp .+82 ; 0x6a <__bad_interrupt>
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18: 28 c0 rjmp .+80 ; 0x6a <__bad_interrupt>
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1a: 27 c0 rjmp .+78 ; 0x6a <__bad_interrupt>
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1c: 26 c0 rjmp .+76 ; 0x6a <__bad_interrupt>
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1e: 25 c0 rjmp .+74 ; 0x6a <__bad_interrupt>
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20: 24 c0 rjmp .+72 ; 0x6a <__bad_interrupt>
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22: 23 c0 rjmp .+70 ; 0x6a <__bad_interrupt>
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24: 22 c0 rjmp .+68 ; 0x6a <__bad_interrupt>
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26: 21 c0 rjmp .+66 ; 0x6a <__bad_interrupt>
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28: 20 c0 rjmp .+64 ; 0x6a <__bad_interrupt>
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2a: 1f c0 rjmp .+62 ; 0x6a <__bad_interrupt>
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2c: 1e c0 rjmp .+60 ; 0x6a <__bad_interrupt>
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2e: 1d c0 rjmp .+58 ; 0x6a <__bad_interrupt>
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30: 1c c0 rjmp .+56 ; 0x6a <__bad_interrupt>
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32: 1b c0 rjmp .+54 ; 0x6a <__bad_interrupt>
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00000034 <__ctors_end>:
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34: 11 24 eor r1, r1
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36: 1f be out 0x3f, r1 ; 63
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38: cf ef ldi r28, 0xFF ; 255
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3a: d2 e0 ldi r29, 0x02 ; 2
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3c: de bf out 0x3e, r29 ; 62
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3e: cd bf out 0x3d, r28 ; 61
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00000040 <__do_copy_data>:
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40: 11 e0 ldi r17, 0x01 ; 1
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42: a0 e0 ldi r26, 0x00 ; 0
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44: b1 e0 ldi r27, 0x01 ; 1
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46: ea e3 ldi r30, 0x3A ; 58
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48: f1 e0 ldi r31, 0x01 ; 1
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4a: 02 c0 rjmp .+4 ; 0x50 <__do_copy_data+0x10>
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4c: 05 90 lpm r0, Z+
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4e: 0d 92 st X+, r0
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50: a0 31 cpi r26, 0x10 ; 16
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52: b1 07 cpc r27, r17
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54: d9 f7 brne .-10 ; 0x4c <__do_copy_data+0xc>
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00000056 <__do_clear_bss>:
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56: 11 e0 ldi r17, 0x01 ; 1
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58: a0 e1 ldi r26, 0x10 ; 16
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5a: b1 e0 ldi r27, 0x01 ; 1
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5c: 01 c0 rjmp .+2 ; 0x60 <.do_clear_bss_start>
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0000005e <.do_clear_bss_loop>:
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5e: 1d 92 st X+, r1
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00000060 <.do_clear_bss_start>:
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60: a1 31 cpi r26, 0x11 ; 17
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62: b1 07 cpc r27, r17
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64: e1 f7 brne .-8 ; 0x5e <.do_clear_bss_loop>
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66: 3f d0 rcall .+126 ; 0xe6 <main>
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68: 66 c0 rjmp .+204 ; 0x136 <_exit>
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0000006a <__bad_interrupt>:
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6a: ca cf rjmp .-108 ; 0x0 <__vectors>
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0000006c <step>:
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};
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volatile uint8_t ind = 0;
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void step() {
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uint8_t i = ind;
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6c: 80 91 10 01 lds r24, 0x0110
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PORTB = led[i];
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70: 90 e0 ldi r25, 0x00 ; 0
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72: fc 01 movw r30, r24
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74: e0 50 subi r30, 0x00 ; 0
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76: ff 4f sbci r31, 0xFF ; 255
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78: 20 81 ld r18, Z
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7a: 25 b9 out 0x05, r18 ; 5
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PORTD = motor[i];
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7c: fc 01 movw r30, r24
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7e: ed 5f subi r30, 0xFD ; 253
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80: fe 4f sbci r31, 0xFE ; 254
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82: 20 81 ld r18, Z
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84: 2b b9 out 0x0b, r18 ; 11
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ADMUX = mux[i];
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86: 87 5f subi r24, 0xF7 ; 247
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88: 9e 4f sbci r25, 0xFE ; 254
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8a: fc 01 movw r30, r24
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8c: 80 81 ld r24, Z
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8e: 80 93 7c 00 sts 0x007C, r24
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}
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92: 08 95 ret
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00000094 <runon>:
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/*for(uint8_t k=0;k<120;k++) {
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ind = k%6;
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step();
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_delay_ms(10);
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}*/
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}
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94: 08 95 ret
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00000096 <ANA_COMP_vect>:
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ISR(ANA_COMP_vect) {
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96: 1f 92 push r1
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98: 0f 92 push r0
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9a: 0f b6 in r0, 0x3f ; 63
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9c: 0f 92 push r0
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9e: 11 24 eor r1, r1
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a0: 2f 93 push r18
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a2: 3f 93 push r19
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a4: 4f 93 push r20
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a6: 5f 93 push r21
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a8: 6f 93 push r22
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aa: 7f 93 push r23
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ac: 8f 93 push r24
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ae: 9f 93 push r25
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b0: af 93 push r26
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b2: bf 93 push r27
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b4: ef 93 push r30
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b6: ff 93 push r31
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ind = ind+1%6;
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b8: 80 91 10 01 lds r24, 0x0110
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bc: 8f 5f subi r24, 0xFF ; 255
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be: 80 93 10 01 sts 0x0110, r24
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step();
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c2: d4 df rcall .-88 ; 0x6c <step>
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//_delay_ms(10);
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}
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c4: ff 91 pop r31
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c6: ef 91 pop r30
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c8: bf 91 pop r27
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ca: af 91 pop r26
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cc: 9f 91 pop r25
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ce: 8f 91 pop r24
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d0: 7f 91 pop r23
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d2: 6f 91 pop r22
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d4: 5f 91 pop r21
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d6: 4f 91 pop r20
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d8: 3f 91 pop r19
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da: 2f 91 pop r18
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dc: 0f 90 pop r0
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de: 0f be out 0x3f, r0 ; 63
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e0: 0f 90 pop r0
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e2: 1f 90 pop r1
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e4: 18 95 reti
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000000e6 <main>:
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int main(void) {
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DDRB |= (1<<PB3) | (1<<PB4) | (1<<PB5) | (1<<PB0);
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e6: 84 b1 in r24, 0x04 ; 4
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e8: 89 63 ori r24, 0x39 ; 57
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ea: 84 b9 out 0x04, r24 ; 4
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DDRD = 0b00111111;
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ec: 8f e3 ldi r24, 0x3F ; 63
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ee: 8a b9 out 0x0a, r24 ; 10
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DDRD &=~ AINpin;//as input
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f0: 8a b1 in r24, 0x0a ; 10
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f2: 8f 73 andi r24, 0x3F ; 63
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f4: 8a b9 out 0x0a, r24 ; 10
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PORTD &=~ AINpin;//no Pull-up
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f6: 8b b1 in r24, 0x0b ; 11
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f8: 8f 73 andi r24, 0x3F ; 63
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fa: 8b b9 out 0x0b, r24 ; 11
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runon();
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cli();
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fc: f8 94 cli
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ADCSRB |=(1<<ACME);//enable multiplexer
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fe: 80 91 7b 00 lds r24, 0x007B
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102: 80 64 ori r24, 0x40 ; 64
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104: 80 93 7b 00 sts 0x007B, r24
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ADCSRA &=~(1<<ADEN);//make sure ADC is OFF
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108: 80 91 7a 00 lds r24, 0x007A
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10c: 8f 77 andi r24, 0x7F ; 127
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10e: 80 93 7a 00 sts 0x007A, r24
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//ADMUX|=(0<<MUX2)|(1<<MUX1)|(1<<MUX0); //select ADC3 as negative AIN
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ACSR |= (1<<ACIS1)|(0<<ACIS0);
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112: 80 b7 in r24, 0x30 ; 48
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114: 82 60 ori r24, 0x02 ; 2
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116: 80 bf out 0x30, r24 ; 48
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ACSR |= (1<<ACIE); // Comparator Interrupt Enable setzen damit Interrupt aktiv
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118: 80 b7 in r24, 0x30 ; 48
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11a: 88 60 ori r24, 0x08 ; 8
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11c: 80 bf out 0x30, r24 ; 48
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(0<<ACIC)| //input capture disabled
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(0<<ACIS1)| //set interrupt on output toggle
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(0<<ACIS0); */
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PORTB = led[1];
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11e: 80 91 01 01 lds r24, 0x0101
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122: 85 b9 out 0x05, r24 ; 5
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PORTD = motor[1];
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124: 80 91 04 01 lds r24, 0x0104
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128: 8b b9 out 0x0b, r24 ; 11
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ADMUX = mux[1];
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12a: 80 91 0a 01 lds r24, 0x010A
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12e: 80 93 7c 00 sts 0x007C, r24
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sei();
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132: 78 94 sei
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134: ff cf rjmp .-2 ; 0x134 <main+0x4e>
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00000136 <_exit>:
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136: f8 94 cli
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00000138 <__stop_program>:
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138: ff cf rjmp .-2 ; 0x138 <__stop_program>
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